From patchwork Mon Sep 9 10:24:16 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Sandiford X-Patchwork-Id: 273543 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "www.sourceware.org", Issuer "StartCom Class 1 Primary Intermediate Server CA" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 836C82C0124 for ; Mon, 9 Sep 2013 20:24:32 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:mime-version:content-type; q=dns; s= default; b=qhfI4bb9pn4uiEHe64jU69dTgg0DUPn7EhiE78iNwUKuRXMwJqDrc dl0uo4AR3KTNe5ZSLqpNWnN3HSXP41gxZLf1e6mhFt7NyQoPZdRR441JQZdsQM5X 3GWPZh95eUBr9gY2t/hLDo9M0JxMzxjPCEvYMTXSDcYhx848ly54RA= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:mime-version:content-type; s= default; bh=Xb/q9y9ZfRI/hUdAU+Vf88rwzR4=; b=OG+EnF/AzIEouasQ4cb+ FqeqsTlXRxHj5KAdzuSlfjvzaSgRngzupD8XeXRxC7v9NS0rk/VCH2fgvRQT5boS rCtuyRUMVlu1SdnKBokNtL6Eezo2jPI5w/K5ZIOuKQJVbq7cILXcy3RdK7byrK8k /KPUuz++8BoJrWNNx5LHrCE= Received: (qmail 16754 invoked by alias); 9 Sep 2013 10:24:25 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 16745 invoked by uid 89); 9 Sep 2013 10:24:25 -0000 Received: from mail-wg0-f44.google.com (HELO mail-wg0-f44.google.com) (74.125.82.44) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Mon, 09 Sep 2013 10:24:25 +0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.3 required=5.0 tests=ALL_TRUSTED, AWL, BAYES_00, FREEMAIL_FROM autolearn=ham version=3.3.2 X-HELO: mail-wg0-f44.google.com Received: by mail-wg0-f44.google.com with SMTP id b12so4023428wgh.35 for ; Mon, 09 Sep 2013 03:24:18 -0700 (PDT) X-Received: by 10.194.86.5 with SMTP id l5mr847976wjz.45.1378722258397; Mon, 09 Sep 2013 03:24:18 -0700 (PDT) Received: from localhost ([2.26.203.233]) by mx.google.com with ESMTPSA id gp9sm12064582wib.8.1969.12.31.16.00.00 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 09 Sep 2013 03:24:18 -0700 (PDT) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, rdsandiford@googlemail.com Subject: [2/4] Using gen_int_mode instead of GEN_INT Date: Mon, 09 Sep 2013 11:24:16 +0100 Message-ID: <87d2oigunj.fsf@talisman.default> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.2 (gnu/linux) MIME-Version: 1.0 Similar to patch 1, but here the calls are all to expand_* routines. Tested in the same way as before. OK to install? Thanks, Richard gcc/ * asan.c (asan_clear_shadow): Use gen_int_mode with the mode of the associated expand_* call. (asan_emit_stack_protection): Likewise. * builtins.c (round_trampoline_addr): Likewise. * explow.c (allocate_dynamic_stack_space, probe_stack_range): Likewise. * expmed.c (expand_smod_pow2, expand_sdiv_pow2, expand_divmod) (emit_store_flag): Likewise. * expr.c (emit_move_resolve_push, push_block, emit_single_push_insn_1) (emit_push_insn, optimize_bitfield_assignment_op, expand_expr_real_1): Likewise. * function.c (instantiate_virtual_regs_in_insn): Likewise. * ifcvt.c (noce_try_store_flag_constants): Likewise. * loop-unroll.c (unroll_loop_runtime_iterations): Likewise. * modulo-sched.c (generate_prolog_epilog): Likewise. * optabs.c (expand_binop, widen_leading, expand_doubleword_clz) (expand_ctz, expand_ffs, expand_unop): Likewise. Index: gcc/asan.c =================================================================== --- gcc/asan.c 2013-09-09 10:23:49.095277703 +0100 +++ gcc/asan.c 2013-09-09 10:55:59.743537289 +0100 @@ -897,15 +897,15 @@ asan_clear_shadow (rtx shadow_mem, HOST_ top_label = gen_label_rtx (); addr = force_reg (Pmode, XEXP (shadow_mem, 0)); shadow_mem = adjust_automodify_address (shadow_mem, SImode, addr, 0); end = force_reg (Pmode, plus_constant (Pmode, addr, len)); emit_label (top_label); emit_move_insn (shadow_mem, const0_rtx); - tmp = expand_simple_binop (Pmode, PLUS, addr, GEN_INT (4), addr, + tmp = expand_simple_binop (Pmode, PLUS, addr, gen_int_mode (4, Pmode), addr, true, OPTAB_LIB_WIDEN); if (tmp != addr) emit_move_insn (addr, tmp); emit_cmp_and_jump_insns (addr, end, LT, NULL_RTX, Pmode, true, top_label); jump = get_last_insn (); gcc_assert (JUMP_P (jump)); add_reg_note (jump, REG_BR_PROB, GEN_INT (REG_BR_PROB_BASE * 80 / 100)); @@ -962,25 +962,27 @@ asan_emit_stack_protection (rtx base, HO else pp_string (&asan_pp, "9 "); pp_space (&asan_pp); } str_cst = asan_pp_string (&asan_pp); /* Emit the prologue sequence. */ - base = expand_binop (Pmode, add_optab, base, GEN_INT (base_offset), + base = expand_binop (Pmode, add_optab, base, + gen_int_mode (base_offset, Pmode), NULL_RTX, 1, OPTAB_DIRECT); mem = gen_rtx_MEM (ptr_mode, base); emit_move_insn (mem, GEN_INT (ASAN_STACK_FRAME_MAGIC)); mem = adjust_address (mem, VOIDmode, GET_MODE_SIZE (ptr_mode)); emit_move_insn (mem, expand_normal (str_cst)); shadow_base = expand_binop (Pmode, lshr_optab, base, GEN_INT (ASAN_SHADOW_SHIFT), NULL_RTX, 1, OPTAB_DIRECT); shadow_base = expand_binop (Pmode, add_optab, shadow_base, - GEN_INT (targetm.asan_shadow_offset ()), + gen_int_mode (targetm.asan_shadow_offset (), + Pmode), NULL_RTX, 1, OPTAB_DIRECT); gcc_assert (asan_shadow_set != -1 && (ASAN_RED_ZONE_SIZE >> ASAN_SHADOW_SHIFT) == 4); shadow_mem = gen_rtx_MEM (SImode, shadow_base); set_mem_alias_set (shadow_mem, asan_shadow_set); prev_offset = base_offset; for (l = length; l; l -= 2) Index: gcc/builtins.c =================================================================== --- gcc/builtins.c 2013-09-08 17:18:39.707590244 +0100 +++ gcc/builtins.c 2013-09-09 10:55:59.747537322 +0100 @@ -4858,16 +4858,16 @@ round_trampoline_addr (rtx tramp) /* If we don't need too much alignment, we'll have been guaranteed proper alignment by get_trampoline_type. */ if (TRAMPOLINE_ALIGNMENT <= STACK_BOUNDARY) return tramp; /* Round address up to desired boundary. */ temp = gen_reg_rtx (Pmode); - addend = GEN_INT (TRAMPOLINE_ALIGNMENT / BITS_PER_UNIT - 1); - mask = GEN_INT (-TRAMPOLINE_ALIGNMENT / BITS_PER_UNIT); + addend = gen_int_mode (TRAMPOLINE_ALIGNMENT / BITS_PER_UNIT - 1, Pmode); + mask = gen_int_mode (-TRAMPOLINE_ALIGNMENT / BITS_PER_UNIT, Pmode); temp = expand_simple_binop (Pmode, PLUS, tramp, addend, temp, 0, OPTAB_LIB_WIDEN); tramp = expand_simple_binop (Pmode, AND, temp, mask, temp, 0, OPTAB_LIB_WIDEN); return tramp; Index: gcc/explow.c =================================================================== --- gcc/explow.c 2013-09-09 10:49:45.226460819 +0100 +++ gcc/explow.c 2013-09-09 10:55:59.748537330 +0100 @@ -1351,15 +1351,16 @@ allocate_dynamic_stack_space (rtx size, by malloc does not meet REQUIRED_ALIGN, we increase SIZE to make sure we allocate enough space. */ if (MALLOC_ABI_ALIGNMENT >= required_align) ask = size; else { ask = expand_binop (Pmode, add_optab, size, - GEN_INT (required_align / BITS_PER_UNIT - 1), + gen_int_mode (required_align / BITS_PER_UNIT - 1, + Pmode), NULL_RTX, 1, OPTAB_LIB_WIDEN); must_align = true; } func = init_one_libfunc ("__morestack_allocate_stack_space"); space = emit_library_call_value (func, target, LCT_NORMAL, Pmode, @@ -1477,21 +1478,24 @@ allocate_dynamic_stack_space (rtx size, if (must_align) { /* CEIL_DIV_EXPR needs to worry about the addition overflowing, but we know it can't. So add ourselves and then do TRUNC_DIV_EXPR. */ target = expand_binop (Pmode, add_optab, target, - GEN_INT (required_align / BITS_PER_UNIT - 1), + gen_int_mode (required_align / BITS_PER_UNIT - 1, + Pmode), NULL_RTX, 1, OPTAB_LIB_WIDEN); target = expand_divmod (0, TRUNC_DIV_EXPR, Pmode, target, - GEN_INT (required_align / BITS_PER_UNIT), + gen_int_mode (required_align / BITS_PER_UNIT, + Pmode), NULL_RTX, 1); target = expand_mult (Pmode, target, - GEN_INT (required_align / BITS_PER_UNIT), + gen_int_mode (required_align / BITS_PER_UNIT, + Pmode), NULL_RTX, 1); } /* Now that we've committed to a return value, mark its alignment. */ mark_reg_pointer (target, required_align); /* Record the new stack level for nonlocal gotos. */ @@ -1665,15 +1669,15 @@ probe_stack_range (HOST_WIDE_INT first, /* Jump to END_LAB if TEST_ADDR == LAST_ADDR. */ emit_cmp_and_jump_insns (test_addr, last_addr, EQ, NULL_RTX, Pmode, 1, end_lab); /* TEST_ADDR = TEST_ADDR + PROBE_INTERVAL. */ temp = expand_binop (Pmode, STACK_GROW_OPTAB, test_addr, - GEN_INT (PROBE_INTERVAL), test_addr, + gen_int_mode (PROBE_INTERVAL, Pmode), test_addr, 1, OPTAB_WIDEN); gcc_assert (temp == test_addr); /* Probe at TEST_ADDR. */ emit_stack_probe (test_addr); Index: gcc/expmed.c =================================================================== --- gcc/expmed.c 2013-09-09 10:49:45.228460835 +0100 +++ gcc/expmed.c 2013-09-09 10:55:59.751537354 +0100 @@ -3662,30 +3662,32 @@ expand_smod_pow2 (enum machine_mode mode || (set_src_cost (temp, optimize_insn_for_speed_p ()) > COSTS_N_INSNS (2))) { temp = expand_binop (mode, xor_optab, op0, signmask, NULL_RTX, 1, OPTAB_LIB_WIDEN); temp = expand_binop (mode, sub_optab, temp, signmask, NULL_RTX, 1, OPTAB_LIB_WIDEN); - temp = expand_binop (mode, and_optab, temp, GEN_INT (masklow), + temp = expand_binop (mode, and_optab, temp, + gen_int_mode (masklow, mode), NULL_RTX, 1, OPTAB_LIB_WIDEN); temp = expand_binop (mode, xor_optab, temp, signmask, NULL_RTX, 1, OPTAB_LIB_WIDEN); temp = expand_binop (mode, sub_optab, temp, signmask, NULL_RTX, 1, OPTAB_LIB_WIDEN); } else { signmask = expand_binop (mode, lshr_optab, signmask, shift, NULL_RTX, 1, OPTAB_LIB_WIDEN); signmask = force_reg (mode, signmask); temp = expand_binop (mode, add_optab, op0, signmask, NULL_RTX, 1, OPTAB_LIB_WIDEN); - temp = expand_binop (mode, and_optab, temp, GEN_INT (masklow), + temp = expand_binop (mode, and_optab, temp, + gen_int_mode (masklow, mode), NULL_RTX, 1, OPTAB_LIB_WIDEN); temp = expand_binop (mode, sub_optab, temp, signmask, NULL_RTX, 1, OPTAB_LIB_WIDEN); } return temp; } } @@ -3760,15 +3762,15 @@ expand_sdiv_pow2 (enum machine_mode mode /* ??? emit_conditional_move forces a stack adjustment via compare_from_rtx so, if the sequence is discarded, it will be lost. Do it now instead. */ do_pending_stack_adjust (); start_sequence (); temp2 = copy_to_mode_reg (mode, op0); - temp = expand_binop (mode, add_optab, temp2, GEN_INT (d-1), + temp = expand_binop (mode, add_optab, temp2, gen_int_mode (d - 1, mode), NULL_RTX, 0, OPTAB_LIB_WIDEN); temp = force_reg (mode, temp); /* Construct "temp2 = (temp2 < 0) ? temp : temp2". */ temp2 = emit_conditional_move (temp2, LT, temp2, const0_rtx, mode, temp, temp2, mode, 0); if (temp2) @@ -3787,28 +3789,28 @@ expand_sdiv_pow2 (enum machine_mode mode { int ushift = GET_MODE_BITSIZE (mode) - logd; temp = gen_reg_rtx (mode); temp = emit_store_flag (temp, LT, op0, const0_rtx, mode, 0, -1); if (shift_cost (optimize_insn_for_speed_p (), mode, ushift) > COSTS_N_INSNS (1)) - temp = expand_binop (mode, and_optab, temp, GEN_INT (d - 1), + temp = expand_binop (mode, and_optab, temp, gen_int_mode (d - 1, mode), NULL_RTX, 0, OPTAB_LIB_WIDEN); else temp = expand_shift (RSHIFT_EXPR, mode, temp, ushift, NULL_RTX, 1); temp = expand_binop (mode, add_optab, temp, op0, NULL_RTX, 0, OPTAB_LIB_WIDEN); return expand_shift (RSHIFT_EXPR, mode, temp, logd, NULL_RTX, 0); } label = gen_label_rtx (); temp = copy_to_mode_reg (mode, op0); do_cmp_and_jump (temp, const0_rtx, GE, mode, label); - expand_inc (temp, GEN_INT (d - 1)); + expand_inc (temp, gen_int_mode (d - 1, mode)); emit_label (label); return expand_shift (RSHIFT_EXPR, mode, temp, logd, NULL_RTX, 0); } /* Emit the code to divide OP0 by OP1, putting the result in TARGET if that is convenient, and returning where the result is. You may request either the quotient or the remainder as the result; @@ -4058,17 +4060,19 @@ expand_divmod (int rem_flag, enum tree_c & GET_MODE_MASK (compute_mode)); if (EXACT_POWER_OF_2_OR_ZERO_P (d)) { pre_shift = floor_log2 (d); if (rem_flag) { + unsigned HOST_WIDE_INT mask + = ((unsigned HOST_WIDE_INT) 1 << pre_shift) - 1; remainder = expand_binop (compute_mode, and_optab, op0, - GEN_INT (((HOST_WIDE_INT) 1 << pre_shift) - 1), + gen_int_mode (mask, compute_mode), remainder, 1, OPTAB_LIB_WIDEN); if (remainder) return gen_lowpart (mode, remainder); } quotient = expand_shift (RSHIFT_EXPR, compute_mode, op0, pre_shift, tquotient, 1); @@ -4111,18 +4115,18 @@ expand_divmod (int rem_flag, enum tree_c if (post_shift - 1 >= BITS_PER_WORD) goto fail1; extra_cost = (shift_cost (speed, compute_mode, post_shift - 1) + shift_cost (speed, compute_mode, 1) + 2 * add_cost (speed, compute_mode)); - t1 = expmed_mult_highpart (compute_mode, op0, - GEN_INT (ml), - NULL_RTX, 1, - max_cost - extra_cost); + t1 = expmed_mult_highpart + (compute_mode, op0, + gen_int_mode (ml, compute_mode), + NULL_RTX, 1, max_cost - extra_cost); if (t1 == 0) goto fail1; t2 = force_operand (gen_rtx_MINUS (compute_mode, op0, t1), NULL_RTX); t3 = expand_shift (RSHIFT_EXPR, compute_mode, t2, 1, NULL_RTX, 1); @@ -4143,18 +4147,18 @@ expand_divmod (int rem_flag, enum tree_c t1 = expand_shift (RSHIFT_EXPR, compute_mode, op0, pre_shift, NULL_RTX, 1); extra_cost = (shift_cost (speed, compute_mode, pre_shift) + shift_cost (speed, compute_mode, post_shift)); - t2 = expmed_mult_highpart (compute_mode, t1, - GEN_INT (ml), - NULL_RTX, 1, - max_cost - extra_cost); + t2 = expmed_mult_highpart + (compute_mode, t1, + gen_int_mode (ml, compute_mode), + NULL_RTX, 1, max_cost - extra_cost); if (t2 == 0) goto fail1; quotient = expand_shift (RSHIFT_EXPR, compute_mode, t2, post_shift, tquotient, 1); } } @@ -4270,17 +4274,17 @@ expand_divmod (int rem_flag, enum tree_c if (post_shift >= BITS_PER_WORD || size - 1 >= BITS_PER_WORD) goto fail1; extra_cost = (shift_cost (speed, compute_mode, post_shift) + shift_cost (speed, compute_mode, size - 1) + add_cost (speed, compute_mode)); - t1 = expmed_mult_highpart (compute_mode, op0, - GEN_INT (ml), NULL_RTX, 0, - max_cost - extra_cost); + t1 = expmed_mult_highpart + (compute_mode, op0, gen_int_mode (ml, compute_mode), + NULL_RTX, 0, max_cost - extra_cost); if (t1 == 0) goto fail1; t2 = expand_shift (RSHIFT_EXPR, compute_mode, t1, post_shift, NULL_RTX, 0); t3 = expand_shift (RSHIFT_EXPR, compute_mode, op0, @@ -4364,17 +4368,20 @@ expand_divmod (int rem_flag, enum tree_c /* We could just as easily deal with negative constants here, but it does not seem worth the trouble for GCC 2.6. */ if (EXACT_POWER_OF_2_OR_ZERO_P (d)) { pre_shift = floor_log2 (d); if (rem_flag) { - remainder = expand_binop (compute_mode, and_optab, op0, - GEN_INT (((HOST_WIDE_INT) 1 << pre_shift) - 1), - remainder, 0, OPTAB_LIB_WIDEN); + unsigned HOST_WIDE_INT mask + = ((unsigned HOST_WIDE_INT) 1 << pre_shift) - 1; + remainder = expand_binop + (compute_mode, and_optab, op0, + gen_int_mode (mask, compute_mode), + remainder, 0, OPTAB_LIB_WIDEN); if (remainder) return gen_lowpart (mode, remainder); } quotient = expand_shift (RSHIFT_EXPR, compute_mode, op0, pre_shift, tquotient, 0); } @@ -4393,17 +4400,17 @@ expand_divmod (int rem_flag, enum tree_c (RSHIFT_EXPR, compute_mode, op0, size - 1, NULL_RTX, 0); t2 = expand_binop (compute_mode, xor_optab, op0, t1, NULL_RTX, 0, OPTAB_WIDEN); extra_cost = (shift_cost (speed, compute_mode, post_shift) + shift_cost (speed, compute_mode, size - 1) + 2 * add_cost (speed, compute_mode)); - t3 = expmed_mult_highpart (compute_mode, t2, - GEN_INT (ml), NULL_RTX, 1, - max_cost - extra_cost); + t3 = expmed_mult_highpart + (compute_mode, t2, gen_int_mode (ml, compute_mode), + NULL_RTX, 1, max_cost - extra_cost); if (t3 != 0) { t4 = expand_shift (RSHIFT_EXPR, compute_mode, t3, post_shift, NULL_RTX, 1); quotient = expand_binop (compute_mode, xor_optab, t4, t1, tquotient, 0, @@ -4533,15 +4540,15 @@ expand_divmod (int rem_flag, enum tree_c if (op1_is_constant && EXACT_POWER_OF_2_OR_ZERO_P (INTVAL (op1))) { rtx t1, t2, t3; unsigned HOST_WIDE_INT d = INTVAL (op1); t1 = expand_shift (RSHIFT_EXPR, compute_mode, op0, floor_log2 (d), tquotient, 1); t2 = expand_binop (compute_mode, and_optab, op0, - GEN_INT (d - 1), + gen_int_mode (d - 1, compute_mode), NULL_RTX, 1, OPTAB_LIB_WIDEN); t3 = gen_reg_rtx (compute_mode); t3 = emit_store_flag (t3, NE, t2, const0_rtx, compute_mode, 1, 1); if (t3 == 0) { rtx lab; @@ -4630,15 +4637,15 @@ expand_divmod (int rem_flag, enum tree_c languages (Ada). */ rtx t1, t2, t3; unsigned HOST_WIDE_INT d = INTVAL (op1); t1 = expand_shift (RSHIFT_EXPR, compute_mode, op0, floor_log2 (d), tquotient, 0); t2 = expand_binop (compute_mode, and_optab, op0, - GEN_INT (d - 1), + gen_int_mode (d - 1, compute_mode), NULL_RTX, 1, OPTAB_LIB_WIDEN); t3 = gen_reg_rtx (compute_mode); t3 = emit_store_flag (t3, NE, t2, const0_rtx, compute_mode, 1, 1); if (t3 == 0) { rtx lab; @@ -5473,15 +5480,15 @@ emit_store_flag (rtx target, enum rtx_co && rtx_cost (GEN_INT (normalizep), PLUS, 1, optimize_insn_for_speed_p ()) == 0) { tem = emit_store_flag_1 (subtarget, rcode, op0, op1, mode, 0, STORE_FLAG_VALUE, target_mode); if (tem) return expand_binop (target_mode, add_optab, tem, - GEN_INT (normalizep), + gen_int_mode (normalizep, target_mode), target, 0, OPTAB_WIDEN); } else if (!want_add && rtx_cost (trueval, XOR, 1, optimize_insn_for_speed_p ()) == 0) { tem = emit_store_flag_1 (subtarget, rcode, op0, op1, mode, 0, @@ -5577,15 +5584,16 @@ emit_store_flag (rtx target, enum rtx_co && rtx_cost (GEN_INT (normalizep), PLUS, 1, optimize_insn_for_speed_p ()) == 0) { tem = emit_store_flag_1 (subtarget, rcode, op0, op1, mode, 0, STORE_FLAG_VALUE, target_mode); if (tem != 0) tem = expand_binop (target_mode, add_optab, tem, - GEN_INT (normalizep), target, 0, OPTAB_WIDEN); + gen_int_mode (normalizep, target_mode), + target, 0, OPTAB_WIDEN); } else if (!want_add && rtx_cost (trueval, XOR, 1, optimize_insn_for_speed_p ()) == 0) { tem = emit_store_flag_1 (subtarget, rcode, op0, op1, mode, 0, normalizep, target_mode); Index: gcc/expr.c =================================================================== --- gcc/expr.c 2013-09-09 10:49:45.230460851 +0100 +++ gcc/expr.c 2013-09-09 10:55:59.754537379 +0100 @@ -3128,15 +3128,15 @@ emit_move_resolve_push (enum machine_mod gcc_assert (adjust == val || adjust == -val); adjust = val; } /* Do not use anti_adjust_stack, since we don't want to update stack_pointer_delta. */ temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx, - GEN_INT (adjust), stack_pointer_rtx, + gen_int_mode (adjust, Pmode), stack_pointer_rtx, 0, OPTAB_LIB_WIDEN); if (temp != stack_pointer_rtx) emit_move_insn (stack_pointer_rtx, temp); switch (code) { case PRE_INC: @@ -3639,15 +3639,16 @@ push_block (rtx size, int extra, int bel anti_adjust_stack (plus_constant (Pmode, size, extra)); else if (REG_P (size) && extra == 0) anti_adjust_stack (size); else { temp = copy_to_mode_reg (Pmode, size); if (extra != 0) - temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra), + temp = expand_binop (Pmode, add_optab, temp, + gen_int_mode (extra, Pmode), temp, 0, OPTAB_LIB_WIDEN); anti_adjust_stack (temp); } #ifndef STACK_GROWS_DOWNWARD if (0) #else @@ -3907,15 +3908,15 @@ emit_single_push_insn_1 (enum machine_mo expand_binop (Pmode, #ifdef STACK_GROWS_DOWNWARD sub_optab, #else add_optab, #endif stack_pointer_rtx, - GEN_INT (rounded_size), + gen_int_mode (rounded_size, Pmode), NULL_RTX, 0, OPTAB_LIB_WIDEN)); offset = (HOST_WIDE_INT) padding_size; #ifdef STACK_GROWS_DOWNWARD if (STACK_PUSH_CODE == POST_DEC) /* We have already decremented the stack pointer, so get the previous value. */ @@ -4123,16 +4124,16 @@ emit_push_insn (rtx x, enum machine_mode /* Deduct words put into registers from the size we must copy. */ if (partial != 0) { if (CONST_INT_P (size)) size = GEN_INT (INTVAL (size) - used); else size = expand_binop (GET_MODE (size), sub_optab, size, - GEN_INT (used), NULL_RTX, 0, - OPTAB_LIB_WIDEN); + gen_int_mode (used, GET_MODE (size)), + NULL_RTX, 0, OPTAB_LIB_WIDEN); } /* Get the address of the stack space. In this case, we do not deal with EXTRA separately. A single stack adjust will do. */ if (! args_addr) { @@ -4471,15 +4472,16 @@ optimize_bitfield_assignment_op (unsigne set_mem_alias_set (str_rtx, 0); set_mem_expr (str_rtx, 0); } binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab; if (bitpos + bitsize != str_bitsize) { - rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize) - 1); + rtx mask = gen_int_mode (((unsigned HOST_WIDE_INT) 1 << bitsize) - 1, + str_mode); value = expand_and (str_mode, value, mask, NULL_RTX); } value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1); result = expand_binop (str_mode, binop, str_rtx, value, str_rtx, 1, OPTAB_WIDEN); if (result != str_rtx) emit_move_insn (str_rtx, result); @@ -9853,15 +9855,16 @@ expand_expr_real_1 (tree exp, rtx target if (DECL_BIT_FIELD (field)) { HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field)); enum machine_mode imode = TYPE_MODE (TREE_TYPE (field)); if (TYPE_UNSIGNED (TREE_TYPE (field))) { - op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1); + op1 = gen_int_mode (((HOST_WIDE_INT) 1 << bitsize) - 1, + imode); op0 = expand_and (imode, op0, op1, target); } else { int count = GET_MODE_PRECISION (imode) - bitsize; op0 = expand_shift (LSHIFT_EXPR, imode, op0, count, Index: gcc/function.c =================================================================== --- gcc/function.c 2013-09-08 17:18:39.707590244 +0100 +++ gcc/function.c 2013-09-09 10:55:59.756537396 +0100 @@ -1540,17 +1540,18 @@ instantiate_virtual_regs_in_insn (rtx in new_rtx = instantiate_new_reg (SET_SRC (set), &offset); if (new_rtx && offset != 0 && REG_P (SET_DEST (set)) && REGNO (SET_DEST (set)) > LAST_VIRTUAL_REGISTER) { start_sequence (); - x = expand_simple_binop (GET_MODE (SET_DEST (set)), PLUS, - new_rtx, GEN_INT (offset), SET_DEST (set), - 1, OPTAB_LIB_WIDEN); + x = expand_simple_binop (GET_MODE (SET_DEST (set)), PLUS, new_rtx, + gen_int_mode (offset, + GET_MODE (SET_DEST (set))), + SET_DEST (set), 1, OPTAB_LIB_WIDEN); if (x != SET_DEST (set)) emit_move_insn (SET_DEST (set), x); seq = get_insns (); end_sequence (); emit_insn_before (seq, insn); @@ -1662,32 +1663,33 @@ instantiate_virtual_regs_in_insn (rtx in /* Careful, special mode predicates may have stuff in insn_data[insn_code].operand[i].mode that isn't useful to us for computing a new value. */ /* ??? Recognize address_operand and/or "p" constraints to see if (plus new offset) is a valid before we put this through expand_simple_binop. */ x = expand_simple_binop (GET_MODE (x), PLUS, new_rtx, - GEN_INT (offset), NULL_RTX, - 1, OPTAB_LIB_WIDEN); + gen_int_mode (offset, GET_MODE (x)), + NULL_RTX, 1, OPTAB_LIB_WIDEN); seq = get_insns (); end_sequence (); emit_insn_before (seq, insn); } break; case SUBREG: new_rtx = instantiate_new_reg (SUBREG_REG (x), &offset); if (new_rtx == NULL) continue; if (offset != 0) { start_sequence (); - new_rtx = expand_simple_binop (GET_MODE (new_rtx), PLUS, new_rtx, - GEN_INT (offset), NULL_RTX, - 1, OPTAB_LIB_WIDEN); + new_rtx = expand_simple_binop + (GET_MODE (new_rtx), PLUS, new_rtx, + gen_int_mode (offset, GET_MODE (new_rtx)), + NULL_RTX, 1, OPTAB_LIB_WIDEN); seq = get_insns (); end_sequence (); emit_insn_before (seq, insn); } x = simplify_gen_subreg (recog_data.operand_mode[i], new_rtx, GET_MODE (new_rtx), SUBREG_BYTE (x)); gcc_assert (x); Index: gcc/ifcvt.c =================================================================== --- gcc/ifcvt.c 2013-09-08 17:18:39.707590244 +0100 +++ gcc/ifcvt.c 2013-09-09 10:55:59.760537428 +0100 @@ -1158,16 +1158,16 @@ noce_try_store_flag_constants (struct no /* if (test) x = 3; else x = 4; => x = 3 + (test == 0); */ if (diff == STORE_FLAG_VALUE || diff == -STORE_FLAG_VALUE) { target = expand_simple_binop (mode, (diff == STORE_FLAG_VALUE ? PLUS : MINUS), - GEN_INT (ifalse), target, if_info->x, 0, - OPTAB_WIDEN); + gen_int_mode (ifalse, mode), target, + if_info->x, 0, OPTAB_WIDEN); } /* if (test) x = 8; else x = 0; => x = (test != 0) << 3; */ else if (ifalse == 0 && (tmp = exact_log2 (itrue)) >= 0) { target = expand_simple_binop (mode, ASHIFT, @@ -1176,28 +1176,28 @@ noce_try_store_flag_constants (struct no } /* if (test) x = -1; else x = b; => x = -(test != 0) | b; */ else if (itrue == -1) { target = expand_simple_binop (mode, IOR, - target, GEN_INT (ifalse), if_info->x, 0, - OPTAB_WIDEN); + target, gen_int_mode (ifalse, mode), + if_info->x, 0, OPTAB_WIDEN); } /* if (test) x = a; else x = b; => x = (-(test != 0) & (b - a)) + a; */ else { target = expand_simple_binop (mode, AND, - target, GEN_INT (diff), if_info->x, 0, - OPTAB_WIDEN); + target, gen_int_mode (diff, mode), + if_info->x, 0, OPTAB_WIDEN); if (target) target = expand_simple_binop (mode, PLUS, - target, GEN_INT (ifalse), + target, gen_int_mode (ifalse, mode), if_info->x, 0, OPTAB_WIDEN); } if (! target) { end_sequence (); return FALSE; Index: gcc/loop-unroll.c =================================================================== --- gcc/loop-unroll.c 2013-09-08 17:18:39.707590244 +0100 +++ gcc/loop-unroll.c 2013-09-09 10:55:59.757537404 +0100 @@ -1162,16 +1162,15 @@ unroll_loop_runtime_iterations (struct l if (tmp != niter) emit_move_insn (niter, tmp); /* Count modulo by ANDing it with max_unroll; we use the fact that the number of unrollings is a power of two, and thus this is correct even if there is overflow in the computation. */ niter = expand_simple_binop (desc->mode, AND, - niter, - GEN_INT (max_unroll), + niter, gen_int_mode (max_unroll, desc->mode), NULL_RTX, 0, OPTAB_LIB_WIDEN); init_code = get_insns (); end_sequence (); unshare_all_rtl_in_chain (init_code); /* Precondition the loop. */ Index: gcc/modulo-sched.c =================================================================== --- gcc/modulo-sched.c 2013-09-09 10:49:45.230460851 +0100 +++ gcc/modulo-sched.c 2013-09-09 10:55:59.759537420 +0100 @@ -1144,16 +1144,17 @@ generate_prolog_epilog (partial_schedule { /* Generate instructions at the beginning of the prolog to adjust the loop count by STAGE_COUNT. If loop count is constant (count_init), this constant is adjusted by STAGE_COUNT in generate_prolog_epilog function. */ rtx sub_reg = NULL_RTX; - sub_reg = expand_simple_binop (GET_MODE (count_reg), MINUS, - count_reg, GEN_INT (last_stage), + sub_reg = expand_simple_binop (GET_MODE (count_reg), MINUS, count_reg, + gen_int_mode (last_stage, + GET_MODE (count_reg)), count_reg, 1, OPTAB_DIRECT); gcc_assert (REG_P (sub_reg)); if (REGNO (sub_reg) != REGNO (count_reg)) emit_move_insn (count_reg, sub_reg); } for (i = 0; i < last_stage; i++) Index: gcc/optabs.c =================================================================== --- gcc/optabs.c 2013-09-08 17:18:39.707590244 +0100 +++ gcc/optabs.c 2013-09-09 10:55:59.760537428 +0100 @@ -1559,15 +1559,15 @@ expand_binop (enum machine_mode mode, op if (CONST_INT_P (op1)) newop1 = GEN_INT (bits - INTVAL (op1)); else if (targetm.shift_truncation_mask (mode) == bits - 1) newop1 = negate_rtx (GET_MODE (op1), op1); else newop1 = expand_binop (GET_MODE (op1), sub_optab, - GEN_INT (bits), op1, + gen_int_mode (bits, GET_MODE (op1)), op1, NULL_RTX, unsignedp, OPTAB_DIRECT); temp = expand_binop_directly (mode, otheroptab, op0, newop1, target, unsignedp, methods, last); if (temp) return temp; } @@ -2535,18 +2535,20 @@ widen_leading (enum machine_mode mode, r if (target == 0) target = gen_reg_rtx (mode); xop0 = widen_operand (op0, wider_mode, mode, unoptab != clrsb_optab, false); temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX, unoptab != clrsb_optab); if (temp != 0) - temp = expand_binop (wider_mode, sub_optab, temp, - GEN_INT (GET_MODE_PRECISION (wider_mode) - - GET_MODE_PRECISION (mode)), - target, true, OPTAB_DIRECT); + temp = expand_binop + (wider_mode, sub_optab, temp, + gen_int_mode (GET_MODE_PRECISION (wider_mode) + - GET_MODE_PRECISION (mode), + wider_mode), + target, true, OPTAB_DIRECT); if (temp == 0) delete_insns_since (last); return temp; } } } @@ -2597,15 +2599,15 @@ expand_doubleword_clz (enum machine_mode of bits in the high word. */ emit_label (hi0_label); temp = expand_unop_direct (word_mode, clz_optab, sublo, 0, true); if (!temp) goto fail; temp = expand_binop (word_mode, add_optab, temp, - GEN_INT (GET_MODE_BITSIZE (word_mode)), + gen_int_mode (GET_MODE_BITSIZE (word_mode), word_mode), result, true, OPTAB_DIRECT); if (!temp) goto fail; if (temp != result) convert_move (result, temp, true); emit_label (after_label); @@ -2753,15 +2755,16 @@ expand_ctz (enum machine_mode mode, rtx temp = expand_unop_direct (mode, neg_optab, op0, NULL_RTX, true); if (temp) temp = expand_binop (mode, and_optab, op0, temp, NULL_RTX, true, OPTAB_DIRECT); if (temp) temp = expand_unop_direct (mode, clz_optab, temp, NULL_RTX, true); if (temp) - temp = expand_binop (mode, sub_optab, GEN_INT (GET_MODE_PRECISION (mode) - 1), + temp = expand_binop (mode, sub_optab, + gen_int_mode (GET_MODE_PRECISION (mode) - 1, mode), temp, target, true, OPTAB_DIRECT); if (temp == 0) { end_sequence (); return 0; } @@ -2834,15 +2837,15 @@ expand_ffs (enum machine_mode mode, rtx convert_move (temp, GEN_INT (-1), false); emit_label (nonzero_label); } /* temp now has a value in the range -1..bitsize-1. ffs is supposed to produce a value in the range 0..bitsize. */ - temp = expand_binop (mode, add_optab, temp, GEN_INT (1), + temp = expand_binop (mode, add_optab, temp, gen_int_mode (1, mode), target, false, OPTAB_DIRECT); if (!temp) goto fail; seq = get_insns (); end_sequence (); @@ -3304,18 +3307,20 @@ expand_unop (enum machine_mode mode, opt temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX, unsignedp); /* If we are generating clz using wider mode, adjust the result. Similarly for clrsb. */ if ((unoptab == clz_optab || unoptab == clrsb_optab) && temp != 0) - temp = expand_binop (wider_mode, sub_optab, temp, - GEN_INT (GET_MODE_PRECISION (wider_mode) - - GET_MODE_PRECISION (mode)), - target, true, OPTAB_DIRECT); + temp = expand_binop + (wider_mode, sub_optab, temp, + gen_int_mode (GET_MODE_PRECISION (wider_mode) + - GET_MODE_PRECISION (mode), + wider_mode), + target, true, OPTAB_DIRECT); /* Likewise for bswap. */ if (unoptab == bswap_optab && temp != 0) { gcc_assert (GET_MODE_PRECISION (wider_mode) == GET_MODE_BITSIZE (wider_mode) && GET_MODE_PRECISION (mode)