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X-Received-From: 2a00:1450:4013:c00::22b Cc: Jan Kiszka , qemu-stable@nongnu.org, anthony@codemonkey.ws Subject: [Qemu-devel] [PULL 3/5] memory: Provide separate handling of unassigned io ports accesses X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Jan Kiszka Accesses to unassigned io ports shall return -1 on read and be ignored on write. Ensure these properties via dedicated ops, decoupling us from the memory core's handling of unassigned accesses. Cc: qemu-stable@nongnu.org Signed-off-by: Jan Kiszka Signed-off-by: Paolo Bonzini --- exec.c | 3 ++- include/exec/ioport.h | 4 ++++ ioport.c | 16 ++++++++++++++++ 3 files changed, 22 insertions(+), 1 deletion(-) diff --git a/exec.c b/exec.c index e6f04d8..3859b02 100644 --- a/exec.c +++ b/exec.c @@ -1805,7 +1805,8 @@ static void memory_map_init(void) address_space_init(&address_space_memory, system_memory, "memory"); system_io = g_malloc(sizeof(*system_io)); - memory_region_init(system_io, NULL, "io", 65536); + memory_region_init_io(system_io, NULL, &unassigned_io_ops, NULL, "io", + 65536); address_space_init(&address_space_io, system_io, "I/O"); memory_listener_register(&core_memory_listener, &address_space_memory); diff --git a/include/exec/ioport.h b/include/exec/ioport.h index bdd4e96..b3848be 100644 --- a/include/exec/ioport.h +++ b/include/exec/ioport.h @@ -45,6 +45,10 @@ typedef struct MemoryRegionPortio { #define PORTIO_END_OF_LIST() { } +#ifndef CONFIG_USER_ONLY +extern const MemoryRegionOps unassigned_io_ops; +#endif + void cpu_outb(pio_addr_t addr, uint8_t val); void cpu_outw(pio_addr_t addr, uint16_t val); void cpu_outl(pio_addr_t addr, uint32_t val); diff --git a/ioport.c b/ioport.c index 79b7f1a..707cce8 100644 --- a/ioport.c +++ b/ioport.c @@ -44,6 +44,22 @@ typedef struct MemoryRegionPortioList { MemoryRegionPortio ports[]; } MemoryRegionPortioList; +static uint64_t unassigned_io_read(void *opaque, hwaddr addr, unsigned size) +{ + return -1ULL; +} + +static void unassigned_io_write(void *opaque, hwaddr addr, uint64_t val, + unsigned size) +{ +} + +const MemoryRegionOps unassigned_io_ops = { + .read = unassigned_io_read, + .write = unassigned_io_write, + .endianness = DEVICE_NATIVE_ENDIAN, +}; + void cpu_outb(pio_addr_t addr, uint8_t val) { LOG_IOPORT("outb: %04"FMT_pioaddr" %02"PRIx8"\n", addr, val);