From patchwork Fri May 15 18:33:20 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ira Snyder X-Patchwork-Id: 27276 X-Patchwork-Delegate: galak@kernel.crashing.org Return-Path: X-Original-To: patchwork-incoming@bilbo.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from ozlabs.org (ozlabs.org [203.10.76.45]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "mx.ozlabs.org", Issuer "CA Cert Signing Authority" (verified OK)) by bilbo.ozlabs.org (Postfix) with ESMTPS id 8305FB707C for ; Sat, 16 May 2009 04:34:08 +1000 (EST) Received: by ozlabs.org (Postfix) id 6E590DE1AC; Sat, 16 May 2009 04:34:08 +1000 (EST) Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [127.0.0.1]) by ozlabs.org (Postfix) with ESMTP id 69B96DE1AA for ; Sat, 16 May 2009 04:34:08 +1000 (EST) X-Original-To: linuxppc-dev@ozlabs.org Delivered-To: linuxppc-dev@ozlabs.org Received: from ovro.ovro.caltech.edu (ovro.ovro.caltech.edu [192.100.16.2]) by ozlabs.org (Postfix) with ESMTP id C6D6DDE11A for ; Sat, 16 May 2009 04:33:23 +1000 (EST) Received: from ovro.caltech.edu (desk1.correlator.pvt [192.168.17.65]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ovro.ovro.caltech.edu (Postfix) with ESMTP id B1AEE9F8006; Fri, 15 May 2009 11:33:21 -0700 (PDT) Date: Fri, 15 May 2009 11:33:20 -0700 From: Ira Snyder To: Dan Williams , Li Yang , linuxppc-dev@ozlabs.org Subject: [PATCH] fsldma: snooping is not enabled for last entry in descriptor chain Message-ID: <20090515183320.GB858@ovro.caltech.edu> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.17+20080114 (2008-01-14) X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.0 (ovro.ovro.caltech.edu); Fri, 15 May 2009 11:33:21 -0700 (PDT) X-BeenThere: linuxppc-dev@ozlabs.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@ozlabs.org On the 83xx controller, snooping is necessary for the DMA controller to ensure cache coherence with the CPU when transferring to/from RAM. The last descriptor in a chain will always have the End-of-Chain interrupt bit set, so we can set the snoop bit while adding the End-of-Chain interrupt bit. Signed-off-by: Ira W. Snyder --- While working on adding the DMA_SLAVE feature, I noticed that the last descriptor in a chain does not have the snoop bits enabled. This is easily verified by doing the following: 1) set FSL_DMA_BCR_MAX_CNT = (1 << 18) 2) #define DEBUG 1 3) #define FSL_DMA_LD_DEBUG 1 4) setup a 1MB memcpy operation The memcpy must be set up on an idle channel, and must be submitted without any other transactions. dma_async_memcpy_issue_pending() must be called without queueing any more transactions. You will see that the snoop bit (bit 4) is not set in the last descriptor. drivers/dma/fsldma.c | 9 +++++++-- 1 files changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c index 4264c98..dba0b58 100644 --- a/drivers/dma/fsldma.c +++ b/drivers/dma/fsldma.c @@ -179,9 +179,14 @@ static void dma_halt(struct fsl_dma_chan *fsl_chan) static void set_ld_eol(struct fsl_dma_chan *fsl_chan, struct fsl_desc_sw *desc) { + u64 snoop_bits; + + snoop_bits = ((fsl_chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_83XX) + ? FSL_DMA_SNEN : 0; + desc->hw.next_ln_addr = CPU_TO_DMA(fsl_chan, - DMA_TO_CPU(fsl_chan, desc->hw.next_ln_addr, 64) | FSL_DMA_EOL, - 64); + DMA_TO_CPU(fsl_chan, desc->hw.next_ln_addr, 64) | FSL_DMA_EOL + | snoop_bits, 64); } static void append_ld_queue(struct fsl_dma_chan *fsl_chan,