Patchwork [RFC,qom-cpu,17/41] cpu: Move tlb_flush_{addr, mask} fields from CPU_COMMON_TLB to CPUState

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Submitter Andreas Färber
Date Sept. 4, 2013, 9:04 a.m.
Message ID <1378285521-3230-18-git-send-email-afaerber@suse.de>
Download mbox | patch
Permalink /patch/272518/
State New
Headers show

Comments

Andreas Färber - Sept. 4, 2013, 9:04 a.m.
Change their type to vaddr but keep comparing target_ulongs for now.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 cputlb.c                | 27 ++++++++++++++-------------
 include/exec/cpu-defs.h |  2 --
 include/qom/cpu.h       |  3 +++
 3 files changed, 17 insertions(+), 15 deletions(-)

Patch

diff --git a/cputlb.c b/cputlb.c
index e8131d8..e02663c 100644
--- a/cputlb.c
+++ b/cputlb.c
@@ -74,8 +74,8 @@  void tlb_flush(CPUArchState *env, int flush_global)
 
     memset(cpu->tb_jmp_cache, 0, TB_JMP_CACHE_SIZE * sizeof(void *));
 
-    env->tlb_flush_addr = -1;
-    env->tlb_flush_mask = 0;
+    cpu->tlb_flush_addr = -1;
+    cpu->tlb_flush_mask = 0;
     tlb_flush_count++;
 }
 
@@ -101,11 +101,11 @@  void tlb_flush_page(CPUArchState *env, target_ulong addr)
     printf("tlb_flush_page: " TARGET_FMT_lx "\n", addr);
 #endif
     /* Check if we need to flush due to large pages.  */
-    if ((addr & env->tlb_flush_mask) == env->tlb_flush_addr) {
+    if ((addr & cpu->tlb_flush_mask) == cpu->tlb_flush_addr) {
 #if defined(DEBUG_TLB)
-        printf("tlb_flush_page: forced full flush ("
-               TARGET_FMT_lx "/" TARGET_FMT_lx ")\n",
-               env->tlb_flush_addr, env->tlb_flush_mask);
+        printf("tlb_flush_page: forced full flush (%"
+               VADDR_PRIx "/%" VADDR_PRIx ")\n",
+               cpu->tlb_flush_addr, cpu->tlb_flush_mask);
 #endif
         tlb_flush(env, 1);
         return;
@@ -215,22 +215,23 @@  void tlb_set_dirty(CPUArchState *env, target_ulong vaddr)
 static void tlb_add_large_page(CPUArchState *env, target_ulong vaddr,
                                target_ulong size)
 {
+    CPUState *cpu = ENV_GET_CPU(env);
     target_ulong mask = ~(size - 1);
 
-    if (env->tlb_flush_addr == (target_ulong)-1) {
-        env->tlb_flush_addr = vaddr & mask;
-        env->tlb_flush_mask = mask;
+    if ((target_ulong)cpu->tlb_flush_addr == (target_ulong)-1) {
+        cpu->tlb_flush_addr = vaddr & mask;
+        cpu->tlb_flush_mask = mask;
         return;
     }
     /* Extend the existing region to include the new page.
        This is a compromise between unnecessary flushes and the cost
        of maintaining a full variable size TLB.  */
-    mask &= env->tlb_flush_mask;
-    while (((env->tlb_flush_addr ^ vaddr) & mask) != 0) {
+    mask &= cpu->tlb_flush_mask;
+    while (((cpu->tlb_flush_addr ^ vaddr) & mask) != 0) {
         mask <<= 1;
     }
-    env->tlb_flush_addr &= mask;
-    env->tlb_flush_mask = mask;
+    cpu->tlb_flush_addr &= mask;
+    cpu->tlb_flush_mask = mask;
 }
 
 /* Add a new TLB entry. At most one entry for a given virtual address
diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h
index d090594..460f7cf 100644
--- a/include/exec/cpu-defs.h
+++ b/include/exec/cpu-defs.h
@@ -103,8 +103,6 @@  QEMU_BUILD_BUG_ON(sizeof(CPUTLBEntry) != (1 << CPU_TLB_ENTRY_BITS));
     /* The meaning of the MMU modes is defined in the target code. */   \
     CPUTLBEntry tlb_table[NB_MMU_MODES][CPU_TLB_SIZE];                  \
     hwaddr iotlb[NB_MMU_MODES][CPU_TLB_SIZE];               \
-    target_ulong tlb_flush_addr;                                        \
-    target_ulong tlb_flush_mask;
 
 #else
 
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index fc3d345..5349805 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -252,6 +252,9 @@  struct CPUState {
 
     void *opaque;
 
+    vaddr tlb_flush_addr;
+    vaddr tlb_flush_mask;
+
     /* In order to avoid passing too many arguments to the MMIO helpers,
      * we store some rarely used information in the CPU context.
      */