Patchwork [v3,02/29] tcg-aarch64: Change all ext variables to bool

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Submitter Richard Henderson
Date Sept. 2, 2013, 5:54 p.m.
Message ID <1378144503-15808-3-git-send-email-rth@twiddle.net>
Download mbox | patch
Permalink /patch/272057/
State New
Headers show

Comments

Richard Henderson - Sept. 2, 2013, 5:54 p.m.
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 tcg/aarch64/tcg-target.c | 44 ++++++++++++++++++++++----------------------
 1 file changed, 22 insertions(+), 22 deletions(-)
Claudio Fontana - Sept. 12, 2013, 8:29 a.m.
On 02.09.2013 19:54, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
>  tcg/aarch64/tcg-target.c | 44 ++++++++++++++++++++++----------------------
>  1 file changed, 22 insertions(+), 22 deletions(-)
> 
> diff --git a/tcg/aarch64/tcg-target.c b/tcg/aarch64/tcg-target.c
> index 5b067fe..bde4c72 100644
> --- a/tcg/aarch64/tcg-target.c
> +++ b/tcg/aarch64/tcg-target.c
> @@ -326,7 +326,7 @@ static inline void tcg_out_ldst_12(TCGContext *s,
>                | op_type << 20 | scaled_uimm << 10 | rn << 5 | rd);
>  }
>  
> -static inline void tcg_out_movr(TCGContext *s, int ext, TCGReg rd, TCGReg src)
> +static inline void tcg_out_movr(TCGContext *s, bool ext, TCGReg rd, TCGReg src)
>  {
>      /* register to register move using MOV (shifted register with no shift) */
>      /* using MOV 0x2a0003e0 | (shift).. */
> @@ -407,7 +407,7 @@ static inline void tcg_out_ldst(TCGContext *s, enum aarch64_ldst_op_data data,
>  }
>  
>  /* mov alias implemented with add immediate, useful to move to/from SP */
> -static inline void tcg_out_movr_sp(TCGContext *s, int ext, TCGReg rd, TCGReg rn)
> +static inline void tcg_out_movr_sp(TCGContext *s, bool ext, TCGReg rd, TCGReg rn)
>  {
>      /* using ADD 0x11000000 | (ext) | rn << 5 | rd */
>      unsigned int base = ext ? 0x91000000 : 0x11000000;
> @@ -437,7 +437,7 @@ static inline void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg,
>  }
>  
>  static inline void tcg_out_arith(TCGContext *s, enum aarch64_arith_opc opc,
> -                                 int ext, TCGReg rd, TCGReg rn, TCGReg rm,
> +                                 bool ext, TCGReg rd, TCGReg rn, TCGReg rm,
>                                   int shift_imm)
>  {
>      /* Using shifted register arithmetic operations */
> @@ -453,7 +453,7 @@ static inline void tcg_out_arith(TCGContext *s, enum aarch64_arith_opc opc,
>      tcg_out32(s, base | rm << 16 | shift | rn << 5 | rd);
>  }
>  
> -static inline void tcg_out_mul(TCGContext *s, int ext,
> +static inline void tcg_out_mul(TCGContext *s, bool ext,
>                                 TCGReg rd, TCGReg rn, TCGReg rm)
>  {
>      /* Using MADD 0x1b000000 with Ra = wzr alias MUL 0x1b007c00 */
> @@ -462,7 +462,7 @@ static inline void tcg_out_mul(TCGContext *s, int ext,
>  }
>  
>  static inline void tcg_out_shiftrot_reg(TCGContext *s,
> -                                        enum aarch64_srr_opc opc, int ext,
> +                                        enum aarch64_srr_opc opc, bool ext,
>                                          TCGReg rd, TCGReg rn, TCGReg rm)
>  {
>      /* using 2-source data processing instructions 0x1ac02000 */
> @@ -470,7 +470,7 @@ static inline void tcg_out_shiftrot_reg(TCGContext *s,
>      tcg_out32(s, base | rm << 16 | opc << 8 | rn << 5 | rd);
>  }
>  
> -static inline void tcg_out_ubfm(TCGContext *s, int ext, TCGReg rd, TCGReg rn,
> +static inline void tcg_out_ubfm(TCGContext *s, bool ext, TCGReg rd, TCGReg rn,
>                                  unsigned int a, unsigned int b)
>  {
>      /* Using UBFM 0x53000000 Wd, Wn, a, b */
> @@ -478,7 +478,7 @@ static inline void tcg_out_ubfm(TCGContext *s, int ext, TCGReg rd, TCGReg rn,
>      tcg_out32(s, base | a << 16 | b << 10 | rn << 5 | rd);
>  }
>  
> -static inline void tcg_out_sbfm(TCGContext *s, int ext, TCGReg rd, TCGReg rn,
> +static inline void tcg_out_sbfm(TCGContext *s, bool ext, TCGReg rd, TCGReg rn,
>                                  unsigned int a, unsigned int b)
>  {
>      /* Using SBFM 0x13000000 Wd, Wn, a, b */
> @@ -486,7 +486,7 @@ static inline void tcg_out_sbfm(TCGContext *s, int ext, TCGReg rd, TCGReg rn,
>      tcg_out32(s, base | a << 16 | b << 10 | rn << 5 | rd);
>  }
>  
> -static inline void tcg_out_extr(TCGContext *s, int ext, TCGReg rd,
> +static inline void tcg_out_extr(TCGContext *s, bool ext, TCGReg rd,
>                                  TCGReg rn, TCGReg rm, unsigned int a)
>  {
>      /* Using EXTR 0x13800000 Wd, Wn, Wm, a */
> @@ -494,7 +494,7 @@ static inline void tcg_out_extr(TCGContext *s, int ext, TCGReg rd,
>      tcg_out32(s, base | rm << 16 | a << 10 | rn << 5 | rd);
>  }
>  
> -static inline void tcg_out_shl(TCGContext *s, int ext,
> +static inline void tcg_out_shl(TCGContext *s, bool ext,
>                                 TCGReg rd, TCGReg rn, unsigned int m)
>  {
>      int bits, max;
> @@ -503,28 +503,28 @@ static inline void tcg_out_shl(TCGContext *s, int ext,
>      tcg_out_ubfm(s, ext, rd, rn, bits - (m & max), max - (m & max));
>  }
>  
> -static inline void tcg_out_shr(TCGContext *s, int ext,
> +static inline void tcg_out_shr(TCGContext *s, bool ext,
>                                 TCGReg rd, TCGReg rn, unsigned int m)
>  {
>      int max = ext ? 63 : 31;
>      tcg_out_ubfm(s, ext, rd, rn, m & max, max);
>  }
>  
> -static inline void tcg_out_sar(TCGContext *s, int ext,
> +static inline void tcg_out_sar(TCGContext *s, bool ext,
>                                 TCGReg rd, TCGReg rn, unsigned int m)
>  {
>      int max = ext ? 63 : 31;
>      tcg_out_sbfm(s, ext, rd, rn, m & max, max);
>  }
>  
> -static inline void tcg_out_rotr(TCGContext *s, int ext,
> +static inline void tcg_out_rotr(TCGContext *s, bool ext,
>                                  TCGReg rd, TCGReg rn, unsigned int m)
>  {
>      int max = ext ? 63 : 31;
>      tcg_out_extr(s, ext, rd, rn, rn, m & max);
>  }
>  
> -static inline void tcg_out_rotl(TCGContext *s, int ext,
> +static inline void tcg_out_rotl(TCGContext *s, bool ext,
>                                  TCGReg rd, TCGReg rn, unsigned int m)
>  {
>      int bits, max;
> @@ -533,14 +533,14 @@ static inline void tcg_out_rotl(TCGContext *s, int ext,
>      tcg_out_extr(s, ext, rd, rn, rn, bits - (m & max));
>  }
>  
> -static inline void tcg_out_cmp(TCGContext *s, int ext, TCGReg rn, TCGReg rm,
> +static inline void tcg_out_cmp(TCGContext *s, bool ext, TCGReg rn, TCGReg rm,
>                                 int shift_imm)
>  {
>      /* Using CMP alias SUBS wzr, Wn, Wm */
>      tcg_out_arith(s, ARITH_SUBS, ext, TCG_REG_XZR, rn, rm, shift_imm);
>  }
>  
> -static inline void tcg_out_cset(TCGContext *s, int ext, TCGReg rd, TCGCond c)
> +static inline void tcg_out_cset(TCGContext *s, bool ext, TCGReg rd, TCGCond c)

I see the problem related to the previous patch.
What about continuing to use int in the previous patch,
and replace it with bool in this one? The previous patch would only target the way ext is set,
and this one would really contain all bool changes.

>  {
>      /* Using CSET alias of CSINC 0x1a800400 Xd, XZR, XZR, invert(cond) */
>      unsigned int base = ext ? 0x9a9f07e0 : 0x1a9f07e0;
> @@ -637,7 +637,7 @@ aarch64_limm(unsigned int m, unsigned int r)
>     to test a 32bit reg against 0xff000000, pass M = 8,  R = 8.
>     to test a 32bit reg against 0xff0000ff, pass M = 16, R = 8.
>   */
> -static inline void tcg_out_tst(TCGContext *s, int ext, TCGReg rn,
> +static inline void tcg_out_tst(TCGContext *s, bool ext, TCGReg rn,
>                                 unsigned int m, unsigned int r)
>  {
>      /* using TST alias of ANDS XZR, Xn,#bimm64 0x7200001f */
> @@ -646,7 +646,7 @@ static inline void tcg_out_tst(TCGContext *s, int ext, TCGReg rn,
>  }
>  
>  /* and a register with a bit pattern, similarly to TST, no flags change */
> -static inline void tcg_out_andi(TCGContext *s, int ext, TCGReg rd, TCGReg rn,
> +static inline void tcg_out_andi(TCGContext *s, bool ext, TCGReg rd, TCGReg rn,
>                                  unsigned int m, unsigned int r)
>  {
>      /* using AND 0x12000000 */
> @@ -700,21 +700,21 @@ static inline void tcg_out_goto_label_cond(TCGContext *s,
>      }
>  }
>  
> -static inline void tcg_out_rev(TCGContext *s, int ext, TCGReg rd, TCGReg rm)
> +static inline void tcg_out_rev(TCGContext *s, bool ext, TCGReg rd, TCGReg rm)
>  {
>      /* using REV 0x5ac00800 */
>      unsigned int base = ext ? 0xdac00c00 : 0x5ac00800;
>      tcg_out32(s, base | rm << 5 | rd);
>  }
>  
> -static inline void tcg_out_rev16(TCGContext *s, int ext, TCGReg rd, TCGReg rm)
> +static inline void tcg_out_rev16(TCGContext *s, bool ext, TCGReg rd, TCGReg rm)
>  {
>      /* using REV16 0x5ac00400 */
>      unsigned int base = ext ? 0xdac00400 : 0x5ac00400;
>      tcg_out32(s, base | rm << 5 | rd);
>  }
>  
> -static inline void tcg_out_sxt(TCGContext *s, int ext, int s_bits,
> +static inline void tcg_out_sxt(TCGContext *s, bool ext, int s_bits,
>                                 TCGReg rd, TCGReg rn)
>  {
>      /* using ALIASes SXTB 0x13001c00, SXTH 0x13003c00, SXTW 0x93407c00
> @@ -732,7 +732,7 @@ static inline void tcg_out_uxt(TCGContext *s, int s_bits,
>      tcg_out_ubfm(s, 0, rd, rn, 0, bits);
>  }
>  
> -static inline void tcg_out_addi(TCGContext *s, int ext,
> +static inline void tcg_out_addi(TCGContext *s, bool ext,
>                                  TCGReg rd, TCGReg rn, unsigned int aimm)
>  {
>      /* add immediate aimm unsigned 12bit value (with LSL 0 or 12) */
> @@ -752,7 +752,7 @@ static inline void tcg_out_addi(TCGContext *s, int ext,
>      tcg_out32(s, base | aimm | (rn << 5) | rd);
>  }
>  
> -static inline void tcg_out_subi(TCGContext *s, int ext,
> +static inline void tcg_out_subi(TCGContext *s, bool ext,
>                                  TCGReg rd, TCGReg rn, unsigned int aimm)
>  {
>      /* sub immediate aimm unsigned 12bit value (with LSL 0 or 12) */
> 

C.
Richard Henderson - Sept. 12, 2013, 1:45 p.m.
On 09/12/2013 01:29 AM, Claudio Fontana wrote:
> I see the problem related to the previous patch.
> What about continuing to use int in the previous patch,
> and replace it with bool in this one? The previous patch would only target the way ext is set,
> and this one would really contain all bool changes.

For the next edition, I'm planning to swap the order of the first two
patches, and also quit using bool.

I think TCGType is a bit more descriptive here, and also uses the
same 0/1 values that we want.  I added a QEMU_BUILD_BUG_ON to assert
that the enum values don't change.



r~

Patch

diff --git a/tcg/aarch64/tcg-target.c b/tcg/aarch64/tcg-target.c
index 5b067fe..bde4c72 100644
--- a/tcg/aarch64/tcg-target.c
+++ b/tcg/aarch64/tcg-target.c
@@ -326,7 +326,7 @@  static inline void tcg_out_ldst_12(TCGContext *s,
               | op_type << 20 | scaled_uimm << 10 | rn << 5 | rd);
 }
 
-static inline void tcg_out_movr(TCGContext *s, int ext, TCGReg rd, TCGReg src)
+static inline void tcg_out_movr(TCGContext *s, bool ext, TCGReg rd, TCGReg src)
 {
     /* register to register move using MOV (shifted register with no shift) */
     /* using MOV 0x2a0003e0 | (shift).. */
@@ -407,7 +407,7 @@  static inline void tcg_out_ldst(TCGContext *s, enum aarch64_ldst_op_data data,
 }
 
 /* mov alias implemented with add immediate, useful to move to/from SP */
-static inline void tcg_out_movr_sp(TCGContext *s, int ext, TCGReg rd, TCGReg rn)
+static inline void tcg_out_movr_sp(TCGContext *s, bool ext, TCGReg rd, TCGReg rn)
 {
     /* using ADD 0x11000000 | (ext) | rn << 5 | rd */
     unsigned int base = ext ? 0x91000000 : 0x11000000;
@@ -437,7 +437,7 @@  static inline void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg,
 }
 
 static inline void tcg_out_arith(TCGContext *s, enum aarch64_arith_opc opc,
-                                 int ext, TCGReg rd, TCGReg rn, TCGReg rm,
+                                 bool ext, TCGReg rd, TCGReg rn, TCGReg rm,
                                  int shift_imm)
 {
     /* Using shifted register arithmetic operations */
@@ -453,7 +453,7 @@  static inline void tcg_out_arith(TCGContext *s, enum aarch64_arith_opc opc,
     tcg_out32(s, base | rm << 16 | shift | rn << 5 | rd);
 }
 
-static inline void tcg_out_mul(TCGContext *s, int ext,
+static inline void tcg_out_mul(TCGContext *s, bool ext,
                                TCGReg rd, TCGReg rn, TCGReg rm)
 {
     /* Using MADD 0x1b000000 with Ra = wzr alias MUL 0x1b007c00 */
@@ -462,7 +462,7 @@  static inline void tcg_out_mul(TCGContext *s, int ext,
 }
 
 static inline void tcg_out_shiftrot_reg(TCGContext *s,
-                                        enum aarch64_srr_opc opc, int ext,
+                                        enum aarch64_srr_opc opc, bool ext,
                                         TCGReg rd, TCGReg rn, TCGReg rm)
 {
     /* using 2-source data processing instructions 0x1ac02000 */
@@ -470,7 +470,7 @@  static inline void tcg_out_shiftrot_reg(TCGContext *s,
     tcg_out32(s, base | rm << 16 | opc << 8 | rn << 5 | rd);
 }
 
-static inline void tcg_out_ubfm(TCGContext *s, int ext, TCGReg rd, TCGReg rn,
+static inline void tcg_out_ubfm(TCGContext *s, bool ext, TCGReg rd, TCGReg rn,
                                 unsigned int a, unsigned int b)
 {
     /* Using UBFM 0x53000000 Wd, Wn, a, b */
@@ -478,7 +478,7 @@  static inline void tcg_out_ubfm(TCGContext *s, int ext, TCGReg rd, TCGReg rn,
     tcg_out32(s, base | a << 16 | b << 10 | rn << 5 | rd);
 }
 
-static inline void tcg_out_sbfm(TCGContext *s, int ext, TCGReg rd, TCGReg rn,
+static inline void tcg_out_sbfm(TCGContext *s, bool ext, TCGReg rd, TCGReg rn,
                                 unsigned int a, unsigned int b)
 {
     /* Using SBFM 0x13000000 Wd, Wn, a, b */
@@ -486,7 +486,7 @@  static inline void tcg_out_sbfm(TCGContext *s, int ext, TCGReg rd, TCGReg rn,
     tcg_out32(s, base | a << 16 | b << 10 | rn << 5 | rd);
 }
 
-static inline void tcg_out_extr(TCGContext *s, int ext, TCGReg rd,
+static inline void tcg_out_extr(TCGContext *s, bool ext, TCGReg rd,
                                 TCGReg rn, TCGReg rm, unsigned int a)
 {
     /* Using EXTR 0x13800000 Wd, Wn, Wm, a */
@@ -494,7 +494,7 @@  static inline void tcg_out_extr(TCGContext *s, int ext, TCGReg rd,
     tcg_out32(s, base | rm << 16 | a << 10 | rn << 5 | rd);
 }
 
-static inline void tcg_out_shl(TCGContext *s, int ext,
+static inline void tcg_out_shl(TCGContext *s, bool ext,
                                TCGReg rd, TCGReg rn, unsigned int m)
 {
     int bits, max;
@@ -503,28 +503,28 @@  static inline void tcg_out_shl(TCGContext *s, int ext,
     tcg_out_ubfm(s, ext, rd, rn, bits - (m & max), max - (m & max));
 }
 
-static inline void tcg_out_shr(TCGContext *s, int ext,
+static inline void tcg_out_shr(TCGContext *s, bool ext,
                                TCGReg rd, TCGReg rn, unsigned int m)
 {
     int max = ext ? 63 : 31;
     tcg_out_ubfm(s, ext, rd, rn, m & max, max);
 }
 
-static inline void tcg_out_sar(TCGContext *s, int ext,
+static inline void tcg_out_sar(TCGContext *s, bool ext,
                                TCGReg rd, TCGReg rn, unsigned int m)
 {
     int max = ext ? 63 : 31;
     tcg_out_sbfm(s, ext, rd, rn, m & max, max);
 }
 
-static inline void tcg_out_rotr(TCGContext *s, int ext,
+static inline void tcg_out_rotr(TCGContext *s, bool ext,
                                 TCGReg rd, TCGReg rn, unsigned int m)
 {
     int max = ext ? 63 : 31;
     tcg_out_extr(s, ext, rd, rn, rn, m & max);
 }
 
-static inline void tcg_out_rotl(TCGContext *s, int ext,
+static inline void tcg_out_rotl(TCGContext *s, bool ext,
                                 TCGReg rd, TCGReg rn, unsigned int m)
 {
     int bits, max;
@@ -533,14 +533,14 @@  static inline void tcg_out_rotl(TCGContext *s, int ext,
     tcg_out_extr(s, ext, rd, rn, rn, bits - (m & max));
 }
 
-static inline void tcg_out_cmp(TCGContext *s, int ext, TCGReg rn, TCGReg rm,
+static inline void tcg_out_cmp(TCGContext *s, bool ext, TCGReg rn, TCGReg rm,
                                int shift_imm)
 {
     /* Using CMP alias SUBS wzr, Wn, Wm */
     tcg_out_arith(s, ARITH_SUBS, ext, TCG_REG_XZR, rn, rm, shift_imm);
 }
 
-static inline void tcg_out_cset(TCGContext *s, int ext, TCGReg rd, TCGCond c)
+static inline void tcg_out_cset(TCGContext *s, bool ext, TCGReg rd, TCGCond c)
 {
     /* Using CSET alias of CSINC 0x1a800400 Xd, XZR, XZR, invert(cond) */
     unsigned int base = ext ? 0x9a9f07e0 : 0x1a9f07e0;
@@ -637,7 +637,7 @@  aarch64_limm(unsigned int m, unsigned int r)
    to test a 32bit reg against 0xff000000, pass M = 8,  R = 8.
    to test a 32bit reg against 0xff0000ff, pass M = 16, R = 8.
  */
-static inline void tcg_out_tst(TCGContext *s, int ext, TCGReg rn,
+static inline void tcg_out_tst(TCGContext *s, bool ext, TCGReg rn,
                                unsigned int m, unsigned int r)
 {
     /* using TST alias of ANDS XZR, Xn,#bimm64 0x7200001f */
@@ -646,7 +646,7 @@  static inline void tcg_out_tst(TCGContext *s, int ext, TCGReg rn,
 }
 
 /* and a register with a bit pattern, similarly to TST, no flags change */
-static inline void tcg_out_andi(TCGContext *s, int ext, TCGReg rd, TCGReg rn,
+static inline void tcg_out_andi(TCGContext *s, bool ext, TCGReg rd, TCGReg rn,
                                 unsigned int m, unsigned int r)
 {
     /* using AND 0x12000000 */
@@ -700,21 +700,21 @@  static inline void tcg_out_goto_label_cond(TCGContext *s,
     }
 }
 
-static inline void tcg_out_rev(TCGContext *s, int ext, TCGReg rd, TCGReg rm)
+static inline void tcg_out_rev(TCGContext *s, bool ext, TCGReg rd, TCGReg rm)
 {
     /* using REV 0x5ac00800 */
     unsigned int base = ext ? 0xdac00c00 : 0x5ac00800;
     tcg_out32(s, base | rm << 5 | rd);
 }
 
-static inline void tcg_out_rev16(TCGContext *s, int ext, TCGReg rd, TCGReg rm)
+static inline void tcg_out_rev16(TCGContext *s, bool ext, TCGReg rd, TCGReg rm)
 {
     /* using REV16 0x5ac00400 */
     unsigned int base = ext ? 0xdac00400 : 0x5ac00400;
     tcg_out32(s, base | rm << 5 | rd);
 }
 
-static inline void tcg_out_sxt(TCGContext *s, int ext, int s_bits,
+static inline void tcg_out_sxt(TCGContext *s, bool ext, int s_bits,
                                TCGReg rd, TCGReg rn)
 {
     /* using ALIASes SXTB 0x13001c00, SXTH 0x13003c00, SXTW 0x93407c00
@@ -732,7 +732,7 @@  static inline void tcg_out_uxt(TCGContext *s, int s_bits,
     tcg_out_ubfm(s, 0, rd, rn, 0, bits);
 }
 
-static inline void tcg_out_addi(TCGContext *s, int ext,
+static inline void tcg_out_addi(TCGContext *s, bool ext,
                                 TCGReg rd, TCGReg rn, unsigned int aimm)
 {
     /* add immediate aimm unsigned 12bit value (with LSL 0 or 12) */
@@ -752,7 +752,7 @@  static inline void tcg_out_addi(TCGContext *s, int ext,
     tcg_out32(s, base | aimm | (rn << 5) | rd);
 }
 
-static inline void tcg_out_subi(TCGContext *s, int ext,
+static inline void tcg_out_subi(TCGContext *s, bool ext,
                                 TCGReg rd, TCGReg rn, unsigned int aimm)
 {
     /* sub immediate aimm unsigned 12bit value (with LSL 0 or 12) */