From patchwork Mon Sep 2 17:54:51 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 272031 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id CCB162C009E for ; Tue, 3 Sep 2013 04:04:25 +1000 (EST) Received: from localhost ([::1]:41439 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VGYUB-0008QF-V0 for incoming@patchwork.ozlabs.org; Mon, 02 Sep 2013 14:04:23 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56755) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VGYLo-000636-Aj for qemu-devel@nongnu.org; Mon, 02 Sep 2013 13:55:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VGYLi-0001BB-Eu for qemu-devel@nongnu.org; Mon, 02 Sep 2013 13:55:44 -0400 Received: from mail-pb0-x233.google.com ([2607:f8b0:400e:c01::233]:54523) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VGYLh-0001Au-Kk for qemu-devel@nongnu.org; Mon, 02 Sep 2013 13:55:38 -0400 Received: by mail-pb0-f51.google.com with SMTP id jt11so4963463pbb.38 for ; Mon, 02 Sep 2013 10:55:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=q65UQtfJC8bn9CNctLvDo1E1L8VE/IeUQxc7cH+tGYA=; b=Ds7tw3XS6R4ITRzjgqG0Xlqll7zw/QP0EYZkgXQipl4kPEZ6sFY0hX8QNC1QhNRY9e gJQG2/K/Ey12VGWaoITxyD6aHI61kTdvUxOlqilPJGn29pXMl2DPdxMs3al84IPMjq5g XmaJA7T7gKYctRqCt2jrh46Ou2Lmot2OC0JHzh57prYdw8TZnZWrw4DOyZE1d+i0/mWA /szteqlajBsLkN5CeCwRXNPJCS5FY+5R7oOH/py38nVpUVhSFhPDY6rN4gKWZVYLX0jH kxzfGe+5M6E7LGvgl+v7Q4dbvebBWL+ojSFJlpW3ikb9Fq33UXZwdr3z3DP6D0HUjQpj YBfA== X-Received: by 10.68.48.166 with SMTP id m6mr26609546pbn.105.1378144536603; Mon, 02 Sep 2013 10:55:36 -0700 (PDT) Received: from pebble.twiddle.net (50-194-63-110-static.hfc.comcastbusiness.net. [50.194.63.110]) by mx.google.com with ESMTPSA id tr10sm17218114pbc.22.1969.12.31.16.00.00 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 02 Sep 2013 10:55:35 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Mon, 2 Sep 2013 10:54:51 -0700 Message-Id: <1378144503-15808-18-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1378144503-15808-1-git-send-email-rth@twiddle.net> References: <1378144503-15808-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c01::233 Cc: claudio.fontana@huawei.com, Richard Henderson Subject: [Qemu-devel] [PATCH v3 17/29] tcg-aarch64: Support muluh, mulsh X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.c | 12 ++++++++++++ tcg/aarch64/tcg-target.h | 4 ++-- 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/tcg/aarch64/tcg-target.c b/tcg/aarch64/tcg-target.c index 0587765..5ab0596 100644 --- a/tcg/aarch64/tcg-target.c +++ b/tcg/aarch64/tcg-target.c @@ -295,6 +295,8 @@ typedef enum { INSN_LSRV = 0x1ac02400, INSN_ASRV = 0x1ac02800, INSN_RORV = 0x1ac02c00, + INSN_SMULH = 0x9b407c00, + INSN_UMULH = 0x9bc07c00, /* Bitfield instructions */ INSN_BFM = 0x33000000, @@ -1576,6 +1578,13 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, args[5], const_args[4], const_args[5], c2); break; + case INDEX_op_muluh_i64: + tcg_fmt_Rdnm(s, INSN_UMULH, 1, a0, a1, a2); + break; + case INDEX_op_mulsh_i64: + tcg_fmt_Rdnm(s, INSN_SMULH, 1, a0, a1, a2); + break; + case INDEX_op_mov_i64: case INDEX_op_mov_i32: case INDEX_op_movi_i64: @@ -1703,6 +1712,9 @@ static const TCGTargetOpDef aarch64_op_defs[] = { { INDEX_op_sub2_i32, { "r", "r", "rZ", "rZ", "rwA", "rwMZ" } }, { INDEX_op_sub2_i64, { "r", "r", "rZ", "rZ", "rA", "rMZ" } }, + { INDEX_op_muluh_i64, { "r", "r", "r" } }, + { INDEX_op_mulsh_i64, { "r", "r", "r" } }, + { -1 }, }; diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h index 05e43e4..8fd6771 100644 --- a/tcg/aarch64/tcg-target.h +++ b/tcg/aarch64/tcg-target.h @@ -89,8 +89,8 @@ typedef enum { #define TCG_TARGET_HAS_sub2_i64 1 #define TCG_TARGET_HAS_mulu2_i64 0 #define TCG_TARGET_HAS_muls2_i64 0 -#define TCG_TARGET_HAS_muluh_i64 0 -#define TCG_TARGET_HAS_mulsh_i64 0 +#define TCG_TARGET_HAS_muluh_i64 1 +#define TCG_TARGET_HAS_mulsh_i64 1 enum { TCG_AREG0 = TCG_REG_X19,