Patchwork [U-Boot] powerpc:c29xpcie: make ifc timing parameter flexible

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Submitter Po Liu
Date Aug. 21, 2013, 6:22 a.m.
Message ID <1377066138-16257-1-git-send-email-Po.Liu@freescale.com>
Download mbox | patch
Permalink /patch/268703/
State Accepted
Delegated to: York Sun
Headers show

Comments

Po Liu - Aug. 21, 2013, 6:22 a.m.
This patch re-config the NOR flash timing parameters which could make
the ifc timing more flexible for NOR flash.
The new parameters could fix the problem of hanging at "Flash:"
occasionally when booting the board.

Signed-off-by: Po Liu <Po.Liu@freescale.com>
---
 include/configs/C29XPCIE.h | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)
York Sun - Sept. 27, 2013, 5:53 p.m.
On 08/20/2013 11:22 PM, Po Liu wrote:
> This patch re-config the NOR flash timing parameters which could make
> the ifc timing more flexible for NOR flash.
> The new parameters could fix the problem of hanging at "Flash:"
> occasionally when booting the board.
> 
> Signed-off-by: Po Liu <Po.Liu@freescale.com>
> ---

Applied to u-boot-mpc85xx/next, pending merging to u-boot-mpc85xx/master
branch.

York

Patch

diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index 83779ef..cce2288 100644
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -154,14 +154,16 @@ 
 				CSPR_V)
 #define CONFIG_SYS_NOR_AMASK	IFC_AMASK(64*1024*1024)
 #define CONFIG_SYS_NOR_CSOR	CSOR_NOR_ADM_SHIFT(4)
+
 #define CONFIG_SYS_NOR_FTIM0	(FTIM0_NOR_TACSE(0x4) | \
 				FTIM0_NOR_TEADC(0x5) | \
 				FTIM0_NOR_TEAHC(0x5))
-#define CONFIG_SYS_NOR_FTIM1	(FTIM1_NOR_TACO(0x1e) | \
-				FTIM1_NOR_TRAD_NOR(0x0f) | \
-				FTIM1_NOR_TSEQRAD_NOR(0x0f))
+#define CONFIG_SYS_NOR_FTIM1	(FTIM1_NOR_TACO(0x35) | \
+				FTIM1_NOR_TRAD_NOR(0x1A) |\
+				FTIM1_NOR_TSEQRAD_NOR(0x13))
 #define CONFIG_SYS_NOR_FTIM2	(FTIM2_NOR_TCS(0x4) | \
 				FTIM2_NOR_TCH(0x4) | \
+				FTIM2_NOR_TWPH(0x0E) | \
 				FTIM2_NOR_TWP(0x1c))
 #define CONFIG_SYS_NOR_FTIM3	0x0