Patchwork [v2] mtd: m25p80: add support for PMC SPI flash

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Submitter Luka Perkov
Date Aug. 17, 2013, 11:44 p.m.
Message ID <1376783055-18370-1-git-send-email-luka@openwrt.org>
Download mbox | patch
Permalink /patch/268019/
State New
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Comments

Luka Perkov - Aug. 17, 2013, 11:44 p.m.
From: Michel Stempin <michel.stempin@wanadoo.fr>

This patch adds support for PMC (now Chingis, part of ISSI) Pm25LV512 (512
kBbit), Pm25LV010 (1 Mbit) and Pm25LQ032 (32 Mbit) SPI flash.

Two generations of PMC SPI flash chips are addressed:

1) Pm25LV512 and Pm25LV010 - These have 4KB sectors and 32KB blocks. The 4KB
sector erase uses a non-standard opcode (0xd7). They do not support JEDEC RDID
(0x9f), and so they can only be detected by matching their name string with
pre-configured platform data. Because of the cascaded acquisitions, the
datasheet is no longer available on the current manufacturer's website,
although it is still commonly used in some recent wireless routers [1]. Only
public datasheet available seems to be on GeoCities [2].

2) Pm25LQ032 - A newer generation flash, with 4KB sectors and 32KB blocks. It
uses the standard erase and JEDEC read-ID opcodes. Manufacturer's datasheet is
available [3].

[1] https://forum.openwrt.org/viewtopic.php?pid=186360#p186360
[2] http://www.geocities.jp/scottle556/pdf/Pm25LV512-010.pdf
[3] http://www.chingistek.com/img/Product_Files/Pm25LQ032C%20datasheet%20v1.6.1.pdf

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Michel Stempin <michel.stempin@wanadoo.fr>
CC: Brian Norris <computersforpeace@gmail.com>
CC: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
---

Changes in v2:
 - style and documentation improvements

 drivers/mtd/devices/m25p80.c | 10 ++++++++++
 1 file changed, 10 insertions(+)
Brian Norris - Aug. 21, 2013, 9:12 a.m.
Hi Luka,

I just noticed this version of Michel's patch (it was filtered to my
spam for some reason). I pushed Michel's version, but Marek and we are
still discussing it. If it comes down to changing anything, perhaps i
can update with your minor changes. But I will leave them out for now.

Thanks,
Brian

On Sat, Aug 17, 2013 at 4:44 PM, Luka Perkov <luka@openwrt.org> wrote:
> From: Michel Stempin <michel.stempin@wanadoo.fr>
>
> This patch adds support for PMC (now Chingis, part of ISSI) Pm25LV512 (512
> kBbit), Pm25LV010 (1 Mbit) and Pm25LQ032 (32 Mbit) SPI flash.
>
> Two generations of PMC SPI flash chips are addressed:
>
> 1) Pm25LV512 and Pm25LV010 - These have 4KB sectors and 32KB blocks. The 4KB
> sector erase uses a non-standard opcode (0xd7). They do not support JEDEC RDID
> (0x9f), and so they can only be detected by matching their name string with
> pre-configured platform data. Because of the cascaded acquisitions, the
> datasheet is no longer available on the current manufacturer's website,
> although it is still commonly used in some recent wireless routers [1]. Only
> public datasheet available seems to be on GeoCities [2].
>
> 2) Pm25LQ032 - A newer generation flash, with 4KB sectors and 32KB blocks. It
> uses the standard erase and JEDEC read-ID opcodes. Manufacturer's datasheet is
> available [3].
>
> [1] https://forum.openwrt.org/viewtopic.php?pid=186360#p186360
> [2] http://www.geocities.jp/scottle556/pdf/Pm25LV512-010.pdf
> [3] http://www.chingistek.com/img/Product_Files/Pm25LQ032C%20datasheet%20v1.6.1.pdf
>
> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
> Signed-off-by: Michel Stempin <michel.stempin@wanadoo.fr>
> CC: Brian Norris <computersforpeace@gmail.com>
> CC: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
> ---
>
> Changes in v2:
>  - style and documentation improvements
>
>  drivers/mtd/devices/m25p80.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
>
> diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
> index 2f3d2a5..4d45ce4 100644
> --- a/drivers/mtd/devices/m25p80.c
> +++ b/drivers/mtd/devices/m25p80.c
> @@ -45,6 +45,7 @@
>  #define        OPCODE_BE_4K            0x20    /* Erase 4KiB block */
>  #define        OPCODE_BE_32K           0x52    /* Erase 32KiB block */
>  #define        OPCODE_CHIP_ERASE       0xc7    /* Erase whole flash chip */
> +#define        OPCODE_BE_4K_PMC        0xd7    /* Erase 4KiB block on PMC chips*/
>  #define        OPCODE_SE               0xd8    /* Sector erase (usually 64KiB) */
>  #define        OPCODE_RDID             0x9f    /* Read JEDEC ID */
>
> @@ -682,6 +683,7 @@ struct flash_info {
>  #define        SECT_4K         0x01            /* OPCODE_BE_4K works uniformly */
>  #define        M25P_NO_ERASE   0x02            /* No erase command needed */
>  #define        SST_WRITE       0x04            /* use SST byte programming */
> +#define        SECT_4K_PMC     0x08            /* OPCODE_BE_4K_PMC works uniformly */
>  };
>
>  #define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags)     \
> @@ -762,6 +764,11 @@ static const struct spi_device_id m25p_ids[] = {
>         { "n25q128a13",  INFO(0x20ba18, 0, 64 * 1024, 256, 0) },
>         { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K) },
>
> +       /* PMC -- pm25x "blocks" are 32K, sectors are 4K */
> +       { "pm25lv512", INFO(0, 0, 32 * 1024, 2, SECT_4K_PMC) },
> +       { "pm25lv010", INFO(0, 0, 32 * 1024, 4, SECT_4K_PMC) },
> +       { "pm25lq032", INFO(0x7F9D46, 0, 64 * 1024,  64, SECT_4K) },
> +
>         /* Spansion -- single (large) sector size only, at least
>          * for the chips listed here (without boot sectors).
>          */
> @@ -1014,6 +1021,9 @@ static int m25p_probe(struct spi_device *spi)
>         if (info->flags & SECT_4K) {
>                 flash->erase_opcode = OPCODE_BE_4K;
>                 flash->mtd.erasesize = 4096;
> +       } else if (info->flags & SECT_4K_PMC) {
> +               flash->erase_opcode = OPCODE_BE_4K_PMC;
> +               flash->mtd.erasesize = 4096;
>         } else {
>                 flash->erase_opcode = OPCODE_SE;
>                 flash->mtd.erasesize = info->sector_size;
> --
> 1.8.3.4
Luka Perkov - Aug. 21, 2013, 10:03 a.m.
Hi Brian,

On Wed, Aug 21, 2013 at 02:12:42AM -0700, Brian Norris wrote:
> I just noticed this version of Michel's patch (it was filtered to my
> spam for some reason). I pushed Michel's version,

Ok, I have only changed commit message.

> but Marek and we are still discussing it. If it comes down to changing
> anything, perhaps i can update with your minor changes. But I will leave them
> out for now.

Let me know if you need anything.

Luka
David Woodhouse - Aug. 30, 2013, 8:50 p.m.
On Wed, 2013-08-21 at 12:03 +0200, Luka Perkov wrote:
> 
> On Wed, Aug 21, 2013 at 02:12:42AM -0700, Brian Norris wrote:
> > I just noticed this version of Michel's patch (it was filtered to my
> > spam for some reason). I pushed Michel's version,
> 
> Ok, I have only changed commit message.

And I'm going to change it a little more to make it make sense, I think.
Can someone confirm the accuracy of the following (fixing non-standard
terms, and also I think fixing the comment about Pm25LQ032 block size):

-commit ac36246d7c8684128c5879219c3178838983fbd0
+commit ab50c34679ca03929fbc313da378b4f934e706ea
 Author: Michel Stempin <michel.stempin@wanadoo.fr>
 Date:   Mon Jul 15 12:13:56 2013 +0200
 
     mtd: chips: Add support for PMC SPI Flash chips in m25p80.c
     
-    Add support for PMC (now Chingis, part of ISSI) Pm25LV512 (512 kBbit),
-    Pm25LV010 (1 Mbit) and Pm25LQ032 (32 Mbit) SPI Flash chips.
+    Add support for PMC (now Chingis, part of ISSI) Pm25LV512 (512 Kib),
+    Pm25LV010 (1 Mib) and Pm25LQ032 (32 Mib) SPI Flash chips.
     
     This patch addresses two generations of PMC SPI Flash chips:
     
-     - Pm25LV512 and Pm25LV010: these have 4KB sectors and 32KB
-       blocks. The 4KB sector erase uses a non-standard opcode
+     - Pm25LV512 and Pm25LV010: these have 4KiB sectors and 32KiB
+       blocks. The 4KiB sector erase uses a non-standard opcode
        (0xd7). They do not support JEDEC RDID (0x9f), and so they can only
        be detected by matching their name string with pre-configured
        platform data. Because of the cascaded acquisitions, the datasheet
@@ -20,7 +20,7 @@ Date:   Mon Jul 15 12:13:56 2013 +0200
        only public datasheet available seems to be on GeoCities:
        <http://www.geocities.jp/scottle556/pdf/Pm25LV512-010.pdf>
     
-     - Pm25LQ032: a newer generation flash, with 4KB sectors and 32KB
+     - Pm25LQ032: a newer generation flash, with 4KiB sectors and 64KiB
        blocks. It uses the standard erase and JEDEC read-ID
        opcodes. Manufacturer's datasheet is here:
        <http://www.chingistek.com/img/Product_Files/Pm25LQ032C%20datasheet%20v1.6.1.pdf>
@@ -46,6 +46,7 @@ Date:   Mon Jul 15 12:13:56 2013 +0200
     Signed-off-by: Michel Stempin <michel.stempin@wanadoo.fr>
     [Brian: fixed conflict]
     Signed-off-by: Brian Norris <computersforpeace@gmail.com>
+    Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Michel Stempin - Aug. 30, 2013, 9:11 p.m.
Le 30/08/2013 22:50, David Woodhouse a écrit :
> On Wed, 2013-08-21 at 12:03 +0200, Luka Perkov wrote:
>>
>> On Wed, Aug 21, 2013 at 02:12:42AM -0700, Brian Norris wrote:
>>> I just noticed this version of Michel's patch (it was filtered to my
>>> spam for some reason). I pushed Michel's version,
>>
>> Ok, I have only changed commit message.
> 
> And I'm going to change it a little more to make it make sense, I think.
> Can someone confirm the accuracy of the following (fixing non-standard
> terms, and also I think fixing the comment about Pm25LQ032 block size):

I can't get used to these IEC prefixes vs. the customary ones, but you are right,
this is the international standard.

> 
> -commit ac36246d7c8684128c5879219c3178838983fbd0
> +commit ab50c34679ca03929fbc313da378b4f934e706ea
>  Author: Michel Stempin <michel.stempin@wanadoo.fr>
>  Date:   Mon Jul 15 12:13:56 2013 +0200
>  
>      mtd: chips: Add support for PMC SPI Flash chips in m25p80.c
>      
> -    Add support for PMC (now Chingis, part of ISSI) Pm25LV512 (512 kBbit),
> -    Pm25LV010 (1 Mbit) and Pm25LQ032 (32 Mbit) SPI Flash chips.
> +    Add support for PMC (now Chingis, part of ISSI) Pm25LV512 (512 Kib),
> +    Pm25LV010 (1 Mib) and Pm25LQ032 (32 Mib) SPI Flash chips.
>      
>      This patch addresses two generations of PMC SPI Flash chips:
>      
> -     - Pm25LV512 and Pm25LV010: these have 4KB sectors and 32KB
> -       blocks. The 4KB sector erase uses a non-standard opcode
> +     - Pm25LV512 and Pm25LV010: these have 4KiB sectors and 32KiB
> +       blocks. The 4KiB sector erase uses a non-standard opcode
>         (0xd7). They do not support JEDEC RDID (0x9f), and so they can only
>         be detected by matching their name string with pre-configured
>         platform data. Because of the cascaded acquisitions, the datasheet
> @@ -20,7 +20,7 @@ Date:   Mon Jul 15 12:13:56 2013 +0200
>         only public datasheet available seems to be on GeoCities:
>         <http://www.geocities.jp/scottle556/pdf/Pm25LV512-010.pdf>
>      
> -     - Pm25LQ032: a newer generation flash, with 4KB sectors and 32KB
> +     - Pm25LQ032: a newer generation flash, with 4KiB sectors and 64KiB

Yes, this is a 64KiB block size indeed.

>         blocks. It uses the standard erase and JEDEC read-ID
>         opcodes. Manufacturer's datasheet is here:
>         <http://www.chingistek.com/img/Product_Files/Pm25LQ032C%20datasheet%20v1.6.1.pdf>
> @@ -46,6 +46,7 @@ Date:   Mon Jul 15 12:13:56 2013 +0200
>      Signed-off-by: Michel Stempin <michel.stempin@wanadoo.fr>
>      [Brian: fixed conflict]
>      Signed-off-by: Brian Norris <computersforpeace@gmail.com>
> +    Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
>  
> 
> 
> 
> 
> ______________________________________________________
> Linux MTD discussion mailing list
> http://lists.infradead.org/mailman/listinfo/linux-mtd/
> 

-- Michel

Patch

diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
index 2f3d2a5..4d45ce4 100644
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
@@ -45,6 +45,7 @@ 
 #define	OPCODE_BE_4K		0x20	/* Erase 4KiB block */
 #define	OPCODE_BE_32K		0x52	/* Erase 32KiB block */
 #define	OPCODE_CHIP_ERASE	0xc7	/* Erase whole flash chip */
+#define	OPCODE_BE_4K_PMC	0xd7	/* Erase 4KiB block on PMC chips*/
 #define	OPCODE_SE		0xd8	/* Sector erase (usually 64KiB) */
 #define	OPCODE_RDID		0x9f	/* Read JEDEC ID */
 
@@ -682,6 +683,7 @@  struct flash_info {
 #define	SECT_4K		0x01		/* OPCODE_BE_4K works uniformly */
 #define	M25P_NO_ERASE	0x02		/* No erase command needed */
 #define	SST_WRITE	0x04		/* use SST byte programming */
+#define	SECT_4K_PMC	0x08		/* OPCODE_BE_4K_PMC works uniformly */
 };
 
 #define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags)	\
@@ -762,6 +764,11 @@  static const struct spi_device_id m25p_ids[] = {
 	{ "n25q128a13",  INFO(0x20ba18, 0, 64 * 1024, 256, 0) },
 	{ "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K) },
 
+	/* PMC -- pm25x "blocks" are 32K, sectors are 4K */
+	{ "pm25lv512", INFO(0, 0, 32 * 1024, 2, SECT_4K_PMC) },
+	{ "pm25lv010", INFO(0, 0, 32 * 1024, 4, SECT_4K_PMC) },
+	{ "pm25lq032", INFO(0x7F9D46, 0, 64 * 1024,  64, SECT_4K) },
+
 	/* Spansion -- single (large) sector size only, at least
 	 * for the chips listed here (without boot sectors).
 	 */
@@ -1014,6 +1021,9 @@  static int m25p_probe(struct spi_device *spi)
 	if (info->flags & SECT_4K) {
 		flash->erase_opcode = OPCODE_BE_4K;
 		flash->mtd.erasesize = 4096;
+	} else if (info->flags & SECT_4K_PMC) {
+		flash->erase_opcode = OPCODE_BE_4K_PMC;
+		flash->mtd.erasesize = 4096;
 	} else {
 		flash->erase_opcode = OPCODE_SE;
 		flash->mtd.erasesize = info->sector_size;