diff mbox

[3/6] tcg-arm: Use qemu_getauxval

Message ID 1376779088-9648-4-git-send-email-rth@twiddle.net
State New
Headers show

Commit Message

Richard Henderson Aug. 17, 2013, 10:38 p.m. UTC 
Allow host detection on linux systems without glibc 2.16 or later.

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 include/elf.h        | 22 ++++++++++++++++++++++
 tcg/arm/tcg-target.c | 15 ++++++---------
 2 files changed, 28 insertions(+), 9 deletions(-)
diff mbox

Patch

diff --git a/include/elf.h b/include/elf.h
index 7fdd3df..e95fa95 100644
--- a/include/elf.h
+++ b/include/elf.h
@@ -411,6 +411,28 @@  typedef struct {
 #define R_SPARC_5		44
 #define R_SPARC_6		45
 
+/* Bits present in AT_HWCAP for ARM.  */
+
+#define HWCAP_ARM_SWP		1
+#define HWCAP_ARM_HALF		2
+#define HWCAP_ARM_THUMB		4
+#define HWCAP_ARM_26BIT		8
+#define HWCAP_ARM_FAST_MULT	16
+#define HWCAP_ARM_FPA		32
+#define HWCAP_ARM_VFP		64
+#define HWCAP_ARM_EDSP		128
+#define HWCAP_ARM_JAVA		256
+#define HWCAP_ARM_IWMMXT	512
+#define HWCAP_ARM_CRUNCH	1024
+#define HWCAP_ARM_THUMBEE	2048
+#define HWCAP_ARM_NEON		4096
+#define HWCAP_ARM_VFPv3		8192
+#define HWCAP_ARM_VFPv3D16	16384
+#define HWCAP_ARM_TLS		32768
+#define HWCAP_ARM_VFPv4		65536
+#define HWCAP_ARM_IDIVA		131072
+#define HWCAP_ARM_IDIVT		262144
+
 /* Bits present in AT_HWCAP for PowerPC.  */
 
 #define PPC_FEATURE_32                  0x80000000
diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c
index 6c4854d..f56666c 100644
--- a/tcg/arm/tcg-target.c
+++ b/tcg/arm/tcg-target.c
@@ -22,6 +22,8 @@ 
  * THE SOFTWARE.
  */
 
+#include "elf.h"
+
 /* The __ARM_ARCH define is provided by gcc 4.8.  Construct it otherwise.  */
 #ifndef __ARM_ARCH
 # if defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) \
@@ -56,9 +58,6 @@  static int arm_arch = __ARM_ARCH;
 #ifndef use_idiv_instructions
 bool use_idiv_instructions;
 #endif
-#ifdef CONFIG_GETAUXVAL
-# include <sys/auxv.h>
-#endif
 
 #ifndef NDEBUG
 static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
@@ -2030,22 +2029,20 @@  static const TCGTargetOpDef arm_op_defs[] = {
 
 static void tcg_target_init(TCGContext *s)
 {
-#if defined(CONFIG_GETAUXVAL)
     /* Only probe for the platform and capabilities if we havn't already
        determined maximum values at compile time.  */
-# if !defined(use_idiv_instructions)
+#ifndef use_idiv_instructions
     {
-        unsigned long hwcap = getauxval(AT_HWCAP);
+        unsigned long hwcap = qemu_getauxval(AT_HWCAP);
         use_idiv_instructions = (hwcap & HWCAP_ARM_IDIVA) != 0;
     }
-# endif
+#endif
     if (__ARM_ARCH < 7) {
-        const char *pl = (const char *)getauxval(AT_PLATFORM);
+        const char *pl = (const char *)qemu_getauxval(AT_PLATFORM);
         if (pl != NULL && pl[0] == 'v' && pl[1] >= '4' && pl[1] <= '9') {
             arm_arch = pl[1] - '0';
         }
     }
-#endif /* GETAUXVAL */
 
     tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffff);
     tcg_regset_set32(tcg_target_call_clobber_regs, 0,