From patchwork Fri May 1 17:17:57 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maynard Johnson X-Patchwork-Id: 26767 Return-Path: X-Original-To: patchwork-incoming@bilbo.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from ozlabs.org (ozlabs.org [203.10.76.45]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "mx.ozlabs.org", Issuer "CA Cert Signing Authority" (verified OK)) by bilbo.ozlabs.org (Postfix) with ESMTPS id A6DF3B7081 for ; Sat, 2 May 2009 03:18:32 +1000 (EST) Received: by ozlabs.org (Postfix) id 6AA43DE115; Sat, 2 May 2009 03:18:24 +1000 (EST) Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [127.0.0.1]) by ozlabs.org (Postfix) with ESMTP id 68F78DE114 for ; Sat, 2 May 2009 03:18:24 +1000 (EST) X-Original-To: linuxppc-dev@ozlabs.org Delivered-To: linuxppc-dev@ozlabs.org Received: from e3.ny.us.ibm.com (e3.ny.us.ibm.com [32.97.182.143]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "e3.ny.us.ibm.com", Issuer "Equifax" (verified OK)) by ozlabs.org (Postfix) with ESMTPS id 74280DDE0D for ; Sat, 2 May 2009 03:18:05 +1000 (EST) Received: from d01relay02.pok.ibm.com (d01relay02.pok.ibm.com [9.56.227.234]) by e3.ny.us.ibm.com (8.13.1/8.13.1) with ESMTP id n41HE3K8001877 for ; Fri, 1 May 2009 13:14:03 -0400 Received: from d01av03.pok.ibm.com (d01av03.pok.ibm.com [9.56.224.217]) by d01relay02.pok.ibm.com (8.13.8/8.13.8/NCO v9.2) with ESMTP id n41HHxY5151020 for ; Fri, 1 May 2009 13:17:59 -0400 Received: from d01av03.pok.ibm.com (loopback [127.0.0.1]) by d01av03.pok.ibm.com (8.12.11.20060308/8.13.3) with ESMTP id n41HHx8L006672 for ; Fri, 1 May 2009 13:17:59 -0400 Received: from [127.0.0.1] (9-10-86-165.rchland.ibm.com [9.10.86.165]) by d01av03.pok.ibm.com (8.12.11.20060308/8.12.11) with ESMTP id n41HHvqT006518 for ; Fri, 1 May 2009 13:17:58 -0400 Message-ID: <49FB2EC5.4040400@us.ibm.com> Date: Fri, 01 May 2009 12:17:57 -0500 From: Maynard Johnson User-Agent: Thunderbird 2.0.0.21 (Windows/20090302) MIME-Version: 1.0 To: linuxppc-dev@ozlabs.org Subject: [PATCH] Fix oprofile sampling of marked events on POWER7 X-BeenThere: linuxppc-dev@ozlabs.org X-Mailman-Version: 2.1.11 Precedence: list Reply-To: maynardj@us.ibm.com List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@ozlabs.org Description ----------- Change ppc64 oprofile kernel driver to use the SLOT bits (MMCRA[37:39]only on older processors where those bits are defined. Background ---------- The performance monitor unit of the 64-bit POWER processor family has the ability to collect accurate instruction-level samples when profiling on marked events (i.e., "PM_MRK_"). In processors prior to POWER6, the MMCRA register contained "slot information" that the oprofile kernel driver used to adjust the value latched in the SIAR at the time of a PMU interrupt. But as of POWER6, these slot bits in MMCRA are no longer necessary for oprofile to use, since the SIAR itself holds the accurate sampled instruction address. With POWER6, these MMCRA slot bits were zero'ed out by hardware so oprofile's use of these slot bits was, in effect, a NOP. But with POWER7, these bits are no longer zero'ed out; however, they serve some other purpose rather than slot information. Thus, using these bits on POWER7 to adjust the SIAR value results in samples being attributed to the wrong instructions. The attached patch changes the oprofile kernel driver to ignore these slot bits on all newer processors starting with POWER6. Thanks. -Maynard Signed-off-by: Maynard Johnson diff -paur linux/arch/powerpc/oprofile/op_model_power4.c linux-p7-oprofile-patch//arch/powerpc/oprofile/op_model_power4.c --- linux/arch/powerpc/oprofile/op_model_power4.c 2009-05-01 08:20:21.000000000 -0500 +++ linux-p7-oprofile-patch//arch/powerpc/oprofile/op_model_power4.c 2009-05-01 08:20:05.000000000 -0500 @@ -26,6 +26,7 @@ static unsigned long reset_value[OP_MAX_COUNTER]; static int oprofile_running; +static int use_slot_nums; /* mmcr values are set in power4_reg_setup, used in power4_cpu_setup */ static u32 mmcr0_val; @@ -61,6 +62,12 @@ static int power4_reg_setup(struct op_co else mmcr0_val |= MMCR0_PROBLEM_DISABLE; + if (__is_processor(PV_POWER4) || __is_processor(PV_POWER4p) || + __is_processor(PV_970) || __is_processor(PV_970FX) || + __is_processor(PV_970MP) || __is_processor(PV_970GX) || + __is_processor(PV_POWER5) || __is_processor(PV_POWER5p)) + use_slot_nums = 1; + return 0; } @@ -206,7 +213,7 @@ static unsigned long get_pc(struct pt_re mmcra = mfspr(SPRN_MMCRA); - if (mmcra & MMCRA_SAMPLE_ENABLE) { + if (use_slot_nums && (mmcra & MMCRA_SAMPLE_ENABLE)) { slot = ((mmcra & MMCRA_SLOT) >> MMCRA_SLOT_SHIFT); if (slot > 1) pc += 4 * (slot - 1);