@@ -262,6 +262,7 @@ typedef enum {
INSN_MUL = 0x1b007c00, /* MADD alias with Ra = xzr */
/* Bitfield instructions */
+ INSN_BFM = 0x33000000,
INSN_SBFM = 0x13000000,
INSN_UBFM = 0x53000000,
INSN_EXTR = 0x13800000,
@@ -588,6 +589,12 @@ static inline void tcg_out_data2(TCGContext *s, AArch64Insn insn,
tcg_out32(s, insn | ext | rm << 16 | rn << 5 | rd);
}
+static inline void tcg_out_bfm(TCGContext *s, AArch64Ext ext, TCGReg rd,
+ TCGReg rn, unsigned int a, unsigned int b)
+{
+ tcg_out32(s, INSN_BFM | ext | a << 16 | b << 10 | rn << 5 | rd);
+}
+
static inline void tcg_out_ubfm(TCGContext *s, AArch64Ext ext, TCGReg rd,
TCGReg rn, unsigned int a, unsigned int b)
{
@@ -647,6 +654,15 @@ static inline void tcg_out_rotli(TCGContext *s, AArch64Ext ext, TCGReg rd,
tcg_out_extr(s, ext, rd, rn, rn, bits - (m & max));
}
+static inline void tcg_out_dep(TCGContext *s, AArch64Ext ext, TCGReg rd,
+ TCGReg rn, unsigned lsb, unsigned width)
+{
+ unsigned size = ext ? 64 : 32;
+ unsigned a = (size - lsb) & (size - 1);
+ unsigned b = width - 1;
+ tcg_out_bfm(s, ext, rd, rn, a, b);
+}
+
static void tcg_out_cmp(TCGContext *s, AArch64Ext ext, TCGReg a,
tcg_target_long b, bool const_b)
{
@@ -1541,6 +1557,12 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
tcg_out_movr(s, E32, args[0], args[1]);
break;
+ case INDEX_op_deposit_i64:
+ ext = E64; /* fall through */
+ case INDEX_op_deposit_i32:
+ tcg_out_dep(s, ext, args[0], REG0(2), args[3], args[4]);
+ break;
+
default:
tcg_abort(); /* opcode not implemented */
}
@@ -1654,6 +1676,9 @@ static const TCGTargetOpDef aarch64_op_defs[] = {
{ INDEX_op_ext16u_i64, { "r", "r" } },
{ INDEX_op_ext32u_i64, { "r", "r" } },
+ { INDEX_op_deposit_i32, { "r", "0", "rZ" } },
+ { INDEX_op_deposit_i64, { "r", "0", "rZ" } },
+
{ -1 },
};
@@ -55,7 +55,7 @@ typedef enum {
#define TCG_TARGET_HAS_eqv_i32 1
#define TCG_TARGET_HAS_nand_i32 0
#define TCG_TARGET_HAS_nor_i32 0
-#define TCG_TARGET_HAS_deposit_i32 0
+#define TCG_TARGET_HAS_deposit_i32 1
#define TCG_TARGET_HAS_movcond_i32 1
#define TCG_TARGET_HAS_add2_i32 0
#define TCG_TARGET_HAS_sub2_i32 0
@@ -81,7 +81,7 @@ typedef enum {
#define TCG_TARGET_HAS_eqv_i64 1
#define TCG_TARGET_HAS_nand_i64 0
#define TCG_TARGET_HAS_nor_i64 0
-#define TCG_TARGET_HAS_deposit_i64 0
+#define TCG_TARGET_HAS_deposit_i64 1
#define TCG_TARGET_HAS_movcond_i64 1
#define TCG_TARGET_HAS_add2_i64 0
#define TCG_TARGET_HAS_sub2_i64 0
Signed-off-by: Richard Henderson <rth@twiddle.net> --- tcg/aarch64/tcg-target.c | 25 +++++++++++++++++++++++++ tcg/aarch64/tcg-target.h | 4 ++-- 2 files changed, 27 insertions(+), 2 deletions(-)