From patchwork Sun Aug 11 02:48:06 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yinghai Lu X-Patchwork-Id: 266296 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 1147C2C00A9 for ; Sun, 11 Aug 2013 12:52:40 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753600Ab3HKCwV (ORCPT ); Sat, 10 Aug 2013 22:52:21 -0400 Received: from aserp1040.oracle.com ([141.146.126.69]:34893 "EHLO aserp1040.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753571Ab3HKCtd (ORCPT ); Sat, 10 Aug 2013 22:49:33 -0400 Received: from ucsinet21.oracle.com (ucsinet21.oracle.com [156.151.31.93]) by aserp1040.oracle.com (Sentrion-MTA-4.3.1/Sentrion-MTA-4.3.1) with ESMTP id r7B2n4fj016024 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Sun, 11 Aug 2013 02:49:05 GMT Received: from userz7021.oracle.com (userz7021.oracle.com [156.151.31.85]) by ucsinet21.oracle.com (8.14.4+Sun/8.14.4) with ESMTP id r7B2n3l6012075 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Sun, 11 Aug 2013 02:49:03 GMT Received: from abhmt117.oracle.com (abhmt117.oracle.com [141.146.116.69]) by userz7021.oracle.com (8.14.4+Sun/8.14.4) with ESMTP id r7B2n2mh011912; Sun, 11 Aug 2013 02:49:02 GMT Received: from linux-siqj.site.site (/75.36.254.102) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Sat, 10 Aug 2013 19:49:02 -0700 From: Yinghai Lu To: Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , Tony Luck , Bjorn Helgaas , "Rafael J. Wysocki" Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, Yinghai Lu , Joerg Roedel , Konrad Rzeszutek Wilk , Sebastian Andrzej Siewior Subject: [PATCH v4 20/28] x86, irq: More strict checking about registering ioapic Date: Sat, 10 Aug 2013 19:48:06 -0700 Message-Id: <1376189294-32022-21-git-send-email-yinghai@kernel.org> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1376189294-32022-1-git-send-email-yinghai@kernel.org> References: <1376189294-32022-1-git-send-email-yinghai@kernel.org> X-Source-IP: ucsinet21.oracle.com [156.151.31.93] Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org 1. check overlaping gsi range for hot-add ioapic case, BIOS may have some entries in MADT and also have setting in pci root bus with _GSB of DSDT. 2. check if entries is in right range. Signed-off-by: Yinghai Lu Cc: Joerg Roedel Cc: Konrad Rzeszutek Wilk Cc: Sebastian Andrzej Siewior --- arch/x86/kernel/apic/io_apic.c | 30 ++++++++++++++++++++++++------ 1 file changed, 24 insertions(+), 6 deletions(-) diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index b026cc7..60c6706 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c @@ -3818,12 +3818,9 @@ void __init ioapic_insert_resources(void) } } -int mp_find_ioapic(u32 gsi) +static int __mp_find_ioapic(u32 gsi) { - int i = 0; - - if (nr_ioapics == 0) - return -1; + int i; /* Find the IOAPIC that manages this GSI. */ for_each_ioapic(i) { @@ -3833,10 +3830,19 @@ int mp_find_ioapic(u32 gsi) return i; } - printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi); return -1; } +int mp_find_ioapic(u32 gsi) +{ + int ret = __mp_find_ioapic(gsi); + + if (ret == -1) + pr_err("ERROR: Unable to locate IOAPIC for GSI %d\n", gsi); + + return ret; +} + int mp_find_ioapic_pin(int ioapic, u32 gsi) { struct mp_ioapic_gsi *gsi_cfg; @@ -3888,6 +3894,11 @@ void __init mp_register_ioapic(int id, u32 address, u32 gsi_base) if (bad_ioapic(address)) return; + /* already registered ? */ + idx = __mp_find_ioapic(gsi_base); + if (idx >= 0) + return; + idx = find_first_zero_bit(ioapics_mask, MAX_IO_APICS); if (idx >= MAX_IO_APICS) { pr_warn("WARNING: Max # of I/O APICs (%d) exceeded, skipping\n", @@ -3914,6 +3925,13 @@ void __init mp_register_ioapic(int id, u32 address, u32 gsi_base) * and to prevent reprogramming of IOAPIC pins (PCI GSIs). */ entries = io_apic_get_redir_entries(idx); + + if (!entries || entries > MP_MAX_IOAPIC_PIN) { + clear_fixmap(FIX_IO_APIC_BASE_0 + idx); + memset(&ioapics[idx], 0, sizeof(struct ioapic)); + return; + } + gsi_cfg = mp_ioapic_gsi_routing(idx); gsi_cfg->gsi_base = gsi_base; gsi_cfg->gsi_end = gsi_base + entries - 1;