From patchwork Fri Aug 9 18:24:06 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Norris X-Patchwork-Id: 266130 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from casper.infradead.org (unknown [IPv6:2001:770:15f::2]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 18D992C00A2 for ; Sat, 10 Aug 2013 04:25:11 +1000 (EST) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V7rMp-0002Xf-H2; Fri, 09 Aug 2013 18:24:51 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1V7rMm-0005Lf-Gt; Fri, 09 Aug 2013 18:24:48 +0000 Received: from mail-pb0-x231.google.com ([2607:f8b0:400e:c01::231]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V7rMg-0005L9-Ca for linux-mtd@lists.infradead.org; Fri, 09 Aug 2013 18:24:44 +0000 Received: by mail-pb0-f49.google.com with SMTP id xb4so4797978pbc.36 for ; Fri, 09 Aug 2013 11:24:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=muptIP6Va1XE36ynLDKHC1T7nIdPz9reMGG2xysKS/g=; b=igDUT7moOOTTtBWXdxS+s62+gN24tQvRO7sh5nD4iEASuqEf0LdAP3lxMvZTDNMONh VKs1zsB9mCsnI1HlSoIl7AbPqS5fPiJiI1wOLwZS1Np1PYWh67nXJBDAJKFabmOOm29o sCC1lxq/B4bQVQLIjv6jfTvSIV4PMQtkqe5XLIgRt6EgDw/Rrq9IOeACxmvz0r70AbYi ZaXwg/PoCiiz7q3iOK3TImffPdJYi/FlKvy5To5eDMly5tW4IElop4Swx/xjH8D+t5U9 lKI5AOUGONm3KreG1j2YCgcn0YWG6CdIPmOlBwZIbTdjzKvpFtdSn0DUjFbbS/7VzaFr fDAg== X-Received: by 10.68.228.201 with SMTP id sk9mr12918399pbc.4.1376072660240; Fri, 09 Aug 2013 11:24:20 -0700 (PDT) Received: from norris-Latitude-E6410.broadcom.com (5520-maca-inet1-outside.broadcom.com. [216.31.211.11]) by mx.google.com with ESMTPSA id yk10sm23836229pac.16.2013.08.09.11.24.18 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 09 Aug 2013 11:24:19 -0700 (PDT) From: Brian Norris To: Subject: [PATCH] mtd: m25p80: Micron SPI uses Macronix-style 4-byte addressing Date: Fri, 9 Aug 2013 11:24:06 -0700 Message-Id: <1376072646-26089-1-git-send-email-computersforpeace@gmail.com> X-Mailer: git-send-email 1.8.1.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130809_142442_534790_223235AB X-CRM114-Status: GOOD ( 11.69 ) X-Spam-Score: -2.0 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (computersforpeace[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Marek Vasut , Brian Norris , stable@vger.kernel.org, Vivien Didelot X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org For SPI NOR flash that are larger than 128Mbit (16MiB), we need 4 bytes of address space to reach the entire flash; however, the original SPI flash protocol used only 3 bytes for the address. So far, the practice for handling this has been either to use new command opcodes that are defined to use 4 bytes for their address, or to use special mode-switching command to configure all traditionally-3-byte-address commands to take 4 bytes instead. Macronix and Spansion developed two incompatible methods for entering/exiting "4-byte address mode." Micron flash uses the Macronix method (OPCODE_{EN4B,EX4B}), not the Spansion method. This patch solves addressing issues on Micron n25q256a and provides the ability to support other future Micron SPI flash >16MiB. Quoting a Micron representative: "Majority of our NOR that needs 4-byte addressing (256Mb or 32MB and higher) enter and exit 4byte through B7h and E9h commands. The N25Q256A7xxx and N25Q512A7xxx parts do not support 4-byte addressing mode via B7h or E9h command." They further clarified that those that don't support the enter/exit opcodes (B7h/E9h) are manufactured specifically to come up by default in 4-byte mode. We don't need to treat those parts any diffently, as they will discard the EN4B opcode as a no-op. Signed-off-by: Brian Norris Cc: Vivien Didelot Cc: Marek Vasut Cc: # 3.10+ Acked-by: Marek Vasut --- drivers/mtd/devices/m25p80.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c index b5190c4..a759c1f 100644 --- a/drivers/mtd/devices/m25p80.c +++ b/drivers/mtd/devices/m25p80.c @@ -169,6 +169,7 @@ static inline int set_4byte(struct m25p *flash, u32 jedec_id, int enable) { switch (JEDEC_MFR(jedec_id)) { case CFI_MFR_MACRONIX: + case CFI_MFR_ST: /* Micron, actually */ case 0xEF /* winbond */: flash->command[0] = enable ? OPCODE_EN4B : OPCODE_EX4B; return spi_write(flash->spi, flash->command, 1);