From patchwork Thu Aug 8 00:32:55 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Scott Wood X-Patchwork-Id: 265624 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id E81FD2C0262 for ; Thu, 8 Aug 2013 10:33:35 +1000 (EST) Received: from db8outboundpool.messaging.microsoft.com (mail-db8lp0186.outbound.messaging.microsoft.com [213.199.154.186]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (Client CN "mail.global.frontbridge.com", Issuer "MSIT Machine Auth CA 2" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 3A5D82C009E for ; Thu, 8 Aug 2013 10:33:10 +1000 (EST) Received: from mail66-db8-R.bigfish.com (10.174.8.226) by DB8EHSOBE031.bigfish.com (10.174.4.94) with Microsoft SMTP Server id 14.1.225.22; Thu, 8 Aug 2013 00:33:03 +0000 Received: from mail66-db8 (localhost [127.0.0.1]) by mail66-db8-R.bigfish.com (Postfix) with ESMTP id 2A39D8C00BD for ; Thu, 8 Aug 2013 00:33:03 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 1 X-BigFish: VS1(z37d5kz98dI1432Izz1f42h208ch1ee6h1de0h1fdah2073h1202h1e76h1d1ah1d2ah1fc6hzz1de098h8275bh1de097hz2dh2a8h668h839h944hd25hf0ah1220h1288h12a5h12a9h12bdh137ah13b6h1441h14ddh1504h1537h153bh162dh1631h1758h18e1h1946h19b5h1ad9h1b0ah1b2fh1fb3h1d0ch1d2eh1d3fh1dfeh1dffh1155h) Received: from mail66-db8 (localhost.localdomain [127.0.0.1]) by mail66-db8 (MessageSwitch) id 1375921980351566_18165; Thu, 8 Aug 2013 00:33:00 +0000 (UTC) Received: from DB8EHSMHS015.bigfish.com (unknown [10.174.8.228]) by mail66-db8.bigfish.com (Postfix) with ESMTP id 519C8600046 for ; Thu, 8 Aug 2013 00:33:00 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by DB8EHSMHS015.bigfish.com (10.174.4.25) with Microsoft SMTP Server (TLS) id 14.16.227.3; Thu, 8 Aug 2013 00:33:00 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-005.039d.mgd.msft.net (10.84.1.17) with Microsoft SMTP Server (TLS) id 14.3.136.1; Thu, 8 Aug 2013 00:32:56 +0000 Received: from home.buserror.net ([10.214.83.234]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id r780WuN3001831; Wed, 7 Aug 2013 17:32:56 -0700 Date: Wed, 7 Aug 2013 19:32:55 -0500 From: Scott Wood To: Minghuan Lian Subject: Re: [3/3,v2] powerpc/fsl_msi: add MSIIR1 support for MPIC v4.3 Message-ID: <20130808003255.GA3901@home.buserror.net> References: <1371812354-1962-3-git-send-email-Minghuan.Lian@freescale.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1371812354-1962-3-git-send-email-Minghuan.Lian@freescale.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-OriginatorOrg: freescale.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% Cc: linuxppc-dev@lists.ozlabs.org, Zang Roy-R61911 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Fri, Jun 21, 2013 at 06:59:14PM +0800, Minghuan Lian wrote: > The original MPIC MSI bank contains 8 registers, MPIC v4.3 MSI bank > contains 16 registers, and this patch adds NR_MSI_REG_MAX and > NR_MSI_IRQS_MAX to describe the maximum capability of MSI bank. > MPIC v4.3 provides MSIIR1 to index these 16 MSI registers. MSIIR1 > uses different bits definition than MSIIR. This patch adds > ibs_shift and srs_shift to indicate the bits definition of the > MSIIR and MSIIR1, so the same code can handle the MSIIR and MSIIR1 > simultaneously. > > Signed-off-by: Minghuan Lian > > --- > v2 log: > 1. remove 'msiregs' support. > > arch/powerpc/sysdev/fsl_msi.c | 132 ++++++++++++++++++++++++++++++------------ > arch/powerpc/sysdev/fsl_msi.h | 10 +++- > 2 files changed, 101 insertions(+), 41 deletions(-) Applied with the following changes: -Scott diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c index fd6458b..77efbae 100644 --- a/arch/powerpc/sysdev/fsl_msi.c +++ b/arch/powerpc/sysdev/fsl_msi.c @@ -481,8 +481,8 @@ static int fsl_of_msi_probe(struct platform_device *dev) goto error_out; } } else { - const u32 all_avail[] = { 0, - NR_MSI_REG_MSIIR * IRQS_PER_MSI_REG}; + static const u32 all_avail[] = + { 0, NR_MSI_REG_MSIIR * IRQS_PER_MSI_REG }; msi->srs_shift = MSIIR_SRS_SHIFT; msi->ibs_shift = MSIIR_IBS_SHIFT;