From patchwork Tue Aug 6 16:17:25 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagannadha Sutradharudu Teki X-Patchwork-Id: 265131 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 25F2A2C0D80 for ; Wed, 7 Aug 2013 02:20:40 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 332194A02C; Tue, 6 Aug 2013 18:20:14 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 1J2xoUVNzVqM; Tue, 6 Aug 2013 18:20:13 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CEAE94A041; Tue, 6 Aug 2013 18:18:56 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 231C44A02F for ; Tue, 6 Aug 2013 18:18:52 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id P3fCl+5zAIMN for ; Tue, 6 Aug 2013 18:18:47 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from co1outboundpool.messaging.microsoft.com (co1ehsobe002.messaging.microsoft.com [216.32.180.185]) by theia.denx.de (Postfix) with ESMTPS id 180164A036 for ; Tue, 6 Aug 2013 18:18:25 +0200 (CEST) Received: from mail157-co1-R.bigfish.com (10.243.78.243) by CO1EHSOBE016.bigfish.com (10.243.66.79) with Microsoft SMTP Server id 14.1.225.22; Tue, 6 Aug 2013 16:18:22 +0000 Received: from mail157-co1 (localhost [127.0.0.1]) by mail157-co1-R.bigfish.com (Postfix) with ESMTP id 7EB74C401BE; Tue, 6 Aug 2013 16:18:22 +0000 (UTC) X-Forefront-Antispam-Report: CIP:149.199.60.83; KIP:(null); UIP:(null); IPV:NLI; H:xsj-gw1; RD:unknown-60-83.xilinx.com; EFVD:NLI X-SpamScore: 2 X-BigFish: VPS2(z551bizzz1f42h208ch1ee6h1de0h1fdah2073h1202h1e76h1d1ah1d2ah1fc6hzz1de098h8275bh1de097hz2fh95h668h839hd24hf0ah119dh1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h14ddh1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1b0ah1d0ch1d2eh1d3fh1dfeh1dffh1e1dh1e23h906i1155h192ch) Received-SPF: pass (mail157-co1: domain of xilinx.com designates 149.199.60.83 as permitted sender) client-ip=149.199.60.83; envelope-from=jagannadha.sutradharudu-teki@xilinx.com; helo=xsj-gw1 ; helo=xsj-gw1 ; Received: from mail157-co1 (localhost.localdomain [127.0.0.1]) by mail157-co1 (MessageSwitch) id 1375805899723823_375; Tue, 6 Aug 2013 16:18:19 +0000 (UTC) Received: from CO1EHSMHS009.bigfish.com (unknown [10.243.78.242]) by mail157-co1.bigfish.com (Postfix) with ESMTP id A9D65C0048; Tue, 6 Aug 2013 16:18:19 +0000 (UTC) Received: from xsj-gw1 (149.199.60.83) by CO1EHSMHS009.bigfish.com (10.243.66.19) with Microsoft SMTP Server id 14.16.227.3; Tue, 6 Aug 2013 16:18:17 +0000 Received: from unknown-38-66.xilinx.com ([149.199.38.66] helo=xsj-smtp1.xilinx.com) by xsj-gw1 with esmtp (Exim 4.63) (envelope-from ) id 1V6jxh-0006vg-8i; Tue, 06 Aug 2013 09:18:17 -0700 From: Jagannadha Sutradharudu Teki To: Date: Tue, 6 Aug 2013 21:47:25 +0530 X-Mailer: git-send-email 1.8.3 In-Reply-To: <1375805851-32163-1-git-send-email-jaganna@xilinx.com> References: <1375805851-32163-1-git-send-email-jaganna@xilinx.com> X-RCIS-Action: ALLOW MIME-Version: 1.0 Message-ID: <97c62816-e705-4b26-9b68-b5bba7afe3aa@CO1EHSMHS009.ehs.local> X-OriginatorOrg: xilinx.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% Cc: "Todd Legler (tlegler)" , Willis Max , Jagannadha Sutradharudu Teki , Syed@theia.denx.de, Hussain , Rajeshwari Shinde , Tom Rini Subject: [U-Boot] [RESEND PATCH v2 14/20] sf: probe: Add support for erase sector selection flag X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de SECT_4K, SECT_32K and SECT_64K opeartions are performed to to specific flash by adding a SECT* flag on respective spi_flash_params.flag param. Signed-off-by: Jagannadha Sutradharudu Teki --- Changes for v2: - none drivers/mtd/spi/spi_flash_ops.c | 8 +- drivers/mtd/spi/spi_flash_probe.c | 166 ++++++++++++++++++++------------------ include/spi_flash.h | 10 ++- 3 files changed, 100 insertions(+), 84 deletions(-) diff --git a/drivers/mtd/spi/spi_flash_ops.c b/drivers/mtd/spi/spi_flash_ops.c index 79381b1..c408e27 100644 --- a/drivers/mtd/spi/spi_flash_ops.c +++ b/drivers/mtd/spi/spi_flash_ops.c @@ -153,17 +153,13 @@ int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len) u8 cmd[4]; int ret = -1; - erase_size = flash->sector_size; + erase_size = flash->erase_size; if (offset % erase_size || len % erase_size) { debug("SF: Erase offset/length not multiple of erase size\n"); return -1; } - if (erase_size == 4096) - cmd[0] = CMD_ERASE_4K; - else - cmd[0] = CMD_ERASE_64K; - + cmd[0] = flash->erase_cmd; while (len) { #ifdef CONFIG_SPI_FLASH_BAR u8 bank_sel; diff --git a/drivers/mtd/spi/spi_flash_probe.c b/drivers/mtd/spi/spi_flash_probe.c index 4368867..0d005a1 100644 --- a/drivers/mtd/spi/spi_flash_probe.c +++ b/drivers/mtd/spi/spi_flash_probe.c @@ -39,97 +39,97 @@ struct spi_flash_params { static const struct spi_flash_params spi_flash_params_table[] = { #ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */ - {"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4, 0}, - {"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8, 0}, - {"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, 0}, - {"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16, 0}, - {"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, 0}, - {"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, 0}, - {"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128, 0}, + {"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4, SECT_4K}, + {"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8, SECT_4K}, + {"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, SECT_4K}, + {"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16, SECT_4K}, + {"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, SECT_4K}, + {"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, SECT_4K}, + {"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128, SECT_4K}, #endif #ifdef CONFIG_SPI_FLASH_EON /* EON */ - {"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, 0}, - {"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, 0}, + {"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, 0}, + {"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, 0}, #endif #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */ - {"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, 0}, - {"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, 0}, + {"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, SECT_4K}, + {"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, SECT_4K}, #endif #ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */ - {"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, 0}, - {"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, 0}, - {"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, 0}, - {"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, 0}, - {"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, 0}, - {"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256, 0}, - {"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256, 0}, + {"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, 0}, + {"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, 0}, + {"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, 0}, + {"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, 0}, + {"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, 0}, + {"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256, 0}, + {"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256, 0}, #endif #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */ - {"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, 0}, - {"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, 0}, - {"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, 0}, - {"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, 0}, - {"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, 0}, - {"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, 0}, - {"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, 0}, - {"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, 0}, - {"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, 0}, - {"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, 0}, - {"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, 0}, + {"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, 0}, + {"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, 0}, + {"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, 0}, + {"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, 0}, + {"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, 0}, + {"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, 0}, + {"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, 0}, + {"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, 0}, + {"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, 0}, + {"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, 0}, + {"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, 0}, #endif #ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */ - {"M25P10", 0x202011, 0x0, 32 * 1024, 4, 0}, - {"M25P20", 0x202012, 0x0, 64 * 1024, 4, 0}, - {"M25P40", 0x202013, 0x0, 64 * 1024, 8, 0}, - {"M25P80", 0x202014, 0x0, 64 * 1024, 16, 0}, - {"M25P16", 0x202015, 0x0, 64 * 1024, 32, 0}, - {"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0}, - {"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0}, - {"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0}, - {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, 0}, - {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, 0}, - {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, 0}, - {"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, 0}, - {"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, 0}, - {"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, 0}, - {"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, 0}, - {"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, 0}, - {"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, 0}, - {"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, 0}, - {"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, 0}, - {"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, 0}, + {"M25P10", 0x202011, 0x0, 32 * 1024, 4, 0}, + {"M25P20", 0x202012, 0x0, 64 * 1024, 4, 0}, + {"M25P40", 0x202013, 0x0, 64 * 1024, 8, 0}, + {"M25P80", 0x202014, 0x0, 64 * 1024, 16, 0}, + {"M25P16", 0x202015, 0x0, 64 * 1024, 32, 0}, + {"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0}, + {"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0}, + {"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0}, + {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, SECT_4K}, + {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, SECT_4K}, + {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, SECT_4K}, + {"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, SECT_4K}, + {"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, SECT_4K}, + {"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, SECT_4K}, + {"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, SECT_4K}, + {"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, SECT_4K}, + {"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, SECT_4K}, + {"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, SECT_4K}, + {"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, SECT_4K}, + {"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, SECT_4K}, #endif #ifdef CONFIG_SPI_FLASH_SST /* SST */ - {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, SST_WP}, - {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, SST_WP}, - {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, SST_WP}, - {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, SST_WP}, - {"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, 0}, - {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, SST_WP}, - {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, SST_WP}, - {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, SST_WP}, - {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, SST_WP}, - {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, SST_WP}, + {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WP}, + {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, SECT_4K | SST_WP}, + {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, SECT_4K | SST_WP}, + {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, SECT_4K | SST_WP}, + {"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, SECT_4K}, + {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, SECT_4K | SST_WP}, + {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, SECT_4K | SST_WP}, + {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, SECT_4K | SST_WP}, + {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, SECT_4K | SST_WP}, + {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, SECT_4K | SST_WP}, #endif #ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */ - {"W25P80", 0xef2014, 0x0, 64 * 1024, 16, 0}, - {"W25P16", 0xef2015, 0x0, 64 * 1024, 32, 0}, - {"W25P32", 0xef2016, 0x0, 64 * 1024, 64, 0}, - {"W25X40", 0xef3013, 0x0, 64 * 1024, 8, 0}, - {"W25X16", 0xef3015, 0x0, 64 * 1024, 32, 0}, - {"W25X32", 0xef3016, 0x0, 64 * 1024, 64, 0}, - {"W25X64", 0xef3017, 0x0, 64 * 1024, 128, 0}, - {"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, 0}, - {"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, 0}, - {"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, 0}, - {"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, 0}, - {"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, 0}, - {"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, 0}, - {"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, 0}, - {"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, 0}, - {"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, 0}, - {"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, 0}, - {"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256, 0}, + {"W25P80", 0xef2014, 0x0, 64 * 1024, 16, SEC_4K}, + {"W25P16", 0xef2015, 0x0, 64 * 1024, 32, SEC_4K}, + {"W25P32", 0xef2016, 0x0, 64 * 1024, 64, SEC_4K}, + {"W25X40", 0xef3013, 0x0, 64 * 1024, 8, SEC_4K}, + {"W25X16", 0xef3015, 0x0, 64 * 1024, 32, SEC_4K}, + {"W25X32", 0xef3016, 0x0, 64 * 1024, 64, SEC_4K}, + {"W25X64", 0xef3017, 0x0, 64 * 1024, 128, SEC_4K}, + {"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, SEC_4K}, + {"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, SEC_4K}, + {"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, SEC_4K}, + {"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, SEC_32K}, + {"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, SEC_4K}, + {"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, SEC_4K}, + {"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, SEC_4K}, + {"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, SEC_4K}, + {"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, SEC_4K}, + {"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, SEC_4K}, + {"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256, SEC_4K}, #endif /* * Note: @@ -202,6 +202,18 @@ struct spi_flash *spi_flash_validate_ids(struct spi_slave *spi, u8 *idcode) flash->sector_size = params->sector_size; flash->size = flash->sector_size * params->nr_sectors; + /* Compute erase sector and command */ + if (params->flags & SECT_4K) { + flash->erase_cmd = CMD_ERASE_4K; + flash->erase_size = 4096; + } else if (params->flags & SECT_32K) { + flash->erase_cmd = CMD_ERASE_32K; + flash->erase_size = 32768; + } else { + flash->erase_cmd = CMD_ERASE_64K; + flash->erase_size = flash->sector_size; + } + /* Flash powers up read-only, so clear BP# bits */ if (((params->jedec >> 16) == SPI_FLASH_CFI_MFR_ATMEL) || ((params->jedec >> 16) == SPI_FLASH_CFI_MFR_MACRONIX) || diff --git a/include/spi_flash.h b/include/spi_flash.h index 8de4e8d..387af86 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -22,6 +22,10 @@ #define SPI_FLASH_CFI_MFR_MACRONIX 0xc2 #define SPI_FLASH_CFI_MFR_SST 0xbf +/* SECT flags */ +#define SECT_4K (1 << 0) +#define SECT_32K (1 << 1) + /* SST specific macros */ #ifdef CONFIG_SPI_FLASH_SST # define SST_WP 0x01 /* Supports AAI word program */ @@ -38,8 +42,10 @@ struct spi_flash { u32 size; /* Write (page) size */ u32 page_size; - /* Erase (sector) size */ + /* Sector size */ u32 sector_size; + /* Erase size */ + u32 erase_size; #ifdef CONFIG_SPI_FLASH_BAR /* Bank read cmd */ u8 bank_read_cmd; @@ -50,6 +56,8 @@ struct spi_flash { #endif /* Poll cmd - for flash erase/program */ u8 poll_cmd; + /* Erase cmd 4K, 32K, 64K */ + u8 erase_cmd; void *memory_map; /* Address of read-only SPI flash access */ int (*read)(struct spi_flash *flash, u32 offset,