From patchwork Thu Aug 1 15:00:18 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tuomas Tynkkynen X-Patchwork-Id: 264039 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id A67DE2C007C for ; Fri, 2 Aug 2013 01:01:20 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756904Ab3HAPAb (ORCPT ); Thu, 1 Aug 2013 11:00:31 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:12081 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756593Ab3HAPA2 (ORCPT ); Thu, 1 Aug 2013 11:00:28 -0400 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com id ; Thu, 01 Aug 2013 08:00:14 -0700 Received: from hqemhub03.nvidia.com ([172.20.12.94]) by hqnvupgp07.nvidia.com (PGP Universal service); Thu, 01 Aug 2013 08:00:27 -0700 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Thu, 01 Aug 2013 08:00:27 -0700 Received: from ttynkkynen-lnx.Nvidia.com (172.20.144.16) by hqemhub03.nvidia.com (172.20.150.15) with Microsoft SMTP Server (TLS) id 8.3.298.1; Thu, 1 Aug 2013 08:00:27 -0700 From: Tuomas Tynkkynen To: CC: , , , Mikko Perttunen Subject: [PATCH v2 2/2] ARM: dts: USB for Tegra114 Dalmore Date: Thu, 1 Aug 2013 18:00:18 +0300 Message-ID: <1375369218-11288-3-git-send-email-ttynkkynen@nvidia.com> X-Mailer: git-send-email 1.8.1.5 In-Reply-To: <1375369218-11288-1-git-send-email-ttynkkynen@nvidia.com> References: <1375369218-11288-1-git-send-email-ttynkkynen@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Mikko Perttunen Device tree entries for the three EHCI controllers on Tegra114. Enables the the third controller (USB host) on Dalmore. Signed-off-by: Mikko Perttunen --- arch/arm/boot/dts/tegra114-dalmore.dts | 9 +++++ arch/arm/boot/dts/tegra114.dtsi | 62 ++++++++++++++++++++++++++++++++++ 2 files changed, 71 insertions(+) diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts index cb640eb..f3fc2b0 100644 --- a/arch/arm/boot/dts/tegra114-dalmore.dts +++ b/arch/arm/boot/dts/tegra114-dalmore.dts @@ -870,6 +870,15 @@ non-removable; }; + usb@7d008000 { + status = "okay"; + }; + + usb-phy@7d008000 { + status = "okay"; + vbus-supply = <&usb3_vbus_reg>; + }; + clocks { compatible = "simple-bus"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi index abf6c40..2905145 100644 --- a/arch/arm/boot/dts/tegra114.dtsi +++ b/arch/arm/boot/dts/tegra114.dtsi @@ -430,6 +430,68 @@ status = "disable"; }; + usb@7d000000 { + compatible = "nvidia,tegra30-ehci", "usb-ehci"; + reg = <0x7d000000 0x4000>; + interrupts = ; + phy_type = "utmi"; + clocks = <&tegra_car TEGRA114_CLK_USBD>; + nvidia,phy = <&phy1>; + status = "disabled"; + }; + + phy1: usb-phy@7d000000 { + compatible = "nvidia,tegra30-usb-phy"; + reg = <0x7d000000 0x4000 0x7d000000 0x4000>; + phy_type = "utmi"; + clocks = <&tegra_car TEGRA114_CLK_USBD>, + <&tegra_car TEGRA114_CLK_PLL_U>, + <&tegra_car TEGRA114_CLK_USBD>; + clock-names = "reg", "pll_u", "utmi-pads"; + nvidia,hssync-start-delay = <0>; + nvidia,idle-wait-delay = <17>; + nvidia,elastic-limit = <16>; + nvidia,term-range-adj = <6>; + nvidia,xcvr-setup = <9>; + nvidia,xcvr-lsfslew = <0>; + nvidia,xcvr-lsrslew = <3>; + nvidia,hssquelch-level = <2>; + nvidia,hsdiscon-level = <5>; + nvidia,xcvr-hsslew = <12>; + status = "disabled"; + }; + + usb@7d008000 { + compatible = "nvidia,tegra30-ehci", "usb-ehci"; + reg = <0x7d008000 0x4000>; + interrupts = ; + phy_type = "utmi"; + clocks = <&tegra_car TEGRA114_CLK_USB3>; + nvidia,phy = <&phy3>; + status = "disabled"; + }; + + phy3: usb-phy@7d008000 { + compatible = "nvidia,tegra30-usb-phy"; + reg = <0x7d008000 0x4000 0x7d000000 0x4000>; + phy_type = "utmi"; + clocks = <&tegra_car TEGRA114_CLK_USB3>, + <&tegra_car TEGRA114_CLK_PLL_U>, + <&tegra_car TEGRA114_CLK_USBD>; + clock-names = "reg", "pll_u", "utmi-pads"; + nvidia,hssync-start-delay = <0>; + nvidia,idle-wait-delay = <17>; + nvidia,elastic-limit = <16>; + nvidia,term-range-adj = <6>; + nvidia,xcvr-setup = <9>; + nvidia,xcvr-lsfslew = <0>; + nvidia,xcvr-lsrslew = <3>; + nvidia,hssquelch-level = <2>; + nvidia,hsdiscon-level = <5>; + nvidia,xcvr-hsslew = <12>; + status = "disabled"; + }; + cpus { #address-cells = <1>; #size-cells = <0>;