Patchwork [3/6,v2] kvm: powerpc: allow guest control "G" attribute in mas2

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Submitter Bharat Bhushan
Date Aug. 1, 2013, 11:12 a.m.
Message ID <1375355558-19187-4-git-send-email-Bharat.Bhushan@freescale.com>
Download mbox | patch
Permalink /patch/263970/
State New
Headers show

Comments

Bharat Bhushan - Aug. 1, 2013, 11:12 a.m.
"G" bit in MAS2 indicates whether the page is Guarded.
There is no reason to stop guest setting  "E", so allow him.

Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com>
---
v1->v2
 - no change

 arch/powerpc/kvm/e500.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
Tiejun Chen - Aug. 2, 2013, 6:39 a.m.
On 08/01/2013 07:12 PM, Bharat Bhushan wrote:
> "G" bit in MAS2 indicates whether the page is Guarded.
> There is no reason to stop guest setting  "E", so allow him.

Could we merge patch 2 and 3 into only one.

Tiejun

>
> Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com>
> ---
> v1->v2
>   - no change
>
>   arch/powerpc/kvm/e500.h |    2 +-
>   1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/arch/powerpc/kvm/e500.h b/arch/powerpc/kvm/e500.h
> index 277cb18..4fd9650 100644
> --- a/arch/powerpc/kvm/e500.h
> +++ b/arch/powerpc/kvm/e500.h
> @@ -117,7 +117,7 @@ static inline struct kvmppc_vcpu_e500 *to_e500(struct kvm_vcpu *vcpu)
>   #define E500_TLB_USER_PERM_MASK (MAS3_UX|MAS3_UR|MAS3_UW)
>   #define E500_TLB_SUPER_PERM_MASK (MAS3_SX|MAS3_SR|MAS3_SW)
>   #define MAS2_ATTRIB_MASK \
> -	  (MAS2_X0 | MAS2_X1 | MAS2_E)
> +	  (MAS2_X0 | MAS2_X1 | MAS2_E | MAS2_G)
>   #define MAS3_ATTRIB_MASK \
>   	  (MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3 \
>   	   | E500_TLB_USER_PERM_MASK | E500_TLB_SUPER_PERM_MASK)
>

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Patch

diff --git a/arch/powerpc/kvm/e500.h b/arch/powerpc/kvm/e500.h
index 277cb18..4fd9650 100644
--- a/arch/powerpc/kvm/e500.h
+++ b/arch/powerpc/kvm/e500.h
@@ -117,7 +117,7 @@  static inline struct kvmppc_vcpu_e500 *to_e500(struct kvm_vcpu *vcpu)
 #define E500_TLB_USER_PERM_MASK (MAS3_UX|MAS3_UR|MAS3_UW)
 #define E500_TLB_SUPER_PERM_MASK (MAS3_SX|MAS3_SR|MAS3_SW)
 #define MAS2_ATTRIB_MASK \
-	  (MAS2_X0 | MAS2_X1 | MAS2_E)
+	  (MAS2_X0 | MAS2_X1 | MAS2_E | MAS2_G)
 #define MAS3_ATTRIB_MASK \
 	  (MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3 \
 	   | E500_TLB_USER_PERM_MASK | E500_TLB_SUPER_PERM_MASK)