diff mbox

powerpc: handle unaligned ldbrx/stdbrx

Message ID 20130731150521.74eb6639@kryten (mailing list archive)
State Accepted, archived
Commit 230aef7a6a23b6166bd4003bfff5af23c9bd381f
Headers show

Commit Message

Anton Blanchard July 31, 2013, 5:05 a.m. UTC
Normally when we haven't implemented an alignment handler for
a load or store instruction the process will be terminated.

The alignment handler uses the DSISR (or a pseudo one) to locate
the right handler. Unfortunately ldbrx and stdbrx overlap lfs and
stfs so we incorrectly think ldbrx is an lfs and stdbrx is an
stfs.

This bug is particularly nasty - instead of terminating the
process we apply an incorrect fixup and continue on.

With more and more overlapping instructions we should stop
creating a pseudo DSISR and index using the instruction directly,
but for now add a special case to catch ldbrx/stdbrx.

Signed-off-by: Anton Blanchard <anton@samba.org>
Cc: <stable@kernel.org>
---

Comments

Stephen Rothwell July 31, 2013, 8:19 a.m. UTC | #1
Hi Anton,

On Wed, 31 Jul 2013 15:05:21 +1000 Anton Blanchard <anton@samba.org> wrote:
>
> +++ b/arch/powerpc/kernel/align.c
> @@ -764,6 +764,16 @@ int fix_alignment(struct pt_regs *regs)
>  	nb = aligninfo[instr].len;
>  	flags = aligninfo[instr].flags;
>  
> +	/* ldbrx/stdbrx overlap lfs/stfs in the DSISR unfortunately */
> +	if (IS_XFORM(instruction) && ((instruction >> 1) & 0x3ff) == 532) {

We have get_xop() in asm/disassemble.h (which is unfortunately not
included by this file) ...

> +		nb = 8;
> +		flags = LD+SW;
> +	} else if (IS_XFORM(instruction) &&
> +		   ((instruction >> 1) & 0x3ff) == 660) {

ditto

/me points at a bike shed :-)
diff mbox

Patch

Index: b/arch/powerpc/kernel/align.c
===================================================================
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -764,6 +764,16 @@  int fix_alignment(struct pt_regs *regs)
 	nb = aligninfo[instr].len;
 	flags = aligninfo[instr].flags;
 
+	/* ldbrx/stdbrx overlap lfs/stfs in the DSISR unfortunately */
+	if (IS_XFORM(instruction) && ((instruction >> 1) & 0x3ff) == 532) {
+		nb = 8;
+		flags = LD+SW;
+	} else if (IS_XFORM(instruction) &&
+		   ((instruction >> 1) & 0x3ff) == 660) {
+		nb = 8;
+		flags = ST+SW;
+	}
+
 	/* Byteswap little endian loads and stores */
 	swiz = 0;
 	if (regs->msr & MSR_LE) {