Patchwork [07/75] drm/i915: Fix write-read race with multiple rings

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Submitter Kamal Mostafa
Date July 30, 2013, 3:16 p.m.
Message ID <>
Download mbox | patch
Permalink /patch/263417/
State New
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Kamal Mostafa - July 30, 2013, 3:16 p.m. -stable review patch.  If anyone has any objections, please let me know.


From: Chris Wilson <>

commit 02978ff57a5bdfbf703d2bc5a4d933a53ede3144 upstream.

Daniel noticed a problem where is we wrote to an object with ring A in
the middle of a very long running batch, then executed a quick batch on
ring B before a batch that reads from the same object, its obj->ring would
now point to ring B, but its last_write_seqno would be still relative to
ring A. This would allow for the user to read from the object before the
GPU had completed the write, as set_domain would only check that ring B
had passed the last_write_seqno.

To fix this simply (and inelegantly), we bump the last_write_seqno when
switching rings so that the last_write_seqno is always relative to the
current obj->ring.

This fixes igt/tests/gem_write_read_ring_switch.

Signed-off-by: Chris Wilson <>
Cc: Daniel Vetter <>
[danvet: Add note about the newly created igt which exercises this
Signed-off-by: Daniel Vetter <>
Signed-off-by: Kamal Mostafa <>
 drivers/gpu/drm/i915/i915_gem.c | 4 ++++
 1 file changed, 4 insertions(+)


diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 0e01617..919cc5c 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1882,6 +1882,10 @@  i915_gem_object_move_to_active(struct drm_i915_gem_object *obj,
 	u32 seqno = intel_ring_get_seqno(ring);
 	BUG_ON(ring == NULL);
+	if (obj->ring != ring && obj->last_write_seqno) {
+		/* Keep the seqno relative to the current ring */
+		obj->last_write_seqno = seqno;
+	}
 	obj->ring = ring;
 	/* Add a reference if we're newly entering the active list. */