Message ID | 201307301531.48864.ebotcazou@adacore.com |
---|---|
State | New |
Headers | show |
On 07/30/2013 03:31 AM, Eric Botcazou wrote: > 2013-07-30 Eric Botcazou <ebotcazou@adacore.com> > > * config/sparc/sparc.c (sparc_emit_membar_for_model) <SMM_TSO>: Add > the implied StoreLoad barrier for atomic operations if before. Looks good. r~
From: Richard Henderson <rth@redhat.com> Date: Tue, 30 Jul 2013 12:33:30 -1000 > On 07/30/2013 03:31 AM, Eric Botcazou wrote: >> 2013-07-30 Eric Botcazou <ebotcazou@adacore.com> >> >> * config/sparc/sparc.c (sparc_emit_membar_for_model) <SMM_TSO>: Add >> the implied StoreLoad barrier for atomic operations if before. > > Looks good. This looks fine to me too.
Index: config/sparc/sparc.c =================================================================== --- config/sparc/sparc.c (revision 201177) +++ config/sparc/sparc.c (working copy) @@ -11318,6 +11319,11 @@ sparc_emit_membar_for_model (enum memmod /* Total Store Ordering: all memory transactions with store semantics are followed by an implied StoreStore. */ implied |= StoreStore; + + /* If we're not looking for a raw barrer (before+after), then atomic + operations get the benefit of being both load and store. */ + if (load_store == 3 && before_after == 1) + implied |= StoreLoad; /* FALLTHRU */ case SMM_PSO: