From patchwork Thu Jul 25 14:06:34 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 261703 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 0F6EA2C00C2 for ; Fri, 26 Jul 2013 00:07:28 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 34B014A021; Thu, 25 Jul 2013 16:07:22 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id OsaW-tsH9CRE; Thu, 25 Jul 2013 16:07:21 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 973754A023; Thu, 25 Jul 2013 16:06:59 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B16764A018 for ; Thu, 25 Jul 2013 16:06:53 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 8QHtfHZB0geW for ; Thu, 25 Jul 2013 16:06:48 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-ea0-f170.google.com (mail-ea0-f170.google.com [209.85.215.170]) by theia.denx.de (Postfix) with ESMTPS id 6EF014A019 for ; Thu, 25 Jul 2013 16:06:40 +0200 (CEST) Received: by mail-ea0-f170.google.com with SMTP id h10so986921eaj.1 for ; Thu, 25 Jul 2013 07:06:39 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:in-reply-to:references:content-type:x-gm-message-state; bh=Tthu+MUCyoDv8ww53b5JDiHNP3tXtvw6oOgN7SmtZao=; b=fv/Yje0D5UATY90Mmwi3CT9tBH0xkKKTS3PqEHX6BhE0Q93UC7L7/Zc8DMOzUt5hND go7o2w/uSPzx5P2E4hggj3UNn8fqbYEC68kuGWEKx7/TzCcWTjpQtvsiSISfliLh9gJh PzV3bjaPUtwzPYUcNVvZW+e6C92lQIj2DoU7kH2rl3JdurD/uTA4Sn5NJwyGkJsWah1q yA5bi6s9pW6MptYcOja/robgiVMBbv2c1aaS3ZPy4u2f/Uj6auJ3Fih2xQ4mzO6G7rH7 jDbtRcKgE9UWLbtmYUX1RnuBupvNlBzOAJexE9LAk8IAABJhTfuUd3ApLUXq7BKVssIQ mytA== X-Received: by 10.14.110.194 with SMTP id u42mr43051102eeg.128.1374761199137; Thu, 25 Jul 2013 07:06:39 -0700 (PDT) Received: from localhost (nat-63.starnet.cz. [178.255.168.63]) by mx.google.com with ESMTPSA id c3sm73957251eev.3.2013.07.25.07.06.37 for (version=TLSv1.1 cipher=RC4-SHA bits=128/128); Thu, 25 Jul 2013 07:06:38 -0700 (PDT) From: Michal Simek To: Tom Rini , u-boot@lists.denx.de Date: Thu, 25 Jul 2013 16:06:34 +0200 Message-Id: <28e5590f84c48d8f63c4991b78c702acb69d3ea6.1374761192.git.michal.simek@xilinx.com> X-Mailer: git-send-email 1.8.2.3 In-Reply-To: References: In-Reply-To: References: X-Gm-Message-State: ALoCoQn0CFx8OervbRmsNUFC4pBFz3RhjJpm6pGeQyClOPCJPw1tvV9uXl0scMqkZ2RIvxuX6EFk Cc: Soren Brinkmann Subject: [U-Boot] [PATCH 2/2] fpga: zynqpl: Clear loopback mode during device init X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Soren Brinkmann Some versions of the Zynq first stage boot loader enable PCAP loopback during boot regardless of whether or not the boot image includes PL configuration. This behavior only appears in certain boot modes (notably QSPI boot). Attempting to configure the PL with the loopback bit set will result in timeouts and will prevent successful configuration. In order to avoid this problem, and to avoid dependency on the version of the FSBL used to boot the system, ensure that the loopback enable bit is cleared when loading the driver. Signed-off-by: Soren Brinkmann Signed-off-by: Michal Simek --- drivers/fpga/zynqpl.c | 4 ++++ 1 file changed, 4 insertions(+) -- 1.8.2.3 diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c index 6a5764f..7f5d90f 100644 --- a/drivers/fpga/zynqpl.c +++ b/drivers/fpga/zynqpl.c @@ -39,6 +39,7 @@ #define DEVCFG_STATUS_DMA_CMD_Q_E 0x40000000 #define DEVCFG_STATUS_DMA_DONE_CNT_MASK 0x30000000 #define DEVCFG_STATUS_PCFG_INIT 0x00000010 +#define DEVCFG_MCTRL_PCAP_LPBK 0x00000010 #define DEVCFG_MCTRL_RFIFO_FLUSH 0x00000002 #define DEVCFG_MCTRL_WFIFO_FLUSH 0x00000001 @@ -216,6 +217,9 @@ int zynq_load(Xilinx_desc *desc, const void *buf, size_t bsize) swap = SWAP_DONE; } + /* Clear loopback bit */ + clrbits_le32(&devcfg_base->mctrl, DEVCFG_MCTRL_PCAP_LPBK); + if (!partialbit) { zynq_slcr_devcfg_disable();