From patchwork Wed Jul 24 22:17:00 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 261544 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id B65582C00D0 for ; Thu, 25 Jul 2013 08:17:48 +1000 (EST) Received: from localhost ([::1]:39301 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V27NS-0002d2-GI for incoming@patchwork.ozlabs.org; Wed, 24 Jul 2013 18:17:46 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45214) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V27Mu-0002aE-2I for qemu-devel@nongnu.org; Wed, 24 Jul 2013 18:17:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V27Mr-0007pW-3h for qemu-devel@nongnu.org; Wed, 24 Jul 2013 18:17:12 -0400 Received: from cantor2.suse.de ([195.135.220.15]:49471 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V27Mq-0007oJ-RG for qemu-devel@nongnu.org; Wed, 24 Jul 2013 18:17:09 -0400 Received: from relay1.suse.de (unknown [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 80823A5211; Thu, 25 Jul 2013 00:17:07 +0200 (CEST) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Thu, 25 Jul 2013 00:17:00 +0200 Message-Id: <1374704220-16610-3-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1374704220-16610-1-git-send-email-afaerber@suse.de> References: <1374704220-16610-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 195.135.220.15 Cc: Peter Maydell , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Paul Brook Subject: [Qemu-devel] [PATCH qom-next for-1.6 2/2] arm11mpcore: QOM cast cleanups for mpcore_rirq_state X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Andreas Färber Reviewed-by: Hu Tao --- hw/cpu/arm11mpcore.c | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/hw/cpu/arm11mpcore.c b/hw/cpu/arm11mpcore.c index 31c9d5a..a786c62 100644 --- a/hw/cpu/arm11mpcore.c +++ b/hw/cpu/arm11mpcore.c @@ -161,11 +161,16 @@ static int mpcore_priv_init(SysBusDevice *sbd) return 0; } +#define TYPE_REALVIEW_MPCORE_RIRQ "realview_mpcore" +#define REALVIEW_MPCORE_RIRQ(obj) \ + OBJECT_CHECK(mpcore_rirq_state, (obj), TYPE_REALVIEW_MPCORE_RIRQ) + /* Dummy PIC to route IRQ lines. The baseboard has 4 independent IRQ controllers. The output of these, plus some of the raw input lines are fed into a single SMP-aware interrupt controller on the CPU. */ typedef struct { - SysBusDevice busdev; + SysBusDevice parent_obj; + SysBusDevice *priv; qemu_irq cpuic[32]; qemu_irq rvic[4][64]; @@ -196,9 +201,10 @@ static void mpcore_rirq_set_irq(void *opaque, int irq, int level) } } -static int realview_mpcore_init(SysBusDevice *dev) +static int realview_mpcore_init(SysBusDevice *sbd) { - mpcore_rirq_state *s = FROM_SYSBUS(mpcore_rirq_state, dev); + DeviceState *dev = DEVICE(sbd); + mpcore_rirq_state *s = REALVIEW_MPCORE_RIRQ(dev); DeviceState *gic; DeviceState *priv; int n; @@ -208,7 +214,7 @@ static int realview_mpcore_init(SysBusDevice *dev) qdev_prop_set_uint32(priv, "num-cpu", s->num_cpu); qdev_init_nofail(priv); s->priv = SYS_BUS_DEVICE(priv); - sysbus_pass_irq(dev, s->priv); + sysbus_pass_irq(sbd, s->priv); for (i = 0; i < 32; i++) { s->cpuic[i] = qdev_get_gpio_in(priv, i); } @@ -220,8 +226,8 @@ static int realview_mpcore_init(SysBusDevice *dev) s->rvic[n][i] = qdev_get_gpio_in(gic, i); } } - qdev_init_gpio_in(&dev->qdev, mpcore_rirq_set_irq, 64); - sysbus_init_mmio(dev, sysbus_mmio_get_region(s->priv, 0)); + qdev_init_gpio_in(dev, mpcore_rirq_set_irq, 64); + sysbus_init_mmio(sbd, sysbus_mmio_get_region(s->priv, 0)); return 0; } @@ -240,7 +246,7 @@ static void mpcore_rirq_class_init(ObjectClass *klass, void *data) } static const TypeInfo mpcore_rirq_info = { - .name = "realview_mpcore", + .name = TYPE_REALVIEW_MPCORE_RIRQ, .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(mpcore_rirq_state), .class_init = mpcore_rirq_class_init,