Patchwork [qom-next,for-1.6,13/14] xilinx_uartlite: Rename xlx_uartlite to XilinxUARTLite

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Submitter Andreas Färber
Date July 24, 2013, 9:42 p.m.
Message ID <1374702140-13771-14-git-send-email-afaerber@suse.de>
Download mbox | patch
Permalink /patch/261529/
State New
Headers show

Comments

Andreas Färber - July 24, 2013, 9:42 p.m.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/char/xilinx_uartlite.c | 21 ++++++++++-----------
 1 file changed, 10 insertions(+), 11 deletions(-)
Edgar Iglesias - July 26, 2013, 3:05 a.m.
On Wed, Jul 24, 2013 at 11:42:18PM +0200, Andreas Färber wrote:
> Signed-off-by: Andreas Färber <afaerber@suse.de>

Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>


> ---
>  hw/char/xilinx_uartlite.c | 21 ++++++++++-----------
>  1 file changed, 10 insertions(+), 11 deletions(-)
> 
> diff --git a/hw/char/xilinx_uartlite.c b/hw/char/xilinx_uartlite.c
> index feca497..929743c 100644
> --- a/hw/char/xilinx_uartlite.c
> +++ b/hw/char/xilinx_uartlite.c
> @@ -46,8 +46,7 @@
>  #define CONTROL_RST_RX    0x02
>  #define CONTROL_IE        0x10
>  
> -struct xlx_uartlite
> -{
> +typedef struct XilinxUARTLite {
>      SysBusDevice busdev;
>      MemoryRegion mmio;
>      CharDriverState *chr;
> @@ -58,9 +57,9 @@ struct xlx_uartlite
>      unsigned int rx_fifo_len;
>  
>      uint32_t regs[R_MAX];
> -};
> +} XilinxUARTLite;
>  
> -static void uart_update_irq(struct xlx_uartlite *s)
> +static void uart_update_irq(XilinxUARTLite *s)
>  {
>      unsigned int irq;
>  
> @@ -71,7 +70,7 @@ static void uart_update_irq(struct xlx_uartlite *s)
>      qemu_set_irq(s->irq, irq);
>  }
>  
> -static void uart_update_status(struct xlx_uartlite *s)
> +static void uart_update_status(XilinxUARTLite *s)
>  {
>      uint32_t r;
>  
> @@ -86,7 +85,7 @@ static void uart_update_status(struct xlx_uartlite *s)
>  static uint64_t
>  uart_read(void *opaque, hwaddr addr, unsigned int size)
>  {
> -    struct xlx_uartlite *s = opaque;
> +    XilinxUARTLite *s = opaque;
>      uint32_t r = 0;
>      addr >>= 2;
>      switch (addr)
> @@ -113,7 +112,7 @@ static void
>  uart_write(void *opaque, hwaddr addr,
>             uint64_t val64, unsigned int size)
>  {
> -    struct xlx_uartlite *s = opaque;
> +    XilinxUARTLite *s = opaque;
>      uint32_t value = val64;
>      unsigned char ch = value;
>  
> @@ -164,7 +163,7 @@ static const MemoryRegionOps uart_ops = {
>  
>  static void uart_rx(void *opaque, const uint8_t *buf, int size)
>  {
> -    struct xlx_uartlite *s = opaque;
> +    XilinxUARTLite *s = opaque;
>  
>      /* Got a byte.  */
>      if (s->rx_fifo_len >= 8) {
> @@ -182,7 +181,7 @@ static void uart_rx(void *opaque, const uint8_t *buf, int size)
>  
>  static int uart_can_rx(void *opaque)
>  {
> -    struct xlx_uartlite *s = opaque;
> +    XilinxUARTLite *s = opaque;
>  
>      return s->rx_fifo_len < sizeof(s->rx_fifo);
>  }
> @@ -194,7 +193,7 @@ static void uart_event(void *opaque, int event)
>  
>  static int xilinx_uartlite_init(SysBusDevice *dev)
>  {
> -    struct xlx_uartlite *s = FROM_SYSBUS(typeof (*s), dev);
> +    XilinxUARTLite *s = FROM_SYSBUS(typeof (*s), dev);
>  
>      sysbus_init_irq(dev, &s->irq);
>  
> @@ -219,7 +218,7 @@ static void xilinx_uartlite_class_init(ObjectClass *klass, void *data)
>  static const TypeInfo xilinx_uartlite_info = {
>      .name          = "xlnx.xps-uartlite",
>      .parent        = TYPE_SYS_BUS_DEVICE,
> -    .instance_size = sizeof (struct xlx_uartlite),
> +    .instance_size = sizeof(XilinxUARTLite),
>      .class_init    = xilinx_uartlite_class_init,
>  };
>  
> -- 
> 1.8.1.4
>

Patch

diff --git a/hw/char/xilinx_uartlite.c b/hw/char/xilinx_uartlite.c
index feca497..929743c 100644
--- a/hw/char/xilinx_uartlite.c
+++ b/hw/char/xilinx_uartlite.c
@@ -46,8 +46,7 @@ 
 #define CONTROL_RST_RX    0x02
 #define CONTROL_IE        0x10
 
-struct xlx_uartlite
-{
+typedef struct XilinxUARTLite {
     SysBusDevice busdev;
     MemoryRegion mmio;
     CharDriverState *chr;
@@ -58,9 +57,9 @@  struct xlx_uartlite
     unsigned int rx_fifo_len;
 
     uint32_t regs[R_MAX];
-};
+} XilinxUARTLite;
 
-static void uart_update_irq(struct xlx_uartlite *s)
+static void uart_update_irq(XilinxUARTLite *s)
 {
     unsigned int irq;
 
@@ -71,7 +70,7 @@  static void uart_update_irq(struct xlx_uartlite *s)
     qemu_set_irq(s->irq, irq);
 }
 
-static void uart_update_status(struct xlx_uartlite *s)
+static void uart_update_status(XilinxUARTLite *s)
 {
     uint32_t r;
 
@@ -86,7 +85,7 @@  static void uart_update_status(struct xlx_uartlite *s)
 static uint64_t
 uart_read(void *opaque, hwaddr addr, unsigned int size)
 {
-    struct xlx_uartlite *s = opaque;
+    XilinxUARTLite *s = opaque;
     uint32_t r = 0;
     addr >>= 2;
     switch (addr)
@@ -113,7 +112,7 @@  static void
 uart_write(void *opaque, hwaddr addr,
            uint64_t val64, unsigned int size)
 {
-    struct xlx_uartlite *s = opaque;
+    XilinxUARTLite *s = opaque;
     uint32_t value = val64;
     unsigned char ch = value;
 
@@ -164,7 +163,7 @@  static const MemoryRegionOps uart_ops = {
 
 static void uart_rx(void *opaque, const uint8_t *buf, int size)
 {
-    struct xlx_uartlite *s = opaque;
+    XilinxUARTLite *s = opaque;
 
     /* Got a byte.  */
     if (s->rx_fifo_len >= 8) {
@@ -182,7 +181,7 @@  static void uart_rx(void *opaque, const uint8_t *buf, int size)
 
 static int uart_can_rx(void *opaque)
 {
-    struct xlx_uartlite *s = opaque;
+    XilinxUARTLite *s = opaque;
 
     return s->rx_fifo_len < sizeof(s->rx_fifo);
 }
@@ -194,7 +193,7 @@  static void uart_event(void *opaque, int event)
 
 static int xilinx_uartlite_init(SysBusDevice *dev)
 {
-    struct xlx_uartlite *s = FROM_SYSBUS(typeof (*s), dev);
+    XilinxUARTLite *s = FROM_SYSBUS(typeof (*s), dev);
 
     sysbus_init_irq(dev, &s->irq);
 
@@ -219,7 +218,7 @@  static void xilinx_uartlite_class_init(ObjectClass *klass, void *data)
 static const TypeInfo xilinx_uartlite_info = {
     .name          = "xlnx.xps-uartlite",
     .parent        = TYPE_SYS_BUS_DEVICE,
-    .instance_size = sizeof (struct xlx_uartlite),
+    .instance_size = sizeof(XilinxUARTLite),
     .class_init    = xilinx_uartlite_class_init,
 };