Patchwork [U-Boot,1/2] omap: overo: update support for Micron 1GB POP

login
register
mail settings
Submitter Ash Charles
Date July 24, 2013, 7:22 p.m.
Message ID <1374693755-16275-1-git-send-email-ash@gumstix.com>
Download mbox | patch
Permalink /patch/261516/
State Accepted
Delegated to: Tom Rini
Headers show

Comments

Ash Charles - July 24, 2013, 7:22 p.m.
From: Steve Sakoman <steve@sakoman.com>

Signed-off-by: Ash Charles <ashcharles@gmail.com>
---
 board/overo/overo.c |    6 ++++++
 board/overo/overo.h |    1 +
 2 files changed, 7 insertions(+)
Tom Rini - Aug. 16, 2013, 1:35 p.m.
On Wed, Jul 24, 2013 at 12:22:34PM -0700, Ash Charles wrote:

> From: Steve Sakoman <steve@sakoman.com>
> 
> Signed-off-by: Ash Charles <ashcharles@gmail.com>
> 
> ---
> board/overo/overo.c |    6 ++++++
>  board/overo/overo.h |    1 +
>  2 files changed, 7 insertions(+)

Applied to u-boot-ti/master, thanks!

Patch

diff --git a/board/overo/overo.c b/board/overo/overo.c
index c10c44c..8df077d 100644
--- a/board/overo/overo.c
+++ b/board/overo/overo.c
@@ -169,6 +169,12 @@  void get_board_mem_timings(struct board_sdrc_timings *timings)
 		timings->ctrlb = HYNIX_V_ACTIMB_165;
 		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
 		break;
+	case REVISION_3: /* Micron 512MB/1024MB, 1/2 banks of 512MB */
+		timings->mcfg = MCFG(512 << 20, 15);
+		timings->ctrla = MICRON_V_ACTIMA_200;
+		timings->ctrlb = MICRON_V_ACTIMB_200;
+		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
+		break;
 	default:
 		timings->mcfg = MICRON_V_MCFG_165(128 << 20);
 		timings->ctrla = MICRON_V_ACTIMA_165;
diff --git a/board/overo/overo.h b/board/overo/overo.h
index b41b628..b984a54 100644
--- a/board/overo/overo.h
+++ b/board/overo/overo.h
@@ -37,6 +37,7 @@  const omap3_sysinfo sysinfo = {
 #define REVISION_0	0x0
 #define REVISION_1	0x1
 #define REVISION_2	0x2
+#define REVISION_3	0x3
 
 /*
  * IEN  - Input Enable