From patchwork Tue Jul 23 02:53:32 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 260946 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 586912C00AC for ; Tue, 23 Jul 2013 13:38:36 +1000 (EST) Received: from localhost ([::1]:51381 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V1Slt-0006cy-9X for incoming@patchwork.ozlabs.org; Mon, 22 Jul 2013 22:56:17 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43524) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V1Sjq-0004e1-DY for qemu-devel@nongnu.org; Mon, 22 Jul 2013 22:54:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V1Sjn-0005EJ-9J for qemu-devel@nongnu.org; Mon, 22 Jul 2013 22:54:10 -0400 Received: from cantor2.suse.de ([195.135.220.15]:49744 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V1Sjm-0005Dx-Ta for qemu-devel@nongnu.org; Mon, 22 Jul 2013 22:54:07 -0400 Received: from relay2.suse.de (unknown [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 92DFAA398F; Tue, 23 Jul 2013 04:54:05 +0200 (CEST) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Tue, 23 Jul 2013 04:53:32 +0200 Message-Id: <1374548036-14471-1-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.8.1.4 MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 195.135.220.15 Cc: Peter Maydell , Mike Frysinger , Jia Liu , TeLeMan , Eduardo Habkost , Max Filippov , Anthony Liguori , Igor Mammedov , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Richard Henderson Subject: [Qemu-devel] [PULL 00/24] QOM CPUState patch queue 2013-07-22 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Hello Anthony, This is my current QOM CPU patch queue for 1.6. Please pull. CPUArchState: 313 -> 287 Thanks, Andreas Cc: Anthony Liguori Cc: Richard Henderson Cc: Jia Liu Cc: Peter Maydell Cc: Max Filippov Cc: TeLeMan Cc: Eduardo Habkost Cc: Igor Mammedov Cc: Mike Frysinger The following changes since commit 3464700f6aecb3e2aa9098839d90672d6b3fa974: tests: Add test-bitops.c with some sextract tests (2013-07-22 15:41:49 -0500) are available in the git repository at: git://github.com/afaerber/qemu-cpu.git tags/qom-cpu-for-anthony for you to fetch changes up to 6f152e9bc80aed81ea89aa8ad345cd71326b71fb: linux-user: Use X86CPU property to retrieve CPUID family (2013-07-23 02:41:33 +0200) ---------------------------------------------------------------- QOM CPUState refactorings * Fix NULL pointer dereference in gdbstub * Introduce vaddr type * Introduce CPUClass::set_pc() * Introduce CPUClass::synchronize_from_tb() * Introduce CPUClass::get_phys_page_debug() * Introduce CPUClass::memory_rw_debug() * Move singlestep_enabled and gdb_regs fields out of CPU_COMMON * Adopt CPUState in more APIs * Propagate CPUState in gdbstub ---------------------------------------------------------------- Andreas Färber (21): gdbstub: Change GDBState::query_cpu to CPUState cpu: Introduce vaddr type cpu: Introduce CPUClass::set_pc() for gdb_set_cpu_pc() target-m68k: Implement CPUClass::set_pc() target-moxie: Implement CPUClass::set_pc() target-unicore32: Implement CPUClass::set_pc() cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb() cpu: Move singlestep_enabled field from CPU_COMMON to CPUState gdbstub: Update gdb_handlesig() and gdb_signalled() Coding Style cpu: Change cpu_single_step() argument to CPUState kvm: Change kvm_{insert,remove}_breakpoint() argument to CPUState gdbstub: Change syscall callback argument to CPUState gdbstub: Change gdb_handlesig() argument to CPUState gdbstub: Change gdb_{read,write}_register() argument to CPUState cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook exec: Change cpu_memory_rw_debug() argument to CPUState cpu: Introduce CPUClass::memory_rw_debug() for target_memory_rw_debug() gdbstub: Change GDBState::{c,g}_cpu and find_cpu() to CPUState cpu: Move gdb_regs field from CPU_COMMON to CPUState gdbstub: Change gdb_register_coprocessor() argument to CPUState linux-user: Use X86CPU property to retrieve CPUID family Peter Maydell (1): HACKING: Document vaddr type usage Richard Henderson (2): target-alpha: Copy singlestep_enabled to DisasContext target-alpha: Copy implver to DisasContext HACKING | 19 ++- bsd-user/main.c | 10 +- cpu-exec.c | 10 +- cpus.c | 6 +- disas.c | 4 +- exec.c | 36 +++--- gdbstub.c | 266 ++++++++++++++++++++---------------------- hw/i386/kvmvapic.c | 78 +++++++------ hw/xtensa/xtensa_lx60.c | 8 +- hw/xtensa/xtensa_sim.c | 10 +- include/exec/cpu-all.h | 14 +-- include/exec/cpu-defs.h | 3 - include/exec/gdbstub.h | 6 +- include/exec/softmmu-semi.h | 18 +-- include/qom/cpu.h | 113 +++++++++--------- include/sysemu/kvm.h | 4 +- kvm-all.c | 12 +- kvm-stub.c | 4 +- linux-user/cpu-uname.c | 10 +- linux-user/main.c | 35 +++--- linux-user/signal.c | 3 +- monitor.c | 2 +- target-alpha/cpu-qom.h | 1 + target-alpha/cpu.c | 15 ++- target-alpha/cpu.h | 5 - target-alpha/helper.c | 5 +- target-alpha/translate.c | 21 ++-- target-arm/arm-semi.c | 10 +- target-arm/cpu-qom.h | 2 + target-arm/cpu.c | 13 ++- target-arm/cpu.h | 5 - target-arm/helper.c | 15 ++- target-arm/translate.c | 7 +- target-cris/cpu-qom.h | 2 + target-cris/cpu.c | 11 ++ target-cris/cpu.h | 4 - target-cris/helper.c | 7 +- target-cris/translate.c | 7 +- target-i386/cpu-qom.h | 2 + target-i386/cpu.c | 19 ++- target-i386/cpu.h | 5 - target-i386/helper.c | 12 +- target-i386/kvm.c | 20 ++-- target-i386/translate.c | 5 +- target-lm32/cpu-qom.h | 1 + target-lm32/cpu.c | 13 ++- target-lm32/cpu.h | 5 - target-lm32/helper.c | 6 +- target-lm32/translate.c | 7 +- target-m68k/cpu-qom.h | 1 + target-m68k/cpu.c | 11 ++ target-m68k/cpu.h | 5 - target-m68k/helper.c | 5 +- target-m68k/m68k-semi.c | 5 +- target-m68k/translate.c | 7 +- target-microblaze/cpu-qom.h | 1 + target-microblaze/cpu.c | 13 ++- target-microblaze/cpu.h | 5 - target-microblaze/helper.c | 4 +- target-microblaze/translate.c | 8 +- target-mips/cpu-qom.h | 1 + target-mips/cpu.c | 30 ++++- target-mips/cpu.h | 7 -- target-mips/helper.c | 7 +- target-mips/translate.c | 11 +- target-moxie/cpu.c | 13 ++- target-moxie/cpu.h | 6 +- target-moxie/helper.c | 11 +- target-moxie/translate.c | 5 +- target-openrisc/cpu.c | 13 ++- target-openrisc/cpu.h | 6 +- target-openrisc/mmu.c | 5 +- target-openrisc/translate.c | 7 +- target-ppc/cpu-qom.h | 1 + target-ppc/cpu.h | 5 - target-ppc/mmu_helper.c | 4 +- target-ppc/translate.c | 8 +- target-ppc/translate_init.c | 26 +++-- target-s390x/cpu-qom.h | 1 + target-s390x/cpu.c | 11 ++ target-s390x/cpu.h | 5 - target-s390x/helper.c | 5 +- target-s390x/translate.c | 5 +- target-sh4/cpu-qom.h | 1 + target-sh4/cpu.c | 20 ++++ target-sh4/cpu.h | 6 - target-sh4/helper.c | 5 +- target-sh4/translate.c | 8 +- target-sparc/cpu-qom.h | 1 + target-sparc/cpu.c | 26 ++++- target-sparc/cpu.h | 11 +- target-sparc/mmu_helper.c | 22 ++-- target-sparc/translate.c | 3 +- target-unicore32/cpu-qom.h | 1 + target-unicore32/cpu.c | 11 ++ target-unicore32/cpu.h | 5 - target-unicore32/softmmu.c | 7 +- target-unicore32/translate.c | 7 +- target-xtensa/cpu-qom.h | 1 + target-xtensa/cpu.c | 11 ++ target-xtensa/cpu.h | 5 - target-xtensa/helper.c | 7 +- target-xtensa/translate.c | 7 +- target-xtensa/xtensa-semi.c | 14 +-- 104 files changed, 783 insertions(+), 550 deletions(-)