From patchwork Tue Jul 23 02:53:47 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 260926 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 002382C00AB for ; Tue, 23 Jul 2013 13:00:11 +1000 (EST) Received: from localhost ([::1]:33290 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V1Spd-0003uu-Rh for incoming@patchwork.ozlabs.org; Mon, 22 Jul 2013 23:00:09 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43663) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V1Sjz-0004vn-Eo for qemu-devel@nongnu.org; Mon, 22 Jul 2013 22:54:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V1Sjx-0005KO-57 for qemu-devel@nongnu.org; Mon, 22 Jul 2013 22:54:19 -0400 Received: from cantor2.suse.de ([195.135.220.15]:49797 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V1Sjw-0005KE-QS for qemu-devel@nongnu.org; Mon, 22 Jul 2013 22:54:17 -0400 Received: from relay2.suse.de (unknown [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 34082A51B7; Tue, 23 Jul 2013 04:54:16 +0200 (CEST) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Tue, 23 Jul 2013 04:53:47 +0200 Message-Id: <1374548036-14471-16-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1374548036-14471-1-git-send-email-afaerber@suse.de> References: <1374548036-14471-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 195.135.220.15 Cc: Peter Maydell , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Paul Brook Subject: [Qemu-devel] [PULL 15/24] gdbstub: Change syscall callback argument to CPUState X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Callback implementations were specific to arm and m68k, so can easily cast to ARMCPU and M68kCPU respectively. Prepares for changing GDBState::c_cpu to CPUState. Signed-off-by: Andreas Färber --- gdbstub.c | 2 +- include/exec/gdbstub.h | 2 +- target-arm/arm-semi.c | 8 ++++++-- target-m68k/m68k-semi.c | 5 ++++- 4 files changed, 12 insertions(+), 5 deletions(-) diff --git a/gdbstub.c b/gdbstub.c index b5e6778..bb44ef2 100644 --- a/gdbstub.c +++ b/gdbstub.c @@ -2205,7 +2205,7 @@ static int gdb_handle_packet(GDBState *s, const char *line_buf) p++; type = *p; if (s->current_syscall_cb) { - s->current_syscall_cb(s->c_cpu, ret, err); + s->current_syscall_cb(ENV_GET_CPU(s->c_cpu), ret, err); s->current_syscall_cb = NULL; } if (type == 'C') { diff --git a/include/exec/gdbstub.h b/include/exec/gdbstub.h index ded4160..de0f4fb 100644 --- a/include/exec/gdbstub.h +++ b/include/exec/gdbstub.h @@ -11,7 +11,7 @@ #define GDB_WATCHPOINT_ACCESS 4 #ifdef NEED_CPU_H -typedef void (*gdb_syscall_complete_cb)(CPUArchState *env, +typedef void (*gdb_syscall_complete_cb)(CPUState *cpu, target_ulong ret, target_ulong err); void gdb_do_syscall(gdb_syscall_complete_cb cb, const char *fmt, ...); diff --git a/target-arm/arm-semi.c b/target-arm/arm-semi.c index 5f01bca..4ecea65 100644 --- a/target-arm/arm-semi.c +++ b/target-arm/arm-semi.c @@ -122,8 +122,10 @@ static target_ulong arm_semi_syscall_len; static target_ulong syscall_err; #endif -static void arm_semi_cb(CPUARMState *env, target_ulong ret, target_ulong err) +static void arm_semi_cb(CPUState *cs, target_ulong ret, target_ulong err) { + ARMCPU *cpu = ARM_CPU(cs); + CPUARMState *env = &cpu->env; #ifdef CONFIG_USER_ONLY TaskState *ts = env->opaque; #endif @@ -152,8 +154,10 @@ static void arm_semi_cb(CPUARMState *env, target_ulong ret, target_ulong err) } } -static void arm_semi_flen_cb(CPUARMState *env, target_ulong ret, target_ulong err) +static void arm_semi_flen_cb(CPUState *cs, target_ulong ret, target_ulong err) { + ARMCPU *cpu = ARM_CPU(cs); + CPUARMState *env = &cpu->env; /* The size is always stored in big-endian order, extract the value. We assume the size always fit in 32 bits. */ uint32_t size; diff --git a/target-m68k/m68k-semi.c b/target-m68k/m68k-semi.c index 239fadb..94c4983 100644 --- a/target-m68k/m68k-semi.c +++ b/target-m68k/m68k-semi.c @@ -161,8 +161,11 @@ static void m68k_semi_return_u64(CPUM68KState *env, uint64_t ret, uint32_t err) static int m68k_semi_is_fseek; -static void m68k_semi_cb(CPUM68KState *env, target_ulong ret, target_ulong err) +static void m68k_semi_cb(CPUState *cs, target_ulong ret, target_ulong err) { + M68kCPU *cpu = M68K_CPU(cs); + CPUM68KState *env = &cpu->env; + if (m68k_semi_is_fseek) { /* FIXME: We've already lost the high bits of the fseek return value. */