From patchwork Tue Jul 23 02:43:14 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 260917 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 444A22C00AF for ; Tue, 23 Jul 2013 12:48:52 +1000 (EST) Received: from localhost ([::1]:35873 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V1Seg-0005ux-2D for incoming@patchwork.ozlabs.org; Mon, 22 Jul 2013 22:48:50 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40921) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V1SZe-00088a-0f for qemu-devel@nongnu.org; Mon, 22 Jul 2013 22:43:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V1SZc-0000ro-Dd for qemu-devel@nongnu.org; Mon, 22 Jul 2013 22:43:37 -0400 Received: from cantor2.suse.de ([195.135.220.15]:49471 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V1SZc-0000rh-4h for qemu-devel@nongnu.org; Mon, 22 Jul 2013 22:43:36 -0400 Received: from relay1.suse.de (unknown [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 93B39A398F; Tue, 23 Jul 2013 04:43:35 +0200 (CEST) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Tue, 23 Jul 2013 04:43:14 +0200 Message-Id: <1374547404-11700-7-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1374547404-11700-1-git-send-email-afaerber@suse.de> References: <1374547404-11700-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 195.135.220.15 Cc: Peter Maydell , Paul Brook Subject: [Qemu-devel] [PATCH v2 06/16] cpu/a9mpcore: Embed A9SCUState X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Andreas Färber Prepares for QOM realize. Signed-off-by: Andreas Färber --- hw/cpu/a9mpcore.c | 16 ++++++++++------ hw/misc/a9scu.c | 18 +----------------- include/hw/misc/a9scu.h | 31 +++++++++++++++++++++++++++++++ 3 files changed, 42 insertions(+), 23 deletions(-) create mode 100644 include/hw/misc/a9scu.h diff --git a/hw/cpu/a9mpcore.c b/hw/cpu/a9mpcore.c index d157387..eba2de1 100644 --- a/hw/cpu/a9mpcore.c +++ b/hw/cpu/a9mpcore.c @@ -10,6 +10,7 @@ #include "hw/sysbus.h" #include "hw/intc/arm_gic.h" +#include "hw/misc/a9scu.h" #define TYPE_A9MPCORE_PRIV "a9mpcore_priv" #define A9MPCORE_PRIV(obj) \ @@ -24,10 +25,10 @@ typedef struct A9MPPrivState { MemoryRegion container; DeviceState *mptimer; DeviceState *wdt; - DeviceState *scu; uint32_t num_irq; GICState gic; + A9SCUState scu; } A9MPPrivState; static void a9mp_priv_set_irq(void *opaque, int irq, int level) @@ -46,12 +47,15 @@ static void a9mp_priv_initfn(Object *obj) object_initialize(&s->gic, TYPE_ARM_GIC); qdev_set_parent_bus(DEVICE(&s->gic), sysbus_get_default()); + + object_initialize(&s->scu, TYPE_A9_SCU); + qdev_set_parent_bus(DEVICE(&s->scu), sysbus_get_default()); } static int a9mp_priv_init(SysBusDevice *dev) { A9MPPrivState *s = A9MPCORE_PRIV(dev); - DeviceState *gicdev; + DeviceState *gicdev, *scudev; SysBusDevice *timerbusdev, *wdtbusdev, *gicbusdev, *scubusdev; int i; @@ -67,10 +71,10 @@ static int a9mp_priv_init(SysBusDevice *dev) /* Pass through inbound GPIO lines to the GIC */ qdev_init_gpio_in(DEVICE(dev), a9mp_priv_set_irq, s->num_irq - 32); - s->scu = qdev_create(NULL, "a9-scu"); - qdev_prop_set_uint32(s->scu, "num-cpu", s->num_cpu); - qdev_init_nofail(s->scu); - scubusdev = SYS_BUS_DEVICE(s->scu); + scudev = DEVICE(&s->scu); + qdev_prop_set_uint32(scudev, "num-cpu", s->num_cpu); + qdev_init_nofail(scudev); + scubusdev = SYS_BUS_DEVICE(&s->scu); s->mptimer = qdev_create(NULL, "arm_mptimer"); qdev_prop_set_uint32(s->mptimer, "num-cpu", s->num_cpu); diff --git a/hw/misc/a9scu.c b/hw/misc/a9scu.c index 2661014..4434945 100644 --- a/hw/misc/a9scu.c +++ b/hw/misc/a9scu.c @@ -8,23 +8,7 @@ * This code is licensed under the GPL. */ -#include "hw/sysbus.h" - -/* A9MP private memory region. */ - -typedef struct A9SCUState { - /*< private >*/ - SysBusDevice parent_obj; - /*< public >*/ - - MemoryRegion iomem; - uint32_t control; - uint32_t status; - uint32_t num_cpu; -} A9SCUState; - -#define TYPE_A9_SCU "a9-scu" -#define A9_SCU(obj) OBJECT_CHECK(A9SCUState, (obj), TYPE_A9_SCU) +#include "hw/misc/a9scu.h" static uint64_t a9_scu_read(void *opaque, hwaddr offset, unsigned size) diff --git a/include/hw/misc/a9scu.h b/include/hw/misc/a9scu.h new file mode 100644 index 0000000..efb0c30 --- /dev/null +++ b/include/hw/misc/a9scu.h @@ -0,0 +1,31 @@ +/* + * Cortex-A9MPCore Snoop Control Unit (SCU) emulation. + * + * Copyright (c) 2009 CodeSourcery. + * Copyright (c) 2011 Linaro Limited. + * Written by Paul Brook, Peter Maydell. + * + * This code is licensed under the GPL. + */ +#ifndef HW_MISC_A9SCU_H +#define HW_MISC_A9SCU_H + +#include "hw/sysbus.h" + +/* A9MP private memory region. */ + +typedef struct A9SCUState { + /*< private >*/ + SysBusDevice parent_obj; + /*< public >*/ + + MemoryRegion iomem; + uint32_t control; + uint32_t status; + uint32_t num_cpu; +} A9SCUState; + +#define TYPE_A9_SCU "a9-scu" +#define A9_SCU(obj) OBJECT_CHECK(A9SCUState, (obj), TYPE_A9_SCU) + +#endif