@@ -46,10 +46,6 @@ static void q35_host_realize(DeviceState *dev, Error **errp)
sysbus_add_io(sbd, MCH_HOST_BRIDGE_CONFIG_DATA, &pci->data_mem);
sysbus_init_ioports(sbd, MCH_HOST_BRIDGE_CONFIG_DATA, 4);
- if (pcie_host_init(PCIE_HOST_BRIDGE(s)) < 0) {
- error_setg(errp, "failed to initialize pcie host");
- return;
- }
pci->bus = pci_bus_new(DEVICE(s), "pcie.0",
s->mch.pci_address_space, s->mch.address_space_io,
0, TYPE_PCIE_BUS);
@@ -107,11 +107,11 @@ static const MemoryRegionOps pcie_mmcfg_ops = {
/* pcie_host::base_addr == PCIE_BASE_ADDR_UNMAPPED when it isn't mapped. */
#define PCIE_BASE_ADDR_UNMAPPED ((hwaddr)-1ULL)
-int pcie_host_init(PCIExpressHost *e)
+static void pcie_host_init(Object *obj)
{
- e->base_addr = PCIE_BASE_ADDR_UNMAPPED;
+ PCIExpressHost *e = PCIE_HOST_BRIDGE(obj);
- return 0;
+ e->base_addr = PCIE_BASE_ADDR_UNMAPPED;
}
void pcie_host_mmcfg_unmap(PCIExpressHost *e)
@@ -152,6 +152,7 @@ static const TypeInfo pcie_host_type_info = {
.parent = TYPE_PCI_HOST_BRIDGE,
.abstract = true,
.instance_size = sizeof(PCIExpressHost),
+ .instance_init = pcie_host_init,
};
static void pcie_host_register_types(void)
@@ -43,7 +43,6 @@ struct PCIExpressHost {
MemoryRegion mmio;
};
-int pcie_host_init(PCIExpressHost *e);
void pcie_host_mmcfg_unmap(PCIExpressHost *e);
void pcie_host_mmcfg_map(PCIExpressHost *e, hwaddr addr, uint32_t size);
void pcie_host_mmcfg_update(PCIExpressHost *e,
This assures the trivial field initialization is applied for any derived type - currently only Q35PCIHost. Signed-off-by: Andreas Färber <afaerber@suse.de> --- hw/pci-host/q35.c | 4 ---- hw/pci/pcie_host.c | 7 ++++--- include/hw/pci/pcie_host.h | 1 - 3 files changed, 4 insertions(+), 8 deletions(-)