From patchwork Mon Jul 22 17:50:05 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 260776 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id B1FD22C009E for ; Tue, 23 Jul 2013 03:51:15 +1000 (EST) Received: from localhost ([::1]:37916 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V1KGP-0007TR-Fz for incoming@patchwork.ozlabs.org; Mon, 22 Jul 2013 13:51:13 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58435) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V1KFX-0007In-2a for qemu-devel@nongnu.org; Mon, 22 Jul 2013 13:50:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V1KFS-0001lT-Vp for qemu-devel@nongnu.org; Mon, 22 Jul 2013 13:50:18 -0400 Received: from cantor2.suse.de ([195.135.220.15]:36285 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V1KFS-0001l5-L4; Mon, 22 Jul 2013 13:50:14 -0400 Received: from relay1.suse.de (unknown [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id BBFD0A0FED; Mon, 22 Jul 2013 19:50:13 +0200 (CEST) From: Alexander Graf To: "qemu-ppc@nongnu.org list:PowerPC" Date: Mon, 22 Jul 2013 19:50:05 +0200 Message-Id: <1374515411-43818-4-git-send-email-agraf@suse.de> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1374515411-43818-1-git-send-email-agraf@suse.de> References: <1374515411-43818-1-git-send-email-agraf@suse.de> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 195.135.220.15 Cc: Peter Maydell , qemu-devel Developers Subject: [Qemu-devel] [PATCH 3/9] PlatBus: Add Sysbus/Platform bridge device X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org We have to be able to plug our platform bus into an existing system somehow. To achieve this, we add a sysbus <-> platbus bridge device that maps an arbitrary number of IRQ lines to a self-contained linear platform IRQ range. It also provides a memory region that is the parent region for all platform devices that get created below this bus. Signed-off-by: Alexander Graf --- hw/platbus/bridge.c | 64 +++++++++++++++++++++++++++++++++++++++++++++ include/hw/platbus/bridge.h | 32 +++++++++++++++++++++++ 2 files changed, 96 insertions(+) create mode 100644 hw/platbus/bridge.c create mode 100644 include/hw/platbus/bridge.h diff --git a/hw/platbus/bridge.c b/hw/platbus/bridge.c new file mode 100644 index 0000000..356d254 --- /dev/null +++ b/hw/platbus/bridge.c @@ -0,0 +1,64 @@ +/* + * Sysbus to Platform bus bridge device + * + * Copyright 2013 Freescale Semiconductor, Inc. + * + * Authors: Alexander Graf, + * + * This is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This bridge device allows you to plug a platform bus into your existing + * system bus. + */ + +#include "qemu-common.h" +#include "hw/platbus/bridge.h" + +static void platbus_bridge_realize(DeviceState *dev, Error **errp) +{ + SysBusDevice *d = SYS_BUS_DEVICE(dev); + PlatBusBridgeState *s = PLATBUS_BRIDGE(dev); + int i; + + /* Create platform bus */ + qbus_create_inplace(&s->bus.parent_obj, TYPE_PLAT_BUS, dev, NULL); + + /* Wire up all platbus IRQs to sysbus IRQs. */ + for (i = 0; i < s->nr_irqs; i++) { + sysbus_init_irq(d, &s->bus.irqs[i]); + platbus_add_irq(&s->bus, i); + } + + /* Advertise our platbus memory hole to sysbus. Through this a guest OS + can access platbus devices */ + sysbus_init_mmio(d, &s->bus.mem); +} + +static Property platbus_bridge_properties[] = { + DEFINE_PROP_UINT32("nr_irqs", PlatBusBridgeState, nr_irqs, 0), + DEFINE_PROP_END_OF_LIST(), +}; + +static void serial_platbus_class_init(ObjectClass *oc, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(oc); + dc->props = platbus_bridge_properties; + dc->realize = platbus_bridge_realize; +} + +static const TypeInfo platbus_bridge_type_info = { + .name = TYPE_PLATBUS_BRIDGE, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(PlatBusBridgeState), + .class_init = serial_platbus_class_init, +}; + +static void platbus_bridge_register_types(void) +{ + type_register_static(&platbus_bridge_type_info); +} + +type_init(platbus_bridge_register_types) diff --git a/include/hw/platbus/bridge.h b/include/hw/platbus/bridge.h new file mode 100644 index 0000000..4d31fcb --- /dev/null +++ b/include/hw/platbus/bridge.h @@ -0,0 +1,32 @@ +/* + * Generic platform bus with dynamic IRQ and IO placement + * + * Copyright 2013 Freescale Semiconductor, Inc. + * + * Authors: Alexander Graf, + * + * This is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef QEMU_HW_PLATBUS_BRIDGE_H +#define QEMU_HW_PLATBUS_BRIDGE_H + +#include "platbus.h" +#include "hw/sysbus.h" + +#define TYPE_PLATBUS_BRIDGE "platbus-bridge" +#define PLATBUS_BRIDGE(obj) OBJECT_CHECK(PlatBusBridgeState, (obj), TYPE_PLATBUS_BRIDGE) + +typedef struct PlatBusBridgeState { + /*< private >*/ + SysBusDevice parent_obj; + /*< public >*/ + + PlatBusState bus; + uint32_t nr_irqs; +} PlatBusBridgeState; + +#endif /* !QEMU_HW_PLATBUS_BRIDGE_H */