From patchwork Mon Jul 22 12:14:36 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gerhard Sittig X-Patchwork-Id: 260656 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id BD1A72C0188 for ; Mon, 22 Jul 2013 22:23:11 +1000 (EST) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.9]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 4A2212C0144 for ; Mon, 22 Jul 2013 22:15:50 +1000 (EST) Received: from frontend1.mail.m-online.net (unknown [192.168.8.180]) by mail-out.m-online.net (Postfix) with ESMTP id 3bzMGq43yGz4KK61; Mon, 22 Jul 2013 14:15:47 +0200 (CEST) Received: from localhost (dynscan1.mnet-online.de [192.168.6.68]) by mail.m-online.net (Postfix) with ESMTP id 3bzMGq3QPxzbbl4; Mon, 22 Jul 2013 14:15:47 +0200 (CEST) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.180]) by localhost (dynscan1.mail.m-online.net [192.168.6.68]) (amavisd-new, port 10024) with ESMTP id MZ2ZvFjl1GPk; Mon, 22 Jul 2013 14:15:46 +0200 (CEST) X-Auth-Info: HDoAUUzi0Y+zx8hsFZICHdONRSxZI19gsc2zFYNuWnE= Received: from localhost (host-82-135-33-74.customer.m-online.net [82.135.33.74]) by mail.mnet-online.de (Postfix) with ESMTPA; Mon, 22 Jul 2013 14:15:46 +0200 (CEST) From: Gerhard Sittig To: linuxppc-dev@lists.ozlabs.org, Anatolij Gustschin , Mike Turquette , linux-arm-kernel@lists.infradead.org, devicetree-discuss@lists.ozlabs.org Subject: [PATCH v3 09/31] powerpc/fsl-pci: improve clock API use Date: Mon, 22 Jul 2013 14:14:36 +0200 Message-Id: <1374495298-22019-10-git-send-email-gsi@denx.de> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1374495298-22019-1-git-send-email-gsi@denx.de> References: <1374166855-7280-1-git-send-email-gsi@denx.de> <1374495298-22019-1-git-send-email-gsi@denx.de> Cc: Detlev Zundel , Wolfram Sang , Greg Kroah-Hartman , Gerhard Sittig , Rob Herring , Mark Brown , Marc Kleine-Budde , David Woodhouse , Wolfgang Grandegger , Mauro Carvalho Chehab X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" make the Freescale PCI driver get, prepare and enable the PCI clock during probe() clock lookup is non-fatal as not all platforms may provide clock specs in their device tree, but failure to enable specified clocks are fatal the driver appears to not have a remove() routine, so no reference to the clock is kept during use, and the clock isn't released (the devm approach will put the clock, but it won't get disabled or unprepared) Signed-off-by: Gerhard Sittig --- arch/powerpc/sysdev/fsl_pci.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index 46ac1dd..5e2f411 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c @@ -17,6 +17,8 @@ * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. */ + +#include #include #include #include @@ -926,12 +928,33 @@ void fsl_pci_assign_primary(void) static int fsl_pci_probe(struct platform_device *pdev) { + struct clk *clk; int ret; struct device_node *node; #ifdef CONFIG_SWIOTLB struct pci_controller *hose; #endif + /* + * clock lookup is non-fatal since the driver is shared among + * platforms and not all of them provide clocks specs in their + * device tree, but failure to enable a specified clock is + * considered fatal + */ + clk = devm_clk_get(&pdev->dev, "per"); + if (!IS_ERR(clk)) { + ret = clk_prepare_enable(clk); + if (ret) { + dev_err(dev, "Could not enable peripheral clock\n"); + devm_clk_put(&pdev->dev, clk); + return ret; + } + /* + * TODO where to store the 'clk' reference? there appears + * to be no remove() routine which undoes what probe() does + */ + } + node = pdev->dev.of_node; ret = fsl_add_bridge(pdev, fsl_pci_primary == node);