| Message ID | 000a01ce846a$7ff53820$7fdfa860$@bolton@arm.com |
|---|---|
| State | New |
| Headers | show |
On 19/07/13 11:26, Ian Bolton wrote: >> On 12 Jul 2013, at 19:49, Ian Bolton <ian.bolton@arm.com> wrote: >> >>> >>> 2013-07-12 Ian Bolton <ian.bolton@arm.com> >>> >>> gcc/ >>> * config/aarch64/arm_neon.h (vabs_s64): New function. >>> >>> testsuite/ >>> * gcc.target/aarch64/scalar_intrinsics.c (test_vabs_s64): Added >> new >>> test.<aarch64-vabs-intrinsic-svn-patch-v4.txt> >> >> OK >> /Marcus > > I needed to update the patch to match argument naming conventions and > function ordering conventions. Here is the new one. > > OK for commit? > > Cheers, > Ian > OK /Marcus
Index: gcc/config/aarch64/arm_neon.h =================================================================== --- gcc/config/aarch64/arm_neon.h (revision 200594) +++ gcc/config/aarch64/arm_neon.h (working copy) @@ -17874,6 +17874,12 @@ vabs_f32 (float32x2_t __a) return __builtin_aarch64_absv2sf (__a); } +__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) +vabs_s64 (int64x1_t __a) +{ + return __builtin_llabs (__a); +} + __extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) vabsq_f32 (float32x4_t __a) { Index: gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c =================================================================== --- gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c (revision 200594) +++ gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c (working copy) @@ -32,6 +32,18 @@ test_vaddd_s64_2 (int64x1_t a, int64x1_t vqaddd_s64 (a, d)); } +/* { dg-final { scan-assembler-times "\\tabs\\td\[0-9\]+, d\[0-9\]+" 1 } } */ + +int64x1_t +test_vabs_s64 (int64x1_t a) +{ + uint64x1_t res; + force_simd (a); + res = vabs_s64 (a); + force_simd (res); + return res; +} + /* { dg-final { scan-assembler-times "\\tcmeq\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */ uint64x1_t