From patchwork Thu Jul 18 20:20:54 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gerhard Sittig X-Patchwork-Id: 260149 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id 3082D2C03EC for ; Fri, 19 Jul 2013 06:26:14 +1000 (EST) Received: from mail-out.m-online.net (mail-out.m-online.net [IPv6:2001:a60:0:28:0:1:25:1]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 7BF382C00E9; Fri, 19 Jul 2013 06:21:31 +1000 (EST) Received: from frontend1.mail.m-online.net (frontend1.mail.intern.m-online.net [192.168.8.180]) by mail-out.m-online.net (Postfix) with ESMTP id 3bx6F30SWKz3hhYP; Thu, 18 Jul 2013 22:21:27 +0200 (CEST) Received: from localhost (dynscan1.mnet-online.de [192.168.6.68]) by mail.m-online.net (Postfix) with ESMTP id 3bx6F2755mzbbgx; Thu, 18 Jul 2013 22:21:26 +0200 (CEST) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.180]) by localhost (dynscan1.mail.m-online.net [192.168.6.68]) (amavisd-new, port 10024) with ESMTP id aH5NFP9cUEK9; Thu, 18 Jul 2013 22:21:25 +0200 (CEST) X-Auth-Info: vTHlPReor2UQbPpO2GIraXUsM8tSC6wro7rPNxaU18I= Received: from localhost (host-82-135-33-74.customer.m-online.net [82.135.33.74]) by mail.mnet-online.de (Postfix) with ESMTPA; Thu, 18 Jul 2013 22:21:25 +0200 (CEST) From: Gerhard Sittig To: linuxppc-dev@lists.ozlabs.org, Anatolij Gustschin , Mike Turquette , linux-arm-kernel@lists.infradead.org, devicetree-discuss@lists.ozlabs.org Subject: [PATCH v2 20/24] fs_enet: OF clock lookup (non-fatal), prepare and enable Date: Thu, 18 Jul 2013 22:20:54 +0200 Message-Id: <1374178858-8683-6-git-send-email-gsi@denx.de> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1374166855-7280-1-git-send-email-gsi@denx.de> References: <1374166855-7280-1-git-send-email-gsi@denx.de> Cc: Detlev Zundel , Wolfram Sang , Greg Kroah-Hartman , Gerhard Sittig , Rob Herring , Mark Brown , Marc Kleine-Budde , David Woodhouse , Wolfgang Grandegger , Mauro Carvalho Chehab X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" device tree based clock lookup, must prepare clocks before enabling them, unprepare after disable, error check in the clock setup, remove the pre-enable workaround in the MPC512x platform's clock driver this change implements non-fatal clock lookup since not all platforms provide device tree specs for clocks, but failure to enable a specified clock is considered fatal Signed-off-by: Gerhard Sittig --- arch/powerpc/platforms/512x/clock-commonclk.c | 1 - .../net/ethernet/freescale/fs_enet/fs_enet-main.c | 27 +++++++++++++++++++- include/linux/fs_enet_pd.h | 3 +++ 3 files changed, 29 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c b/arch/powerpc/platforms/512x/clock-commonclk.c index 49c52bc..e9451a7 100644 --- a/arch/powerpc/platforms/512x/clock-commonclk.c +++ b/arch/powerpc/platforms/512x/clock-commonclk.c @@ -691,7 +691,6 @@ static void mpc512x_clk_setup_clock_tree(int busfreq) clk_prepare_enable(clks[MPC512x_CLK_LPC]); /* boot media */ /* some are not yet acquired by their respective drivers */ clk_prepare_enable(clks[MPC512x_CLK_PSC3_MCLK]);/* serial console */ - clk_prepare_enable(clks[MPC512x_CLK_FEC]); /* network, NFS */ /* * some have their individual clock subtree with separate clock * items and their individual enable counters, yet share a diff --git a/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c b/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c index 8de53a1..df92e12 100644 --- a/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c +++ b/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c @@ -1020,6 +1020,21 @@ static int fs_enet_probe(struct platform_device *ofdev) fpi->cp_command = *data; } + /* make clock lookup non-fatal (the driver is shared among platforms), + * but require enable to succeed when a clock was specified/found + */ + fpi->clk_per = clk_get(&ofdev->dev, "per"); + if (IS_ERR(fpi->clk_per)) + fpi->clk_per = NULL; + if (fpi->clk_per) { + int err; + err = clk_prepare_enable(fpi->clk_per); + if (err) { + ret = err; + goto out_clk_put; + } + } + fpi->rx_ring = 32; fpi->tx_ring = 32; fpi->rx_copybreak = 240; @@ -1028,7 +1043,7 @@ static int fs_enet_probe(struct platform_device *ofdev) fpi->phy_node = of_parse_phandle(ofdev->dev.of_node, "phy-handle", 0); if ((!fpi->phy_node) && (!of_get_property(ofdev->dev.of_node, "fixed-link", NULL))) - goto out_free_fpi; + goto out_clk_dis; if (of_device_is_compatible(ofdev->dev.of_node, "fsl,mpc5125-fec")) { phy_connection_type = of_get_property(ofdev->dev.of_node, @@ -1108,6 +1123,12 @@ out_free_dev: free_netdev(ndev); out_put: of_node_put(fpi->phy_node); +out_clk_dis: + if (fpi->clk_per) + clk_disable_unprepare(fpi->clk_per); +out_clk_put: + if (fpi->clk_per) + clk_put(fpi->clk_per); out_free_fpi: kfree(fpi); return ret; @@ -1124,6 +1145,10 @@ static int fs_enet_remove(struct platform_device *ofdev) fep->ops->cleanup_data(ndev); dev_set_drvdata(fep->dev, NULL); of_node_put(fep->fpi->phy_node); + if (fep->fpi->clk_per) { + clk_disable_unprepare(fep->fpi->clk_per); + clk_put(fep->fpi->clk_per); + } free_netdev(ndev); return 0; } diff --git a/include/linux/fs_enet_pd.h b/include/linux/fs_enet_pd.h index 51b7934..a978d0d 100644 --- a/include/linux/fs_enet_pd.h +++ b/include/linux/fs_enet_pd.h @@ -16,6 +16,7 @@ #ifndef FS_ENET_PD_H #define FS_ENET_PD_H +#include #include #include #include @@ -142,6 +143,8 @@ struct fs_platform_info { int use_rmii; /* use RMII mode */ int has_phy; /* if the network is phy container as well...*/ + + struct clk *clk_per; /* 'per' clock for register access */ }; struct fs_mii_fec_platform_info { u32 irq[32];