From patchwork Thu Jul 18 17:00:39 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gerhard Sittig X-Patchwork-Id: 260104 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id E92842C0516 for ; Fri, 19 Jul 2013 03:09:07 +1000 (EST) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.9]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id E72812C0147; Fri, 19 Jul 2013 03:01:47 +1000 (EST) Received: from frontend1.mail.m-online.net (unknown [192.168.8.180]) by mail-out.m-online.net (Postfix) with ESMTP id 3bx1pd0RKVz4KK6G; Thu, 18 Jul 2013 19:01:45 +0200 (CEST) Received: from localhost (dynscan1.mnet-online.de [192.168.6.68]) by mail.m-online.net (Postfix) with ESMTP id 3bx1pd00CHzbbfQ; Thu, 18 Jul 2013 19:01:44 +0200 (CEST) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.180]) by localhost (dynscan1.mail.m-online.net [192.168.6.68]) (amavisd-new, port 10024) with ESMTP id GYDjD9DQtWw5; Thu, 18 Jul 2013 19:01:42 +0200 (CEST) X-Auth-Info: aulrC9sG+Mfkza472zRFgAQOAqEIXzlFz+9DKqwRHAQ= Received: from localhost (kons-4d026967.pool.mediaWays.net [77.2.105.103]) by mail.mnet-online.de (Postfix) with ESMTPA; Thu, 18 Jul 2013 19:01:42 +0200 (CEST) From: Gerhard Sittig To: linuxppc-dev@lists.ozlabs.org, Anatolij Gustschin , Mike Turquette , linux-arm-kernel@lists.infradead.org, devicetree-discuss@lists.ozlabs.org Subject: [PATCH v2 08/24] dts: mpc512x: add clock related device tree specs Date: Thu, 18 Jul 2013 19:00:39 +0200 Message-Id: <1374166855-7280-9-git-send-email-gsi@denx.de> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1374166855-7280-1-git-send-email-gsi@denx.de> References: <1373914074-20889-1-git-send-email-gsi@denx.de> <1374166855-7280-1-git-send-email-gsi@denx.de> Cc: Detlev Zundel , Wolfram Sang , Greg Kroah-Hartman , Gerhard Sittig , Rob Herring , Mark Brown , Marc Kleine-Budde , David Woodhouse , Wolfgang Grandegger , Mauro Carvalho Chehab X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" this addresses the clock driver aka provider's side of clocks - prepare for future '<&clks ID>' phandle references for device tree based clock lookup in client drivers - introduce a 'clocks' subtree with an 'osc' node for the crystal or oscillator SoC input (fixed frequency) - provide default values with 33MHz oscillator frequency in the common include (the 66MHz IPS bus already was there), add override values for the ifm AC14xx board which deviates from the reference design (25MHz xtal, 80MHz IPS bus) Signed-off-by: Gerhard Sittig --- arch/powerpc/boot/dts/ac14xx.dts | 7 +++++++ arch/powerpc/boot/dts/mpc5121.dtsi | 15 ++++++++++++++- 2 files changed, 21 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/boot/dts/ac14xx.dts b/arch/powerpc/boot/dts/ac14xx.dts index a543c40..a1b8837 100644 --- a/arch/powerpc/boot/dts/ac14xx.dts +++ b/arch/powerpc/boot/dts/ac14xx.dts @@ -139,7 +139,14 @@ }; }; + clocks { + osc { + clock-frequency = <25000000>; + }; + }; + soc@80000000 { + bus-frequency = <80000000>; /* 80 MHz ips bus */ clock@f00 { compatible = "fsl,mpc5121rev2-clock", "fsl,mpc5121-clock"; diff --git a/arch/powerpc/boot/dts/mpc5121.dtsi b/arch/powerpc/boot/dts/mpc5121.dtsi index bd14c00..8f4cba0 100644 --- a/arch/powerpc/boot/dts/mpc5121.dtsi +++ b/arch/powerpc/boot/dts/mpc5121.dtsi @@ -9,6 +9,8 @@ * option) any later version. */ +#include + /dts-v1/; / { @@ -73,6 +75,16 @@ ranges = <0x0 0x0 0xfc000000 0x04000000>; }; + clocks { + #address-cells = <1>; + #size-cells = <0>; + + osc { + compatible = "fsl,mpc512x-osc", "fixed-clock"; + clock-frequency = <33000000>; + }; + }; + soc@80000000 { compatible = "fsl,mpc5121-immr"; #address-cells = <1>; @@ -118,9 +130,10 @@ }; /* Clock control */ - clock@f00 { + clks: clock@f00 { compatible = "fsl,mpc5121-clock"; reg = <0xf00 0x100>; + #clock-cells = <1>; }; /* Power Management Controller */