From patchwork Thu Jul 18 17:00:38 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gerhard Sittig X-Patchwork-Id: 260103 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id A0C222C0A32 for ; Fri, 19 Jul 2013 03:08:27 +1000 (EST) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.9]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 76CE22C0104; Fri, 19 Jul 2013 03:01:42 +1000 (EST) Received: from frontend1.mail.m-online.net (unknown [192.168.8.180]) by mail-out.m-online.net (Postfix) with ESMTP id 3bx1pW3xr9z4KK6F; Thu, 18 Jul 2013 19:01:39 +0200 (CEST) Received: from localhost (dynscan1.mnet-online.de [192.168.6.68]) by mail.m-online.net (Postfix) with ESMTP id 3bx1pW3Pm0zbbcw; Thu, 18 Jul 2013 19:01:39 +0200 (CEST) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.180]) by localhost (dynscan1.mail.m-online.net [192.168.6.68]) (amavisd-new, port 10024) with ESMTP id TCMXY0GiN33h; Thu, 18 Jul 2013 19:01:38 +0200 (CEST) X-Auth-Info: mp6EnAm+IKCRVKbhr1B8QhzSUvEeb5y/pM96k4XsH0I= Received: from localhost (kons-4d026967.pool.mediaWays.net [77.2.105.103]) by mail.mnet-online.de (Postfix) with ESMTPA; Thu, 18 Jul 2013 19:01:38 +0200 (CEST) From: Gerhard Sittig To: linuxppc-dev@lists.ozlabs.org, Anatolij Gustschin , Mike Turquette , linux-arm-kernel@lists.infradead.org, devicetree-discuss@lists.ozlabs.org Subject: [PATCH v2 07/24] dts: mpc512x: introduce dt-bindings/clock/ header Date: Thu, 18 Jul 2013 19:00:38 +0200 Message-Id: <1374166855-7280-8-git-send-email-gsi@denx.de> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1374166855-7280-1-git-send-email-gsi@denx.de> References: <1373914074-20889-1-git-send-email-gsi@denx.de> <1374166855-7280-1-git-send-email-gsi@denx.de> Cc: Detlev Zundel , Wolfram Sang , Greg Kroah-Hartman , Gerhard Sittig , Rob Herring , Mark Brown , Marc Kleine-Budde , David Woodhouse , Wolfgang Grandegger , Mauro Carvalho Chehab X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" introduce a dt-bindings/ header file for MPC512x clocks, providing symbolic identifiers for those SoC clocks which clients will reference from their device tree nodes Signed-off-by: Gerhard Sittig --- include/dt-bindings/clock/mpc512x-clock.h | 59 +++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 include/dt-bindings/clock/mpc512x-clock.h diff --git a/include/dt-bindings/clock/mpc512x-clock.h b/include/dt-bindings/clock/mpc512x-clock.h new file mode 100644 index 0000000..46c560e --- /dev/null +++ b/include/dt-bindings/clock/mpc512x-clock.h @@ -0,0 +1,59 @@ +/* + * This header provides constants for MPC512x clock specs in DT bindings. + * + * Unfortunately the clock number declaration cannot be an enum but + * needs to be a list of #define directives since when referenced from + * within DTS files they need to get resolved "at compile time". + */ + +#ifndef _DT_BINDINGS_CLOCK_MPC512x_CLOCK_H +#define _DT_BINDINGS_CLOCK_MPC512x_CLOCK_H + +#define MPC512x_CLK_DUMMY 0 +#define MPC512x_CLK_REF 1 +#define MPC512x_CLK_SYS 2 +#define MPC512x_CLK_DIU 3 +#define MPC512x_CLK_VIU 4 +#define MPC512x_CLK_CSB 5 +#define MPC512x_CLK_E300 6 +#define MPC512x_CLK_IPS 7 +#define MPC512x_CLK_FEC 8 +#define MPC512x_CLK_SATA 9 +#define MPC512x_CLK_PATA 10 +#define MPC512x_CLK_NFC 11 +#define MPC512x_CLK_LPC 12 +#define MPC512x_CLK_MBX_BUS 13 +#define MPC512x_CLK_MBX 14 +#define MPC512x_CLK_MBX_3D 15 +#define MPC512x_CLK_AXE 16 +#define MPC512x_CLK_USB1 17 +#define MPC512x_CLK_USB2 18 +#define MPC512x_CLK_I2C 19 +#define MPC512x_CLK_MSCAN0_MCLK 20 +#define MPC512x_CLK_MSCAN1_MCLK 21 +#define MPC512x_CLK_MSCAN2_MCLK 22 +#define MPC512x_CLK_MSCAN3_MCLK 23 +#define MPC512x_CLK_SDHC 24 +#define MPC512x_CLK_PCI 25 +#define MPC512x_CLK_PSC_MCLK_IN 26 +#define MPC512x_CLK_SPDIF_TX 27 +#define MPC512x_CLK_SPDIF_RX 28 +#define MPC512x_CLK_SPDIF_MCLK 29 +#define MPC512x_CLK_AC97 30 +#define MPC512x_CLK_PSC0_MCLK 31 +#define MPC512x_CLK_PSC1_MCLK 32 +#define MPC512x_CLK_PSC2_MCLK 33 +#define MPC512x_CLK_PSC3_MCLK 34 +#define MPC512x_CLK_PSC4_MCLK 35 +#define MPC512x_CLK_PSC5_MCLK 36 +#define MPC512x_CLK_PSC6_MCLK 37 +#define MPC512x_CLK_PSC7_MCLK 38 +#define MPC512x_CLK_PSC8_MCLK 39 +#define MPC512x_CLK_PSC9_MCLK 40 +#define MPC512x_CLK_PSC10_MCLK 41 +#define MPC512x_CLK_PSC11_MCLK 42 +#define MPC512x_CLK_PSC_FIFO 43 + +#define MPC512x_CLK_LAST_PUBLIC 43 + +#endif