Patchwork [U-Boot] nds32: Enable FPU if the version of CPU supported

login
register
mail settings
Submitter ken kuo
Date July 17, 2013, 5:20 p.m.
Message ID <1374081632-3684-1-git-send-email-ken.kuoky@gmail.com>
Download mbox | patch
Permalink /patch/259732/
State Superseded
Delegated to: Macpaul Lin
Headers show

Comments

ken kuo - July 17, 2013, 5:20 p.m.
Some version of Andes core support FPU coprocessor, if this is the case,
we should enable it at low level initialization time.

Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
---
 arch/nds32/cpu/n1213/ag101/lowlevel_init.S |   22 ++++++++++++++++++++++
 arch/nds32/cpu/n1213/ag102/lowlevel_init.S |   22 ++++++++++++++++++++++
 2 files changed, 44 insertions(+)
Andes - July 18, 2013, 7:16 a.m.
Hi Kuan-Yu Kuo,

2013/7/18 Kuan-Yu Kuo <ken.kuoky@gmail.com>:
> +       /*
> +        * enable_fpu:
> +        *  Some of Andes CPU version support FPU coprocessor, if so,
> +        *  we should enable it.
> +        */
> +enable_fpu:
> +       mfsr    $r0, $CPU_VER           /* enable FPU if it exists */
> +       srli    $r0, $r0, 3
> +       andi    $r0, $r0, 1
> +       beqz    $r0, 1f                                         /* skip if no COP */
> +       mfsr    $r0, $FUCOP_EXIST
> +       srli    $r0, $r0, 31
> +       beqz    $r0, 1f                                         /* skip if no FPU */
> +       mfsr    $r0, $FUCOP_CTL
> +       ori     $r0, $r0, 1
> +       mtsr    $r0, $FUCOP_CTL

There are two kinds of toolchain in Andes architecture, one is FPU supported and the other is not, for the latter one, there is no need to enable FPU even if the processor supports it.
This code snippet only useful for the toolchain that will generate FPU instructions, so add compile option to determine Andes predefined macros would be better.
For example:
#if defined(NDS32_EXT_FPU_DP) || defined(NDS32_EXT_FPU_SP)

Andes Technology Corporation
Macpaul Lin - July 24, 2013, 5:20 a.m.
Hi Kuan-Yu,

2013/7/18  <uboot@andestech.com>:
> Hi Kuan-Yu Kuo,
>
...
>> +enable_fpu:
>> +       mfsr    $r0, $CPU_VER           /* enable FPU if it exists */
>> +       srli    $r0, $r0, 3
>> +       andi    $r0, $r0, 1
>> +       beqz    $r0, 1f                                         /* skip if no COP */
>> +       mfsr    $r0, $FUCOP_EXIST
>> +       srli    $r0, $r0, 31
>> +       beqz    $r0, 1f                                         /* skip if no FPU */
>> +       mfsr    $r0, $FUCOP_CTL
>> +       ori     $r0, $r0, 1
>> +       mtsr    $r0, $FUCOP_CTL

WARNING: line over 80 characters
#53: FILE: arch/nds32/cpu/n1213/ag101/lowlevel_init.S:249:
+       beqz    $r0, 1f                                         /*
skip if no COP */

WARNING: line over 80 characters
#56: FILE: arch/nds32/cpu/n1213/ag101/lowlevel_init.S:252:
+       beqz    $r0, 1f                                         /*
skip if no FPU */

WARNING: line over 80 characters
#93: FILE: arch/nds32/cpu/n1213/ag102/lowlevel_init.S:304:
+       beqz    $r0, 1f                                         /*
skip if no COP */

WARNING: line over 80 characters
#96: FILE: arch/nds32/cpu/n1213/ag102/lowlevel_init.S:307:
+       beqz    $r0, 1f                                         /*
skip if no FPU */

1. Please clean up this patch and check with checkpatch.pl then resend it.

>
> There are two kinds of toolchain in Andes architecture, one is FPU supported and the other is not, for the latter one, there is no need to enable FPU even if the processor supports it.
> This code snippet only useful for the toolchain that will generate FPU instructions, so add compile option to determine Andes predefined macros would be better.
> For example:
> #if defined(NDS32_EXT_FPU_DP) || defined(NDS32_EXT_FPU_SP)
>
> Andes Technology Corporation

2. According to the official suggestion from Andes Technology
Corporation, your patch will be better to reorganized with these macro
definitions to help the toolchain to distinguish the differences.
But! The most users cannot distinguish the differences of  these
toolchain-with-SoC combination, hence I think to keep the most
Error-Proof protection will be better.

Thanks.

Patch

diff --git a/arch/nds32/cpu/n1213/ag101/lowlevel_init.S b/arch/nds32/cpu/n1213/ag101/lowlevel_init.S
index 55985cf..b4c2b0f 100644
--- a/arch/nds32/cpu/n1213/ag101/lowlevel_init.S
+++ b/arch/nds32/cpu/n1213/ag101/lowlevel_init.S
@@ -98,6 +98,9 @@  lowlevel_init:
 	led	0x10
 	jal	remap
 
+	led	0x1f
+	jal	enable_fpu
+
 	led	0x20
 	ret	$r10
 
@@ -234,6 +237,25 @@  relo_base:
 2:
 	ret
 
+	/*
+	 * enable_fpu:
+	 *  Some of Andes CPU version support FPU coprocessor, if so,
+	 *  we should enable it.
+	 */
+enable_fpu:
+	mfsr    $r0, $CPU_VER 		/* enable FPU if it exists */
+	srli    $r0, $r0, 3
+	andi    $r0, $r0, 1
+	beqz    $r0, 1f						/* skip if no COP */
+	mfsr    $r0, $FUCOP_EXIST
+	srli    $r0, $r0, 31
+	beqz    $r0, 1f						/* skip if no FPU */
+	mfsr    $r0, $FUCOP_CTL
+	ori     $r0, $r0, 1
+	mtsr    $r0, $FUCOP_CTL
+1:
+	ret
+
 .globl show_led
 show_led:
     li      $r8, (CONFIG_DEBUG_LED)
diff --git a/arch/nds32/cpu/n1213/ag102/lowlevel_init.S b/arch/nds32/cpu/n1213/ag102/lowlevel_init.S
index d842afa..345f316 100644
--- a/arch/nds32/cpu/n1213/ag102/lowlevel_init.S
+++ b/arch/nds32/cpu/n1213/ag102/lowlevel_init.S
@@ -114,6 +114,9 @@  lowlevel_init:
 	led	0x20
 	jal	remap
 
+	led	0x2f
+	jal	enable_fpu
+
 	led	0x30
 	ret	$r10
 
@@ -289,6 +292,25 @@  relo_base:
 2:
 	ret
 
+	/*
+	 * enable_fpu:
+	 *  Some of Andes CPU version support FPU coprocessor, if so,
+	 *  we should enable it.
+	 */
+enable_fpu:
+	mfsr    $r0, $CPU_VER 		/* enable FPU if it exists */
+	srli    $r0, $r0, 3
+	andi    $r0, $r0, 1
+	beqz    $r0, 1f						/* skip if no COP */
+	mfsr    $r0, $FUCOP_EXIST
+	srli    $r0, $r0, 31
+	beqz    $r0, 1f						/* skip if no FPU */
+	mfsr    $r0, $FUCOP_CTL
+	ori     $r0, $r0, 1
+	mtsr    $r0, $FUCOP_CTL
+1:
+	ret
+
 .globl show_led
 show_led:
     li      $r8, (CONFIG_DEBUG_LED)