From patchwork Mon Jul 15 16:01:35 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 259106 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 05DB92C00D8 for ; Tue, 16 Jul 2013 02:04:11 +1000 (EST) Received: from localhost ([::1]:43790 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UylFw-0004Lu-TW for incoming@patchwork.ozlabs.org; Mon, 15 Jul 2013 12:04:08 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56910) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UylDi-0000mK-Ha for qemu-devel@nongnu.org; Mon, 15 Jul 2013 12:01:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UylDd-0005fV-QY for qemu-devel@nongnu.org; Mon, 15 Jul 2013 12:01:50 -0400 Received: from 1.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.d.1.0.0.b.8.0.1.0.0.2.ip6.arpa ([2001:8b0:1d0::1]:58608 helo=mnementh.archaic.org.uk) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UylDd-0005dd-AE for qemu-devel@nongnu.org; Mon, 15 Jul 2013 12:01:45 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1UylDU-0007Bw-8L; Mon, 15 Jul 2013 17:01:36 +0100 From: Peter Maydell To: Anthony Liguori Date: Mon, 15 Jul 2013 17:01:35 +0100 Message-Id: <1373904095-27592-8-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1373904095-27592-1-git-send-email-peter.maydell@linaro.org> References: <1373904095-27592-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:8b0:1d0::1 Cc: qemu-devel@nongnu.org, Paul Brook Subject: [Qemu-devel] [PULL 7/7] ARM/highbank: add support for Calxeda ECX-2000 / Midway X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Andre Przywara The Calxeda ECX-2000 chip (aka. Midway) is model-wise quite similar to the Highbank. The most prominent difference is the Cortex-A15 CPU core in it, together with the associated core peripherals. Add a new ARM machine type called "midway". Move the L2 cache controller device into the Highbank specific part, since Midway does not have (and need) it. Signed-off-by: Andre Przywara Message-id: 1373026897-12085-3-git-send-email-andre.przywara@calxeda.com Signed-off-by: Peter Maydell --- hw/arm/highbank.c | 32 +++++++++++++++++++++++++++----- 1 file changed, 27 insertions(+), 5 deletions(-) diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index b8a7dd4..be264d3 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -185,6 +185,7 @@ static struct arm_boot_info highbank_binfo; enum cxmachines { CALXEDA_HIGHBANK, + CALXEDA_MIDWAY, }; /* ram_size must be set to match the upper bound of memory in the @@ -216,6 +217,9 @@ static void calxeda_init(QEMUMachineInitArgs *args, enum cxmachines machine) case CALXEDA_HIGHBANK: cpu_model = "cortex-a9"; break; + case CALXEDA_MIDWAY: + cpu_model = "cortex-a15"; + break; } } @@ -256,8 +260,16 @@ static void calxeda_init(QEMUMachineInitArgs *args, enum cxmachines machine) switch (machine) { case CALXEDA_HIGHBANK: + dev = qdev_create(NULL, "l2x0"); + qdev_init_nofail(dev); + busdev = SYS_BUS_DEVICE(dev); + sysbus_mmio_map(busdev, 0, 0xfff12000); + dev = qdev_create(NULL, "a9mpcore_priv"); break; + case CALXEDA_MIDWAY: + dev = qdev_create(NULL, "a15mpcore_priv"); + break; } qdev_prop_set_uint32(dev, "num-cpu", smp_cpus); qdev_prop_set_uint32(dev, "num-irq", NIRQ_GIC); @@ -272,11 +284,6 @@ static void calxeda_init(QEMUMachineInitArgs *args, enum cxmachines machine) pic[n] = qdev_get_gpio_in(dev, n); } - dev = qdev_create(NULL, "l2x0"); - qdev_init_nofail(dev); - busdev = SYS_BUS_DEVICE(dev); - sysbus_mmio_map(busdev, 0, 0xfff12000); - dev = qdev_create(NULL, "sp804"); qdev_prop_set_uint32(dev, "freq0", 150000000); qdev_prop_set_uint32(dev, "freq1", 150000000); @@ -341,6 +348,11 @@ static void highbank_init(QEMUMachineInitArgs *args) calxeda_init(args, CALXEDA_HIGHBANK); } +static void midway_init(QEMUMachineInitArgs *args) +{ + calxeda_init(args, CALXEDA_MIDWAY); +} + static QEMUMachine highbank_machine = { .name = "highbank", .desc = "Calxeda Highbank (ECX-1000)", @@ -350,9 +362,19 @@ static QEMUMachine highbank_machine = { DEFAULT_MACHINE_OPTIONS, }; +static QEMUMachine midway_machine = { + .name = "midway", + .desc = "Calxeda Midway (ECX-2000)", + .init = midway_init, + .block_default_type = IF_SCSI, + .max_cpus = 4, + DEFAULT_MACHINE_OPTIONS, +}; + static void calxeda_machines_init(void) { qemu_register_machine(&highbank_machine); + qemu_register_machine(&midway_machine); } machine_init(calxeda_machines_init);