From patchwork Mon Jul 15 04:12:38 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Crosthwaite X-Patchwork-Id: 258950 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id EFC322C0185 for ; Mon, 15 Jul 2013 14:17:41 +1000 (EST) Received: from localhost ([::1]:51291 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UyaEF-0004Z3-Mu for incoming@patchwork.ozlabs.org; Mon, 15 Jul 2013 00:17:39 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59417) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UyaDr-0004V4-Rx for qemu-devel@nongnu.org; Mon, 15 Jul 2013 00:17:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UyaDq-0006j5-Jv for qemu-devel@nongnu.org; Mon, 15 Jul 2013 00:17:15 -0400 Received: from mail-pb0-f44.google.com ([209.85.160.44]:43384) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UyaDq-0006iu-AP for qemu-devel@nongnu.org; Mon, 15 Jul 2013 00:17:14 -0400 Received: by mail-pb0-f44.google.com with SMTP id uo1so10804987pbc.3 for ; Sun, 14 Jul 2013 21:17:13 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=auuv/lniKvIzEH8mEBB9cjzJSkk3huXdMvDjFwhVZhU=; b=NzRA3R/lMP9yd9gWckSBy5BDKbhEaWg7KmtoP7aqcgHQocGEBo1HpDQhsRWXnUDzrs 9PnQRURO8r96BIKXpH4lFuPJFju3LIYFjWsDNGD8cyHDVZ2R8sfqmgjyocrg2LJsGToJ tRijZP2v5621uW4KXKLRbIOw7PPC54phnmS8GMhW36yeRYblfzV2bH4/ZxKFBlcsFy1H yEP7xlkHNiPRMu+T93Xbg1tf4f1ZlIqMfTALiUMwwNLO9ixIdiC7lg45qhdlk4+V1Fdw QwT7ljrB/cK/8pz4uG99DQwvO9aE8DoadMhf6C7iW1VtH7Veep0C2PHqHYU9Sgbb5xb0 w/DQ== X-Received: by 10.68.212.106 with SMTP id nj10mr51873725pbc.74.1373861833597; Sun, 14 Jul 2013 21:17:13 -0700 (PDT) Received: from localhost ([203.126.243.116]) by mx.google.com with ESMTPSA id sq5sm61918209pab.11.2013.07.14.21.17.09 for (version=TLSv1.1 cipher=RC4-SHA bits=128/128); Sun, 14 Jul 2013 21:17:12 -0700 (PDT) From: peter.crosthwaite@xilinx.com To: afaerber@suse.de Date: Mon, 15 Jul 2013 14:12:38 +1000 Message-Id: <2661f7e58644d2b40afb640715994ea800957c26.1373861126.git.peter.crosthwaite@xilinx.com> X-Mailer: git-send-email 1.8.3.rc1.44.gb387c77.dirty In-Reply-To: References: X-Gm-Message-State: ALoCoQm4W4wOKoSsIqUac1HcOADid09HBl5s25Qyc/dwp6LfrHRJaOpiUKxCkhsvRie2Ffuk8rUH X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.160.44 Cc: peter.maydell@linaro.org, hutao@cn.fujitsu.com, aliguori@us.ibm.com, qemu-devel@nongnu.org, mst@redhat.com Subject: [Qemu-devel] [PATCH qom-next v3 4/4] i8254: Use parent class for realize X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Peter Crosthwaite [KVM]PITClass is only needed for parent-class realize function access. Just use parent classes for realize access and remove [KVM]PITClass completely. Signed-off-by: Peter Crosthwaite --- hw/i386/kvm/i8254.c | 19 ++++--------------- hw/timer/i8254.c | 17 ++++------------- 2 files changed, 8 insertions(+), 28 deletions(-) diff --git a/hw/i386/kvm/i8254.c b/hw/i386/kvm/i8254.c index c1f4094..f92c241 100644 --- a/hw/i386/kvm/i8254.c +++ b/hw/i386/kvm/i8254.c @@ -33,10 +33,8 @@ #define CALIBRATION_ROUNDS 3 #define KVM_PIT(obj) OBJECT_CHECK(KVMPITState, (obj), TYPE_KVM_I8254) -#define KVM_PIT_CLASS(class) \ - OBJECT_CLASS_CHECK(KVMPITClass, (class), TYPE_KVM_I8254) -#define KVM_PIT_GET_CLASS(obj) \ - OBJECT_GET_CLASS(KVMPITClass, (obj), TYPE_KVM_I8254) +#define KVM_PIT_PARENT_CLASS \ + object_class_get_parent(object_class_by_name(TYPE_KVM_I8254)) typedef struct KVMPITState { PITCommonState parent_obj; @@ -46,12 +44,6 @@ typedef struct KVMPITState { int64_t kernel_clock_offset; } KVMPITState; -typedef struct KVMPITClass { - PITCommonClass parent_class; - - DeviceRealize parent_realize; -} KVMPITClass; - static int64_t abs64(int64_t v) { return v < 0 ? -v : v; @@ -250,7 +242,7 @@ static void kvm_pit_vm_state_change(void *opaque, int running, static void kvm_pit_realizefn(DeviceState *dev, Error **errp) { PITCommonState *pit = PIT_COMMON(dev); - KVMPITClass *kpc = KVM_PIT_GET_CLASS(dev); + DeviceClass *dc_parent = DEVICE_CLASS(KVM_PIT_PARENT_CLASS); KVMPITState *s = KVM_PIT(pit); struct kvm_pit_config config = { .flags = 0, @@ -294,7 +286,7 @@ static void kvm_pit_realizefn(DeviceState *dev, Error **errp) qemu_add_vm_change_state_handler(kvm_pit_vm_state_change, s); - kpc->parent_realize(dev, errp); + dc_parent->realize(dev, errp); } static Property kvm_pit_properties[] = { @@ -306,11 +298,9 @@ static Property kvm_pit_properties[] = { static void kvm_pit_class_init(ObjectClass *klass, void *data) { - KVMPITClass *kpc = KVM_PIT_CLASS(klass); PITCommonClass *k = PIT_COMMON_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass); - kpc->parent_realize = dc->realize; dc->realize = kvm_pit_realizefn; k->set_channel_gate = kvm_pit_set_gate; k->get_channel_info = kvm_pit_get_channel_info; @@ -325,7 +315,6 @@ static const TypeInfo kvm_pit_info = { .parent = TYPE_PIT_COMMON, .instance_size = sizeof(KVMPITState), .class_init = kvm_pit_class_init, - .class_size = sizeof(KVMPITClass), }; static void kvm_pit_register(void) diff --git a/hw/timer/i8254.c b/hw/timer/i8254.c index cd52140..e74cc50 100644 --- a/hw/timer/i8254.c +++ b/hw/timer/i8254.c @@ -35,14 +35,8 @@ #define RW_STATE_WORD0 3 #define RW_STATE_WORD1 4 -#define PIT_CLASS(class) OBJECT_CLASS_CHECK(PITClass, (class), TYPE_I8254) -#define PIT_GET_CLASS(obj) OBJECT_GET_CLASS(PITClass, (obj), TYPE_I8254) - -typedef struct PITClass { - PITCommonClass parent_class; - - DeviceRealize parent_realize; -} PITClass; +#define I8254_PARENT_CLASS \ + object_class_get_parent(object_class_by_name(TYPE_I8254)) static void pit_irq_timer_update(PITChannelState *s, int64_t current_time); @@ -325,7 +319,7 @@ static void pit_post_load(PITCommonState *s) static void pit_realizefn(DeviceState *dev, Error **err) { PITCommonState *pit = PIT_COMMON(dev); - PITClass *pc = PIT_GET_CLASS(dev); + DeviceClass *dc_parent = DEVICE_CLASS(I8254_PARENT_CLASS); PITChannelState *s; s = &pit->channels[0]; @@ -338,7 +332,7 @@ static void pit_realizefn(DeviceState *dev, Error **err) qdev_init_gpio_in(dev, pit_irq_control, 1); - pc->parent_realize(dev, err); + dc_parent->realize(dev, err); } static Property pit_properties[] = { @@ -348,11 +342,9 @@ static Property pit_properties[] = { static void pit_class_initfn(ObjectClass *klass, void *data) { - PITClass *pc = PIT_CLASS(klass); PITCommonClass *k = PIT_COMMON_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass); - pc->parent_realize = dc->realize; dc->realize = pit_realizefn; k->set_channel_gate = pit_set_channel_gate; k->get_channel_info = pit_get_channel_info_common; @@ -366,7 +358,6 @@ static const TypeInfo pit_info = { .parent = TYPE_PIT_COMMON, .instance_size = sizeof(PITCommonState), .class_init = pit_class_initfn, - .class_size = sizeof(PITClass), }; static void pit_register_types(void)