From patchwork Mon Jul 15 03:24:43 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Kardashevskiy X-Patchwork-Id: 258942 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 2778A2C0114 for ; Mon, 15 Jul 2013 13:25:16 +1000 (EST) Received: from localhost ([::1]:57893 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UyZPV-0005wv-BC for incoming@patchwork.ozlabs.org; Sun, 14 Jul 2013 23:25:13 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47035) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UyZPF-0005uC-W0 for qemu-devel@nongnu.org; Sun, 14 Jul 2013 23:24:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UyZPD-0005ta-Ew for qemu-devel@nongnu.org; Sun, 14 Jul 2013 23:24:57 -0400 Received: from mail-pd0-f172.google.com ([209.85.192.172]:56747) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UyZPD-0005tB-8Q for qemu-devel@nongnu.org; Sun, 14 Jul 2013 23:24:55 -0400 Received: by mail-pd0-f172.google.com with SMTP id z10so10273360pdj.31 for ; Sun, 14 Jul 2013 20:24:53 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:x-gm-message-state; bh=itf3PsqysCQz5kbQw5lnhCnPXQiW1qrEM6pPfW1qqxQ=; b=MzR4V8TPQngEu9u8uXIdR1Qa40e3t/ID8r296HIUe2rCJ6z83yS2KyIM0/y3PLIvXu H+WNLSm1QanlurE6VRaDxqluYLy2NuLU3/hJXClBIXrd2Y1/gc/Z9QxFpV5jdQTDsr6j KP+kHI5HdLyYgvsT/2HJFFzuRXSZnHytYhPTjgt2ZxDEEUjcql2D0amYDnkhc2uOjcHm 09PbcVGVfopUY58iI6O9bB/9G/3TAf85d0JGQfk0OqHyaSZEAgFRtheQBMRIaC/ovy7u eEcO04pIAqCX8J4EL7tqXjw2tmHvRPaU6y0jNXwpecUiuJv7SnC4BNl70VE28q8vQuFO sdTQ== X-Received: by 10.66.219.38 with SMTP id pl6mr54028497pac.59.1373858693641; Sun, 14 Jul 2013 20:24:53 -0700 (PDT) Received: from ka1.ozlabs.ibm.com (ibmaus65.lnk.telstra.net. [165.228.126.9]) by mx.google.com with ESMTPSA id sz6sm61710728pab.5.2013.07.14.20.24.48 for (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 14 Jul 2013 20:24:52 -0700 (PDT) From: Alexey Kardashevskiy To: qemu-devel@nongnu.org Date: Mon, 15 Jul 2013 13:24:43 +1000 Message-Id: <1373858683-28415-1-git-send-email-aik@ozlabs.ru> X-Mailer: git-send-email 1.8.3.2 X-Gm-Message-State: ALoCoQmm+btiT0RF49bhhF0uixCO+8efb9WoJbnJd7tf9Vvb7QnWB5xx4De/3npVEw3LMpNrJQBj X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.192.172 Cc: Anthony Liguori , Alexey Kardashevskiy , Alexander Graf , qemu-ppc@nongnu.org, Paul Mackerras , David Gibson Subject: [Qemu-devel] [PATCH] spapr-pci: remove io ports workaround X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org As it looks like all portio users have migrated to new portio api, the workaround with memory access to io ports routing is no more needed. This also fixes a bug with byte swapping as the io region was marked as little endian while it should not do any swapping at all. Signed-off-by: Alexey Kardashevskiy --- hw/ppc/spapr_pci.c | 52 +++------------------------------------------------- 1 file changed, 3 insertions(+), 49 deletions(-) diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index ca588aa..8d76290 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -440,43 +440,6 @@ static void pci_spapr_set_irq(void *opaque, int irq_num, int level) qemu_set_irq(spapr_phb_lsi_qirq(phb, irq_num), level); } -static uint64_t spapr_io_read(void *opaque, hwaddr addr, - unsigned size) -{ - switch (size) { - case 1: - return cpu_inb(addr); - case 2: - return cpu_inw(addr); - case 4: - return cpu_inl(addr); - } - g_assert_not_reached(); -} - -static void spapr_io_write(void *opaque, hwaddr addr, - uint64_t data, unsigned size) -{ - switch (size) { - case 1: - cpu_outb(addr, data); - return; - case 2: - cpu_outw(addr, data); - return; - case 4: - cpu_outl(addr, data); - return; - } - g_assert_not_reached(); -} - -static const MemoryRegionOps spapr_io_ops = { - .endianness = DEVICE_LITTLE_ENDIAN, - .read = spapr_io_read, - .write = spapr_io_write -}; - /* * MSI/MSIX memory region implementation. * The handler handles both MSI and MSIX. @@ -590,23 +553,14 @@ static int spapr_phb_init(SysBusDevice *s) memory_region_add_subregion(get_system_memory(), sphb->mem_win_addr, &sphb->memwindow); - /* On ppc, we only have MMIO no specific IO space from the CPU - * perspective. In theory we ought to be able to embed the PCI IO - * memory region direction in the system memory space. However, - * if any of the IO BAR subregions use the old_portio mechanism, - * that won't be processed properly unless accessed from the - * system io address space. This hack to bounce things via - * system_io works around the problem until all the users of - * old_portion are updated */ + /* Initialize IO regions */ sprintf(namebuf, "%s.io", sphb->dtbusname); memory_region_init(&sphb->iospace, OBJECT(sphb), namebuf, SPAPR_PCI_IO_WIN_SIZE); - /* FIXME: fix to support multiple PHBs */ - memory_region_add_subregion(get_system_io(), 0, &sphb->iospace); sprintf(namebuf, "%s.io-alias", sphb->dtbusname); - memory_region_init_io(&sphb->iowindow, OBJECT(sphb), &spapr_io_ops, sphb, - namebuf, SPAPR_PCI_IO_WIN_SIZE); + memory_region_init_alias(&sphb->iowindow, OBJECT(sphb), + namebuf, &sphb->iospace, 0, SPAPR_PCI_IO_WIN_SIZE); memory_region_add_subregion(get_system_memory(), sphb->io_win_addr, &sphb->iowindow);