| Message ID | 1373858683-28415-1-git-send-email-aik@ozlabs.ru |
|---|---|
| State | New |
| Headers | show |
On 15.07.2013, at 05:24, Alexey Kardashevskiy wrote: > As it looks like all portio users have migrated to new portio api, > the workaround with memory access to io ports routing is no more > needed. > > This also fixes a bug with byte swapping as the io region was marked > as little endian while it should not do any swapping at all. > > Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> This patch breaks VGA with -enable-kvm (PR) for me. Alex
On 07/15/2013 04:06 PM, Alexander Graf wrote: > > On 15.07.2013, at 05:24, Alexey Kardashevskiy wrote: > >> As it looks like all portio users have migrated to new portio api, >> the workaround with memory access to io ports routing is no more >> needed. >> >> This also fixes a bug with byte swapping as the io region was marked >> as little endian while it should not do any swapping at all. >> >> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> > > This patch breaks VGA with -enable-kvm (PR) for me. I wish I could understand the memory region thingy but I cannot :-( Without this patch, portio_list_add from vga_init adds a port to address_space_io. With my patch, it adds a port to address_space_memory and then port accesses cannot reach correct memoryregionops callbacks and VGA does not work. Networking (rtl8139, e1000, virtio) still works but in contrast to VGA, those devices map PCI IO BARs but not individual ports. Any idea? Or my initial patch (where I just changed endianness from LITTLE to NATIVE) was still correct and this is how thing are supposed to work? Oh... This is what I get with my patch: info mtree memory 0000000000000000-7ffffffffffffffe (prio 0, RW): system 0000000000000000-000000003fffffff (prio 0, RW): ppc_spapr.ram 0000010080000000-000001008000ffff (prio 0, RW): alias pci@800000020000000.io-alias @pci@800000020000000.io 0000000000000000-000000000000ffff 00000100a0000000-00000100bfffffff (prio 0, RW): alias pci@800000020000000.mmio-alias @pci@800000020000000.mmio 0000000080000000-000000009fffffff 0000040000000000-000004000000ffff (prio 0, RW): msi I/O 0000000000000000-000000000000ffff (prio 0, RW): io pci@800000020000000 0000000000000000-7fffffffffffffff (prio 0, RW): iommu-spapr l-lan@71000002 0000000000000000-7fffffffffffffff (prio 0, RW): iommu-spapr v-scsi@71000003 0000000000000000-7fffffffffffffff (prio 0, RW): iommu-spapr VGA 0000000000000000-7fffffffffffffff (prio 0, RW): alias bus master @iommu-spapr 0000000000000000-7fffffffffffffff pci-ohci 0000000000000000-7fffffffffffffff (prio 0, RW): alias bus master @iommu-spapr 0000000000000000-7fffffffffffffff aliases pci@800000020000000.io 0000000000000000-000000000000ffff (prio 0, RW): pci@800000020000000.io 00000000000001ce-00000000000001ce (prio 0, RW): vbe 00000000000001d0-00000000000001d0 (prio 0, RW): vbe 00000000000003b4-00000000000003b5 (prio 0, RW): vga 00000000000003ba-00000000000003ba (prio 0, RW): vga 00000000000003c0-00000000000003cf (prio 0, RW): vga 00000000000003d4-00000000000003d5 (prio 0, RW): vga 00000000000003da-00000000000003da (prio 0, RW): vga pci@800000020000000.mmio 0000000000000000-7ffffffffffffffe (prio 0, RW): pci@800000020000000.mmio 00000000000a0000-00000000000bffff (prio 1, RW): vga-lowmem 0000000080000000-0000000080ffffff (prio 1, RW): vga.vram 0000000090000000-0000000090000fff (prio 1, RW): vga.mmio 0000000090000400-000000009000041f (prio 0, RW): vga ioports remapped 0000000090000500-0000000090000515 (prio 0, RW): bochs dispi interface 0000000090010000-000000009001ffff (prio 1, RW): vga.rom 0000000090020000-00000000900200ff (prio 1, RW): ohci iommu-spapr 0000000000000000-7fffffffffffffff (prio 0, RW): iommu-spapr And this is what I get without the patch (when VGA works). btw here mtree_print_mr asserts in int128_get64(), had to replace assert with "if (a.hi) return -1;" root@erif_root:~# (qemu) info mtree memory 0000000000000000-7ffffffffffffffe (prio 0, RW): system 0000000000000000-000000003fffffff (prio 0, RW): ppc_spapr.ram 0000010080000000-000001008000ffff (prio 0, RW): pci@800000020000000.io-alias 0000010090000000-00000100901fffff (prio 0, RW): pci@800000020000000.msi 00000100a0000000-00000100bfffffff (prio 0, RW): alias pci@800000020000000.mmio-alias @pci@800000020000000.mmio 0000000080000000-000000009fffffff I/O 0000000000000000-000000000000ffff (prio 0, RW): io 0000000000000000-000000000000ffff (prio 0, RW): pci@800000020000000.io 00000000000001ce-00000000000001ce (prio 0, RW): vbe 00000000000001d0-00000000000001d0 (prio 0, RW): vbe 00000000000003b4-00000000000003b5 (prio 0, RW): vga 00000000000003ba-00000000000003ba (prio 0, RW): vga 00000000000003c0-00000000000003cf (prio 0, RW): vga 00000000000003d4-00000000000003d5 (prio 0, RW): vga 00000000000003da-00000000000003da (prio 0, RW): vga pci@800000020000000 0000000000000000-ffffffffffffffff (prio 0, RW): iommu-spapr l-lan@71000002 0000000000000000-ffffffffffffffff (prio 0, RW): iommu-spapr v-scsi@71000003 0000000000000000-ffffffffffffffff (prio 0, RW): iommu-spapr VGA 0000000000000000-ffffffffffffffff (prio 0, RW): alias bus master @iommu-spapr 0000000000000000-fffffffffffffffe pci-ohci 0000000000000000-ffffffffffffffff (prio 0, RW): alias bus master @iommu-spapr 0000000000000000-fffffffffffffffe aliases pci@800000020000000.mmio 0000000000000000-7ffffffffffffffe (prio 0, RW): pci@800000020000000.mmio 00000000000a0000-00000000000affff (prio 2, RW): alias vga.chain4 @vga.vram 0000000000000000-000000000000ffff 00000000000a0000-00000000000bffff (prio 1, RW): vga-lowmem 0000000080000000-0000000080ffffff (prio 1, RW): vga.vram 0000000090000000-0000000090000fff (prio 1, RW): vga.mmio 0000000090000400-000000009000041f (prio 0, RW): vga ioports remapped 0000000090000500-0000000090000515 (prio 0, RW): bochs dispi interface 0000000090020000-00000000900200ff (prio 1, RW): ohci iommu-spapr 0000000000000000-ffffffffffffffff (prio 0, RW): iommu-spapr vga.vram 0000000080000000-0000000080ffffff (prio 1, RW): vga.vram My command line: ./qemu-system-ppc64 \ -L "qemu-ppc64-bios/" \ -trace "events=qemu_trace_events" \ -vnc :5 \ -M pseries \ -serial mon:stdio \ -enable-kvm \ -m 1G \ -machine "pseries" \ -vga "std" \ -kernel "guest.vmlinux.n" \ -initrd "1.cpio"
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index ca588aa..8d76290 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -440,43 +440,6 @@ static void pci_spapr_set_irq(void *opaque, int irq_num, int level) qemu_set_irq(spapr_phb_lsi_qirq(phb, irq_num), level); } -static uint64_t spapr_io_read(void *opaque, hwaddr addr, - unsigned size) -{ - switch (size) { - case 1: - return cpu_inb(addr); - case 2: - return cpu_inw(addr); - case 4: - return cpu_inl(addr); - } - g_assert_not_reached(); -} - -static void spapr_io_write(void *opaque, hwaddr addr, - uint64_t data, unsigned size) -{ - switch (size) { - case 1: - cpu_outb(addr, data); - return; - case 2: - cpu_outw(addr, data); - return; - case 4: - cpu_outl(addr, data); - return; - } - g_assert_not_reached(); -} - -static const MemoryRegionOps spapr_io_ops = { - .endianness = DEVICE_LITTLE_ENDIAN, - .read = spapr_io_read, - .write = spapr_io_write -}; - /* * MSI/MSIX memory region implementation. * The handler handles both MSI and MSIX. @@ -590,23 +553,14 @@ static int spapr_phb_init(SysBusDevice *s) memory_region_add_subregion(get_system_memory(), sphb->mem_win_addr, &sphb->memwindow); - /* On ppc, we only have MMIO no specific IO space from the CPU - * perspective. In theory we ought to be able to embed the PCI IO - * memory region direction in the system memory space. However, - * if any of the IO BAR subregions use the old_portio mechanism, - * that won't be processed properly unless accessed from the - * system io address space. This hack to bounce things via - * system_io works around the problem until all the users of - * old_portion are updated */ + /* Initialize IO regions */ sprintf(namebuf, "%s.io", sphb->dtbusname); memory_region_init(&sphb->iospace, OBJECT(sphb), namebuf, SPAPR_PCI_IO_WIN_SIZE); - /* FIXME: fix to support multiple PHBs */ - memory_region_add_subregion(get_system_io(), 0, &sphb->iospace); sprintf(namebuf, "%s.io-alias", sphb->dtbusname); - memory_region_init_io(&sphb->iowindow, OBJECT(sphb), &spapr_io_ops, sphb, - namebuf, SPAPR_PCI_IO_WIN_SIZE); + memory_region_init_alias(&sphb->iowindow, OBJECT(sphb), + namebuf, &sphb->iospace, 0, SPAPR_PCI_IO_WIN_SIZE); memory_region_add_subregion(get_system_memory(), sphb->io_win_addr, &sphb->iowindow);
As it looks like all portio users have migrated to new portio api, the workaround with memory access to io ports routing is no more needed. This also fixes a bug with byte swapping as the io region was marked as little endian while it should not do any swapping at all. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> --- hw/ppc/spapr_pci.c | 52 +++------------------------------------------------- 1 file changed, 3 insertions(+), 49 deletions(-)