From patchwork Thu Jul 11 09:10:29 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 258384 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 4C96A2C009D for ; Thu, 11 Jul 2013 19:18:00 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932179Ab3GKJIZ (ORCPT ); Thu, 11 Jul 2013 05:08:25 -0400 Received: from mail-pb0-f42.google.com ([209.85.160.42]:36000 "EHLO mail-pb0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932090Ab3GKJIV (ORCPT ); Thu, 11 Jul 2013 05:08:21 -0400 Received: by mail-pb0-f42.google.com with SMTP id un1so7683766pbc.29 for ; Thu, 11 Jul 2013 02:08:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=wQ2JjfU0vE+G2cM/QrRWE9LZ4Gol0mWP/R9UeOIHCJs=; b=UlGoYDBEWUmIpT6G680eAmonhKQwpFkmQhvAx2NqFTtib/eBegG+qXg5pKjbkNA3vO GdfaKBB/wmcruK/+pB/As1LUbOpt8r+3NR+0EoTrFk3YfPYH9M61EZty6RHcPtfGKxkj I0j2m67R25bcrUBMiqP7vU/cAdWurf0sqmReEVoPCTaJX/WcdU/F5gfYAzyDg+HCO03e 59n9ZO2C94DZnyqcL4iVL8aF4i+TxuSnZS53IAWIAnyz7wpViJvRa2SmaU3SIUTKM8JM atV3Q/nt39TGJ7aZJT8ZhE6lB3dpSsNSknKluHna+lQDUwVyUsRqBpCv2p92joHfR6Ak e9iQ== X-Received: by 10.67.5.198 with SMTP id co6mr17800308pad.110.1373533700976; Thu, 11 Jul 2013 02:08:20 -0700 (PDT) Received: from richard-OptiPlex-780.ap.freescale.net ([123.151.195.1]) by mx.google.com with ESMTPSA id iv4sm38655501pbc.9.2013.07.11.02.08.15 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 11 Jul 2013 02:08:19 -0700 (PDT) From: Richard Zhu To: shawn.guo@linaro.org Cc: linux-arm-kernel@lists.infradead.org, jgarzik@pobox.com, tj@kernel.org, rob.herring@calxeda.com, s.hauer@pengutronix.de, linux-ide@vger.kernel.org, Richard Zhu Subject: [v5 1/3] ARM: dtsi: enable ahci sata on imx6q platforms Date: Thu, 11 Jul 2013 17:10:29 +0800 Message-Id: <1373533831-9500-2-git-send-email-Hong-Xing.Zhu@freescale.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1373533831-9500-1-git-send-email-Hong-Xing.Zhu@freescale.com> References: <1373533831-9500-1-git-send-email-Hong-Xing.Zhu@freescale.com> Sender: linux-ide-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org From: Richard Zhu Only imx6q has the ahci sata controller, enable it on imx6q platforms. Signed-off-by: Richard Zhu --- arch/arm/boot/dts/imx6q-sabreauto.dts | 4 ++++ arch/arm/boot/dts/imx6q-sabrelite.dts | 4 ++++ arch/arm/boot/dts/imx6q-sabresd.dts | 4 ++++ arch/arm/boot/dts/imx6q.dtsi | 9 +++++++++ 4 files changed, 21 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/imx6q-sabreauto.dts b/arch/arm/boot/dts/imx6q-sabreauto.dts index 09a7580..5cd5209 100644 --- a/arch/arm/boot/dts/imx6q-sabreauto.dts +++ b/arch/arm/boot/dts/imx6q-sabreauto.dts @@ -20,6 +20,10 @@ compatible = "fsl,imx6q-sabreauto", "fsl,imx6q"; }; +&ahci { + status = "okay"; +}; + &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog>; diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts index 6a00066..6bf6fec 100644 --- a/arch/arm/boot/dts/imx6q-sabrelite.dts +++ b/arch/arm/boot/dts/imx6q-sabrelite.dts @@ -65,6 +65,10 @@ }; }; +&ahci { + status = "okay"; +}; + &ecspi1 { fsl,spi-num-chipselects = <1>; cs-gpios = <&gpio3 19 0>; diff --git a/arch/arm/boot/dts/imx6q-sabresd.dts b/arch/arm/boot/dts/imx6q-sabresd.dts index 0038228..d0579b8 100644 --- a/arch/arm/boot/dts/imx6q-sabresd.dts +++ b/arch/arm/boot/dts/imx6q-sabresd.dts @@ -20,6 +20,10 @@ compatible = "fsl,imx6q-sabresd", "fsl,imx6q"; }; +&ahci { + status = "okay"; +}; + &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog>; diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index e7dd2c4..40db926 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -424,6 +424,15 @@ }; }; + ahci: ahci@02200000 { + compatible = "fsl,imx6q-ahci"; + reg = <0x02200000 0x4000>; + interrupts = <0 39 0x04>; + clocks = <&clks 154>, <&clks 187>; + clock-names = "sata", "sata_ref"; + status = "disabled"; + }; + ipu2: ipu@02800000 { #crtc-cells = <1>; compatible = "fsl,imx6q-ipu";