From patchwork Thu Jul 11 01:47:16 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Crosthwaite X-Patchwork-Id: 258280 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 35A392C02A8 for ; Thu, 11 Jul 2013 11:52:41 +1000 (EST) Received: from localhost ([::1]:51548 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ux63j-0005XG-5P for incoming@patchwork.ozlabs.org; Wed, 10 Jul 2013 21:52:39 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41252) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ux63N-0005NR-Ky for qemu-devel@nongnu.org; Wed, 10 Jul 2013 21:52:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Ux63M-0006BJ-Kh for qemu-devel@nongnu.org; Wed, 10 Jul 2013 21:52:17 -0400 Received: from mail-pa0-f45.google.com ([209.85.220.45]:56865) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ux63M-0006BF-DX for qemu-devel@nongnu.org; Wed, 10 Jul 2013 21:52:16 -0400 Received: by mail-pa0-f45.google.com with SMTP id bi5so7289632pad.4 for ; Wed, 10 Jul 2013 18:52:15 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=Of37ky2bODiI6bK5Bob1iNkF7/bikfDMN9U2gRUF0KA=; b=FUF7DO/Asu2JAphF+g01DG6+80sRSfP4PYfFNfwcw95BpNJpbfQ+4truJrmWx20qUH weq9snP81bVmYLMTDQTJtuyrt7e4HmmTrD1gtw6rLs54gPspz269u8JrkzfsrCPkiY2K qu1Po5NsuKAhk3lvQubLIu/xGhuyyeydfU+3KyYdNw1x4ytlk0o4gRoRwa6lPGukYofM ynNiRctwDsIXA4X+PIkDST4QFA9suyjEAFunY4h0dZGGzRIqg5UlYfOyBYf67+SouNaL ErYTGvoMp5lLZ8SqJ9pv98fo/AUuWo6IZpLxAgNBB9G+YMDwqI72GUrLcSZRu3QCWrIe /UHQ== X-Received: by 10.68.34.165 with SMTP id a5mr33987321pbj.156.1373507535600; Wed, 10 Jul 2013 18:52:15 -0700 (PDT) Received: from localhost ([203.126.243.116]) by mx.google.com with ESMTPSA id at1sm36677386pbc.10.2013.07.10.18.52.11 for (version=TLSv1.1 cipher=RC4-SHA bits=128/128); Wed, 10 Jul 2013 18:52:14 -0700 (PDT) From: peter.crosthwaite@xilinx.com To: afaerber@suse.de Date: Thu, 11 Jul 2013 11:47:16 +1000 Message-Id: X-Mailer: git-send-email 1.8.3.rc1.44.gb387c77.dirty In-Reply-To: References: X-Gm-Message-State: ALoCoQmvKUxcumqcjwfIcLCj8i7rYswBUUqTO2pnPMlNxs97+2Sp6xG1FMD0k1bL/38JTtwxpGCJ X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.220.45 Cc: hutao@cn.fujitsu.com, aliguori@us.ibm.com, qemu-devel@nongnu.org, mst@redhat.com Subject: [Qemu-devel] [PATCH qom-next v2 3/5] target-arm: Use parent classes for reset + realize X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Peter Crosthwaite ARMCPUClass is only needed for parent-class abstract function access. Just use parent classes for reset and realize access and remove ARMCPUClass completely. Signed-off-by: Peter Crosthwaite --- target-arm/cpu-qom.h | 20 -------------------- target-arm/cpu.c | 16 +++++++--------- 2 files changed, 7 insertions(+), 29 deletions(-) diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h index ef6261f..bdad93a 100644 --- a/target-arm/cpu-qom.h +++ b/target-arm/cpu-qom.h @@ -24,28 +24,8 @@ #define TYPE_ARM_CPU "arm-cpu" -#define ARM_CPU_CLASS(klass) \ - OBJECT_CLASS_CHECK(ARMCPUClass, (klass), TYPE_ARM_CPU) #define ARM_CPU(obj) \ OBJECT_CHECK(ARMCPU, (obj), TYPE_ARM_CPU) -#define ARM_CPU_GET_CLASS(obj) \ - OBJECT_GET_CLASS(ARMCPUClass, (obj), TYPE_ARM_CPU) - -/** - * ARMCPUClass: - * @parent_realize: The parent class' realize handler. - * @parent_reset: The parent class' reset handler. - * - * An ARM CPU model. - */ -typedef struct ARMCPUClass { - /*< private >*/ - CPUClass parent_class; - /*< public >*/ - - DeviceRealize parent_realize; - void (*parent_reset)(CPUState *cpu); -} ARMCPUClass; /** * ARMCPU: diff --git a/target-arm/cpu.c b/target-arm/cpu.c index ed53df8..ad5ec7b 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -60,7 +60,8 @@ static void cp_reg_reset(gpointer key, gpointer value, gpointer opaque) static void arm_cpu_reset(CPUState *s) { ARMCPU *cpu = ARM_CPU(s); - ARMCPUClass *acc = ARM_CPU_GET_CLASS(cpu); + CPUClass *cc_parent = + CPU_CLASS(object_class_get_parent_by_name(TYPE_ARM_CPU)); CPUARMState *env = &cpu->env; if (qemu_loglevel_mask(CPU_LOG_RESET)) { @@ -68,7 +69,7 @@ static void arm_cpu_reset(CPUState *s) log_cpu_state(env, 0); } - acc->parent_reset(s); + cc_parent->reset(s); memset(env, 0, offsetof(CPUARMState, breakpoints)); g_hash_table_foreach(cpu->cp_regs, cp_reg_reset, cpu); @@ -158,7 +159,8 @@ static void arm_cpu_finalizefn(Object *obj) static void arm_cpu_realizefn(DeviceState *dev, Error **errp) { ARMCPU *cpu = ARM_CPU(dev); - ARMCPUClass *acc = ARM_CPU_GET_CLASS(dev); + DeviceClass *dc_parent = + DEVICE_CLASS(object_class_get_parent_by_name(TYPE_ARM_CPU)); CPUARMState *env = &cpu->env; /* Some features automatically imply others: */ @@ -209,7 +211,7 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) cpu_reset(CPU(cpu)); - acc->parent_realize(dev, errp); + dc_parent->realize(dev, errp); } /* CPU models */ @@ -803,14 +805,11 @@ static const ARMCPUInfo arm_cpus[] = { static void arm_cpu_class_init(ObjectClass *oc, void *data) { - ARMCPUClass *acc = ARM_CPU_CLASS(oc); - CPUClass *cc = CPU_CLASS(acc); + CPUClass *cc = CPU_CLASS(oc); DeviceClass *dc = DEVICE_CLASS(oc); - acc->parent_realize = dc->realize; dc->realize = arm_cpu_realizefn; - acc->parent_reset = cc->reset; cc->reset = arm_cpu_reset; cc->class_by_name = arm_cpu_class_by_name; @@ -839,7 +838,6 @@ static const TypeInfo arm_cpu_type_info = { .instance_init = arm_cpu_initfn, .instance_finalize = arm_cpu_finalizefn, .abstract = true, - .class_size = sizeof(ARMCPUClass), .class_init = arm_cpu_class_init, };