Message ID | 1373486709-13015-4-git-send-email-dmurphy@ti.com |
---|---|
State | Superseded |
Delegated to: | Tom Rini |
Headers | show |
On Thursday 11 July 2013 01:35 AM, Dan Murphy wrote: > * Enable the OMAP5 EHCI host clocks > * Add OMAP5 EHCI register definitions > * Add OMAP5 ES2 host revision > > Signed-off-by: Dan Murphy <dmurphy@ti.com> > --- > arch/arm/cpu/armv7/omap5/hw_data.c | 13 ++++++++++ > arch/arm/include/asm/arch-omap5/clock.h | 6 +++++ > arch/arm/include/asm/arch-omap5/ehci.h | 43 +++++++++++++++++++++++++++++++ > arch/arm/include/asm/ehci-omap.h | 1 + > drivers/usb/host/ehci-omap.c | 2 +- > 5 files changed, 64 insertions(+), 1 deletion(-) > create mode 100644 arch/arm/include/asm/arch-omap5/ehci.h > > diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c > index 56cf1f8..055f058 100644 > --- a/arch/arm/cpu/armv7/omap5/hw_data.c > +++ b/arch/arm/cpu/armv7/omap5/hw_data.c > @@ -412,6 +412,8 @@ void enable_basic_clocks(void) > (*prcm)->cm_l4per_gpio4_clkctrl, > (*prcm)->cm_l4per_gpio5_clkctrl, > (*prcm)->cm_l4per_gpio6_clkctrl, > + (*prcm)->cm_clksel_usb_60mhz, > + (*prcm)->cm_l3init_hsusbtll_clkctrl, guard this with CONFIG_USB_EHCI please or it ll throw an error for DRA7xx boards. > 0 > }; > > @@ -423,6 +425,7 @@ void enable_basic_clocks(void) > (*prcm)->cm_wkup_wdtimer2_clkctrl, > (*prcm)->cm_l4per_uart3_clkctrl, > (*prcm)->cm_l4per_i2c1_clkctrl, > + (*prcm)->cm_l3init_hsusbhost_clkctrl, same here... Thanks, Lokesh > 0 > }; > > @@ -446,6 +449,16 @@ void enable_basic_clocks(void) > setbits_le32((*prcm)->cm_wkup_gptimer1_clkctrl, > GPTIMER1_CLKCTRL_CLKSEL_MASK); > > +#ifdef CONFIG_USB_EHCI > + /* Enable port 2 and 3 clocks*/ > + setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, > + USB_HOST_HS_CLKCTRL_MASK); > + > + /* Enable all 3 usb host ports tll clocks*/ > + setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl, > + USB_TLL_HS_CLKCTRL_MASK); > +#endif > + > do_enable_clocks(clk_domains_essential, > clk_modules_hw_auto_essential, > clk_modules_explicit_en_essential, > diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h > index 4d2765d..3a58337 100644 > --- a/arch/arm/include/asm/arch-omap5/clock.h > +++ b/arch/arm/include/asm/arch-omap5/clock.h > @@ -165,6 +165,12 @@ > /* CM_L3INIT_USBPHY_CLKCTRL */ > #define USBPHY_CLKCTRL_OPTFCLKEN_PHY_48M_MASK 8 > > +/* CM_L3INIT_USB_HOST_HS_CLKCTRL */ > +#define USB_HOST_HS_CLKCTRL_MASK 0x56C0 > + > +/* CM_L3INIT_USB_TLL_HS_CLKCTRL */ > +#define USB_TLL_HS_CLKCTRL_MASK 0x700 > + > /* CM_MPU_MPU_CLKCTRL */ > #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_SHIFT 24 > #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK (3 << 24) > diff --git a/arch/arm/include/asm/arch-omap5/ehci.h b/arch/arm/include/asm/arch-omap5/ehci.h > new file mode 100644 > index 0000000..3921e4a > --- /dev/null > +++ b/arch/arm/include/asm/arch-omap5/ehci.h > @@ -0,0 +1,43 @@ > +/* > + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com* > + * Author: Govindraj R <govindraj.raja@ti.com> > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, > + * MA 02111-1307 USA > + */ > + > +#ifndef _EHCI_H > +#define _EHCI_H > + > +#define OMAP_EHCI_BASE (OMAP54XX_L4_CORE_BASE + 0x64C00) > +#define OMAP_UHH_BASE (OMAP54XX_L4_CORE_BASE + 0x64000) > +#define OMAP_USBTLL_BASE (OMAP54XX_L4_CORE_BASE + 0x62000) > + > +/* TLL Register Set */ > +#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3) > +#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2) > +#define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1) > +#define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8) > +#define OMAP_USBTLL_SYSSTATUS_RESETDONE 1 > + > +#define OMAP_UHH_SYSCONFIG_SOFTRESET 1 > +#define OMAP_UHH_SYSSTATUS_EHCI_RESETDONE (1 << 2) > +#define OMAP_UHH_SYSCONFIG_NOIDLE (1 << 2) > +#define OMAP_UHH_SYSCONFIG_NOSTDBY (1 << 4) > + > +#define OMAP_UHH_SYSCONFIG_VAL (OMAP_UHH_SYSCONFIG_NOIDLE | \ > + OMAP_UHH_SYSCONFIG_NOSTDBY) > + > +#endif /* _EHCI_H */ > diff --git a/arch/arm/include/asm/ehci-omap.h b/arch/arm/include/asm/ehci-omap.h > index 77e8170..0b09e9d 100644 > --- a/arch/arm/include/asm/ehci-omap.h > +++ b/arch/arm/include/asm/ehci-omap.h > @@ -42,6 +42,7 @@ enum usbhs_omap_port_mode { > /* Values of UHH_REVISION - Note: these are not given in the TRM */ > #define OMAP_USBHS_REV1 0x00000010 /* OMAP3 */ > #define OMAP_USBHS_REV2 0x50700100 /* OMAP4 */ > +#define OMAP_USBHS_REV2_1 0x50700101 /* OMAP5 */ > > /* UHH Register Set */ > #define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN (1 << 2) > diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c > index 086c697..17f2214 100644 > --- a/drivers/usb/host/ehci-omap.c > +++ b/drivers/usb/host/ehci-omap.c > @@ -208,7 +208,7 @@ int omap_ehci_hcd_init(struct omap_usbhs_board_data *usbhs_pdata, > clrbits_le32(®, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS); > else > setbits_le32(®, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS); > - } else if (rev == OMAP_USBHS_REV2) { > + } else if ((rev == OMAP_USBHS_REV2) || (rev == OMAP_USBHS_REV2_1)) { > clrsetbits_le32(®, (OMAP_P1_MODE_CLEAR | OMAP_P2_MODE_CLEAR), > OMAP4_UHH_HOSTCONFIG_APP_START_CLK); > >
On 07/11/2013 06:51 AM, Lokesh Vutla wrote: > On Thursday 11 July 2013 01:35 AM, Dan Murphy wrote: >> * Enable the OMAP5 EHCI host clocks >> * Add OMAP5 EHCI register definitions >> * Add OMAP5 ES2 host revision >> >> Signed-off-by: Dan Murphy <dmurphy@ti.com> >> --- >> arch/arm/cpu/armv7/omap5/hw_data.c | 13 ++++++++++ >> arch/arm/include/asm/arch-omap5/clock.h | 6 +++++ >> arch/arm/include/asm/arch-omap5/ehci.h | 43 +++++++++++++++++++++++++++++++ >> arch/arm/include/asm/ehci-omap.h | 1 + >> drivers/usb/host/ehci-omap.c | 2 +- >> 5 files changed, 64 insertions(+), 1 deletion(-) >> create mode 100644 arch/arm/include/asm/arch-omap5/ehci.h >> >> diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c >> index 56cf1f8..055f058 100644 >> --- a/arch/arm/cpu/armv7/omap5/hw_data.c >> +++ b/arch/arm/cpu/armv7/omap5/hw_data.c >> @@ -412,6 +412,8 @@ void enable_basic_clocks(void) >> (*prcm)->cm_l4per_gpio4_clkctrl, >> (*prcm)->cm_l4per_gpio5_clkctrl, >> (*prcm)->cm_l4per_gpio6_clkctrl, >> + (*prcm)->cm_clksel_usb_60mhz, >> + (*prcm)->cm_l3init_hsusbtll_clkctrl, > guard this with CONFIG_USB_EHCI please or it ll > throw an error for DRA7xx boards. why is DRA7xx using omap5/hw_data.c? doesn't it qualify for its own SoC directory? >> 0 >> }; cheers, -roger
On Thursday 11 July 2013 01:28 PM, Roger Quadros wrote: > On 07/11/2013 06:51 AM, Lokesh Vutla wrote: >> On Thursday 11 July 2013 01:35 AM, Dan Murphy wrote: >>> * Enable the OMAP5 EHCI host clocks >>> * Add OMAP5 EHCI register definitions >>> * Add OMAP5 ES2 host revision >>> >>> Signed-off-by: Dan Murphy <dmurphy@ti.com> >>> --- >>> arch/arm/cpu/armv7/omap5/hw_data.c | 13 ++++++++++ >>> arch/arm/include/asm/arch-omap5/clock.h | 6 +++++ >>> arch/arm/include/asm/arch-omap5/ehci.h | 43 +++++++++++++++++++++++++++++++ >>> arch/arm/include/asm/ehci-omap.h | 1 + >>> drivers/usb/host/ehci-omap.c | 2 +- >>> 5 files changed, 64 insertions(+), 1 deletion(-) >>> create mode 100644 arch/arm/include/asm/arch-omap5/ehci.h >>> >>> diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c >>> index 56cf1f8..055f058 100644 >>> --- a/arch/arm/cpu/armv7/omap5/hw_data.c >>> +++ b/arch/arm/cpu/armv7/omap5/hw_data.c >>> @@ -412,6 +412,8 @@ void enable_basic_clocks(void) >>> (*prcm)->cm_l4per_gpio4_clkctrl, >>> (*prcm)->cm_l4per_gpio5_clkctrl, >>> (*prcm)->cm_l4per_gpio6_clkctrl, >>> + (*prcm)->cm_clksel_usb_60mhz, >>> + (*prcm)->cm_l3init_hsusbtll_clkctrl, >> guard this with CONFIG_USB_EHCI please or it ll >> throw an error for DRA7xx boards. > why is DRA7xx using omap5/hw_data.c? > > doesn't it qualify for its own SoC directory? We tried to keep common things for OMAP5/DRA intact and added the difference. The above clocks list was same for both. In fact there is no armv7/dra directory at all. Regards, Sricharan >>> 0 >>> }; > cheers, > -roger
On 07/11/2013 11:35 AM, Sricharan R wrote: > On Thursday 11 July 2013 01:28 PM, Roger Quadros wrote: >> On 07/11/2013 06:51 AM, Lokesh Vutla wrote: >>> On Thursday 11 July 2013 01:35 AM, Dan Murphy wrote: >>>> * Enable the OMAP5 EHCI host clocks >>>> * Add OMAP5 EHCI register definitions >>>> * Add OMAP5 ES2 host revision >>>> >>>> Signed-off-by: Dan Murphy <dmurphy@ti.com> >>>> --- >>>> arch/arm/cpu/armv7/omap5/hw_data.c | 13 ++++++++++ >>>> arch/arm/include/asm/arch-omap5/clock.h | 6 +++++ >>>> arch/arm/include/asm/arch-omap5/ehci.h | 43 +++++++++++++++++++++++++++++++ >>>> arch/arm/include/asm/ehci-omap.h | 1 + >>>> drivers/usb/host/ehci-omap.c | 2 +- >>>> 5 files changed, 64 insertions(+), 1 deletion(-) >>>> create mode 100644 arch/arm/include/asm/arch-omap5/ehci.h >>>> >>>> diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c >>>> index 56cf1f8..055f058 100644 >>>> --- a/arch/arm/cpu/armv7/omap5/hw_data.c >>>> +++ b/arch/arm/cpu/armv7/omap5/hw_data.c >>>> @@ -412,6 +412,8 @@ void enable_basic_clocks(void) >>>> (*prcm)->cm_l4per_gpio4_clkctrl, >>>> (*prcm)->cm_l4per_gpio5_clkctrl, >>>> (*prcm)->cm_l4per_gpio6_clkctrl, >>>> + (*prcm)->cm_clksel_usb_60mhz, >>>> + (*prcm)->cm_l3init_hsusbtll_clkctrl, >>> guard this with CONFIG_USB_EHCI please or it ll >>> throw an error for DRA7xx boards. >> why is DRA7xx using omap5/hw_data.c? >> >> doesn't it qualify for its own SoC directory? > We tried to keep common things for OMAP5/DRA intact and > added the difference. The above clocks list was same for both. > In fact there is no armv7/dra directory at all. If there is no directory, it could be created I suppose. IMHO it would become ugly soon if it doesn't have its own hw_data. cheers, -roger
On Thursday 11 July 2013 02:25 PM, Roger Quadros wrote: > On 07/11/2013 11:35 AM, Sricharan R wrote: >> On Thursday 11 July 2013 01:28 PM, Roger Quadros wrote: >>> On 07/11/2013 06:51 AM, Lokesh Vutla wrote: >>>> On Thursday 11 July 2013 01:35 AM, Dan Murphy wrote: >>>>> * Enable the OMAP5 EHCI host clocks >>>>> * Add OMAP5 EHCI register definitions >>>>> * Add OMAP5 ES2 host revision >>>>> >>>>> Signed-off-by: Dan Murphy <dmurphy@ti.com> >>>>> --- >>>>> arch/arm/cpu/armv7/omap5/hw_data.c | 13 ++++++++++ >>>>> arch/arm/include/asm/arch-omap5/clock.h | 6 +++++ >>>>> arch/arm/include/asm/arch-omap5/ehci.h | 43 +++++++++++++++++++++++++++++++ >>>>> arch/arm/include/asm/ehci-omap.h | 1 + >>>>> drivers/usb/host/ehci-omap.c | 2 +- >>>>> 5 files changed, 64 insertions(+), 1 deletion(-) >>>>> create mode 100644 arch/arm/include/asm/arch-omap5/ehci.h >>>>> >>>>> diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c >>>>> index 56cf1f8..055f058 100644 >>>>> --- a/arch/arm/cpu/armv7/omap5/hw_data.c >>>>> +++ b/arch/arm/cpu/armv7/omap5/hw_data.c >>>>> @@ -412,6 +412,8 @@ void enable_basic_clocks(void) >>>>> (*prcm)->cm_l4per_gpio4_clkctrl, >>>>> (*prcm)->cm_l4per_gpio5_clkctrl, >>>>> (*prcm)->cm_l4per_gpio6_clkctrl, >>>>> + (*prcm)->cm_clksel_usb_60mhz, >>>>> + (*prcm)->cm_l3init_hsusbtll_clkctrl, >>>> guard this with CONFIG_USB_EHCI please or it ll >>>> throw an error for DRA7xx boards. >>> why is DRA7xx using omap5/hw_data.c? >>> >>> doesn't it qualify for its own SoC directory? >> We tried to keep common things for OMAP5/DRA intact and >> added the difference. The above clocks list was same for both. >> In fact there is no armv7/dra directory at all. > If there is no directory, it could be created I suppose. > IMHO it would become ugly soon if it doesn't have its own hw_data. I am not much against it, it might look clean but would result in some code duplication. I feel we should do it if we add another DRA variant. Regards, Sricharan
On 07/11/2013 04:31 AM, Sricharan R wrote: > On Thursday 11 July 2013 02:25 PM, Roger Quadros wrote: >> On 07/11/2013 11:35 AM, Sricharan R wrote: >>> On Thursday 11 July 2013 01:28 PM, Roger Quadros wrote: >>>> On 07/11/2013 06:51 AM, Lokesh Vutla wrote: >>>>> On Thursday 11 July 2013 01:35 AM, Dan Murphy wrote: >>>>>> * Enable the OMAP5 EHCI host clocks >>>>>> * Add OMAP5 EHCI register definitions >>>>>> * Add OMAP5 ES2 host revision >>>>>> >>>>>> Signed-off-by: Dan Murphy <dmurphy@ti.com> >>>>>> --- >>>>>> arch/arm/cpu/armv7/omap5/hw_data.c | 13 ++++++++++ >>>>>> arch/arm/include/asm/arch-omap5/clock.h | 6 +++++ >>>>>> arch/arm/include/asm/arch-omap5/ehci.h | 43 +++++++++++++++++++++++++++++++ >>>>>> arch/arm/include/asm/ehci-omap.h | 1 + >>>>>> drivers/usb/host/ehci-omap.c | 2 +- >>>>>> 5 files changed, 64 insertions(+), 1 deletion(-) >>>>>> create mode 100644 arch/arm/include/asm/arch-omap5/ehci.h >>>>>> >>>>>> diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c >>>>>> index 56cf1f8..055f058 100644 >>>>>> --- a/arch/arm/cpu/armv7/omap5/hw_data.c >>>>>> +++ b/arch/arm/cpu/armv7/omap5/hw_data.c >>>>>> @@ -412,6 +412,8 @@ void enable_basic_clocks(void) >>>>>> (*prcm)->cm_l4per_gpio4_clkctrl, >>>>>> (*prcm)->cm_l4per_gpio5_clkctrl, >>>>>> (*prcm)->cm_l4per_gpio6_clkctrl, >>>>>> + (*prcm)->cm_clksel_usb_60mhz, >>>>>> + (*prcm)->cm_l3init_hsusbtll_clkctrl, >>>>> guard this with CONFIG_USB_EHCI please or it ll >>>>> throw an error for DRA7xx boards. >>>> why is DRA7xx using omap5/hw_data.c? >>>> >>>> doesn't it qualify for its own SoC directory? >>> We tried to keep common things for OMAP5/DRA intact and >>> added the difference. The above clocks list was same for both. >>> In fact there is no armv7/dra directory at all. >> If there is no directory, it could be created I suppose. >> IMHO it would become ugly soon if it doesn't have its own hw_data. > I am not much against it, it might look clean but would result in some code > duplication. I feel we should do it if we add another DRA variant. > > Regards, > Sricharan For now I will wrap it in CONFIG_USB_EHCI_OMAP until the dra7xx is figured out. +1 to a separate SoC directory for dra7xx Dan
On Thu, Jul 11, 2013 at 11:55:59AM +0300, Roger Quadros wrote: > On 07/11/2013 11:35 AM, Sricharan R wrote: > > On Thursday 11 July 2013 01:28 PM, Roger Quadros wrote: > >> On 07/11/2013 06:51 AM, Lokesh Vutla wrote: > >>> On Thursday 11 July 2013 01:35 AM, Dan Murphy wrote: > >>>> * Enable the OMAP5 EHCI host clocks > >>>> * Add OMAP5 EHCI register definitions > >>>> * Add OMAP5 ES2 host revision > >>>> > >>>> Signed-off-by: Dan Murphy <dmurphy@ti.com> > >>>> --- > >>>> arch/arm/cpu/armv7/omap5/hw_data.c | 13 ++++++++++ > >>>> arch/arm/include/asm/arch-omap5/clock.h | 6 +++++ > >>>> arch/arm/include/asm/arch-omap5/ehci.h | 43 +++++++++++++++++++++++++++++++ > >>>> arch/arm/include/asm/ehci-omap.h | 1 + > >>>> drivers/usb/host/ehci-omap.c | 2 +- > >>>> 5 files changed, 64 insertions(+), 1 deletion(-) > >>>> create mode 100644 arch/arm/include/asm/arch-omap5/ehci.h > >>>> > >>>> diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c > >>>> index 56cf1f8..055f058 100644 > >>>> --- a/arch/arm/cpu/armv7/omap5/hw_data.c > >>>> +++ b/arch/arm/cpu/armv7/omap5/hw_data.c > >>>> @@ -412,6 +412,8 @@ void enable_basic_clocks(void) > >>>> (*prcm)->cm_l4per_gpio4_clkctrl, > >>>> (*prcm)->cm_l4per_gpio5_clkctrl, > >>>> (*prcm)->cm_l4per_gpio6_clkctrl, > >>>> + (*prcm)->cm_clksel_usb_60mhz, > >>>> + (*prcm)->cm_l3init_hsusbtll_clkctrl, > >>> guard this with CONFIG_USB_EHCI please or it ll > >>> throw an error for DRA7xx boards. > >> why is DRA7xx using omap5/hw_data.c? > >> > >> doesn't it qualify for its own SoC directory? > > We tried to keep common things for OMAP5/DRA intact and > > added the difference. The above clocks list was same for both. > > In fact there is no armv7/dra directory at all. > > If there is no directory, it could be created I suppose. > IMHO it would become ugly soon if it doesn't have its own hw_data. Lets wait and see how it goes, and if we can't use some of the other tools in our toolbox to clean things up or at least avoid the duplication.
diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index 56cf1f8..055f058 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -412,6 +412,8 @@ void enable_basic_clocks(void) (*prcm)->cm_l4per_gpio4_clkctrl, (*prcm)->cm_l4per_gpio5_clkctrl, (*prcm)->cm_l4per_gpio6_clkctrl, + (*prcm)->cm_clksel_usb_60mhz, + (*prcm)->cm_l3init_hsusbtll_clkctrl, 0 }; @@ -423,6 +425,7 @@ void enable_basic_clocks(void) (*prcm)->cm_wkup_wdtimer2_clkctrl, (*prcm)->cm_l4per_uart3_clkctrl, (*prcm)->cm_l4per_i2c1_clkctrl, + (*prcm)->cm_l3init_hsusbhost_clkctrl, 0 }; @@ -446,6 +449,16 @@ void enable_basic_clocks(void) setbits_le32((*prcm)->cm_wkup_gptimer1_clkctrl, GPTIMER1_CLKCTRL_CLKSEL_MASK); +#ifdef CONFIG_USB_EHCI + /* Enable port 2 and 3 clocks*/ + setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, + USB_HOST_HS_CLKCTRL_MASK); + + /* Enable all 3 usb host ports tll clocks*/ + setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl, + USB_TLL_HS_CLKCTRL_MASK); +#endif + do_enable_clocks(clk_domains_essential, clk_modules_hw_auto_essential, clk_modules_explicit_en_essential, diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h index 4d2765d..3a58337 100644 --- a/arch/arm/include/asm/arch-omap5/clock.h +++ b/arch/arm/include/asm/arch-omap5/clock.h @@ -165,6 +165,12 @@ /* CM_L3INIT_USBPHY_CLKCTRL */ #define USBPHY_CLKCTRL_OPTFCLKEN_PHY_48M_MASK 8 +/* CM_L3INIT_USB_HOST_HS_CLKCTRL */ +#define USB_HOST_HS_CLKCTRL_MASK 0x56C0 + +/* CM_L3INIT_USB_TLL_HS_CLKCTRL */ +#define USB_TLL_HS_CLKCTRL_MASK 0x700 + /* CM_MPU_MPU_CLKCTRL */ #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_SHIFT 24 #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK (3 << 24) diff --git a/arch/arm/include/asm/arch-omap5/ehci.h b/arch/arm/include/asm/arch-omap5/ehci.h new file mode 100644 index 0000000..3921e4a --- /dev/null +++ b/arch/arm/include/asm/arch-omap5/ehci.h @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com* + * Author: Govindraj R <govindraj.raja@ti.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _EHCI_H +#define _EHCI_H + +#define OMAP_EHCI_BASE (OMAP54XX_L4_CORE_BASE + 0x64C00) +#define OMAP_UHH_BASE (OMAP54XX_L4_CORE_BASE + 0x64000) +#define OMAP_USBTLL_BASE (OMAP54XX_L4_CORE_BASE + 0x62000) + +/* TLL Register Set */ +#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3) +#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2) +#define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1) +#define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8) +#define OMAP_USBTLL_SYSSTATUS_RESETDONE 1 + +#define OMAP_UHH_SYSCONFIG_SOFTRESET 1 +#define OMAP_UHH_SYSSTATUS_EHCI_RESETDONE (1 << 2) +#define OMAP_UHH_SYSCONFIG_NOIDLE (1 << 2) +#define OMAP_UHH_SYSCONFIG_NOSTDBY (1 << 4) + +#define OMAP_UHH_SYSCONFIG_VAL (OMAP_UHH_SYSCONFIG_NOIDLE | \ + OMAP_UHH_SYSCONFIG_NOSTDBY) + +#endif /* _EHCI_H */ diff --git a/arch/arm/include/asm/ehci-omap.h b/arch/arm/include/asm/ehci-omap.h index 77e8170..0b09e9d 100644 --- a/arch/arm/include/asm/ehci-omap.h +++ b/arch/arm/include/asm/ehci-omap.h @@ -42,6 +42,7 @@ enum usbhs_omap_port_mode { /* Values of UHH_REVISION - Note: these are not given in the TRM */ #define OMAP_USBHS_REV1 0x00000010 /* OMAP3 */ #define OMAP_USBHS_REV2 0x50700100 /* OMAP4 */ +#define OMAP_USBHS_REV2_1 0x50700101 /* OMAP5 */ /* UHH Register Set */ #define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN (1 << 2) diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c index 086c697..17f2214 100644 --- a/drivers/usb/host/ehci-omap.c +++ b/drivers/usb/host/ehci-omap.c @@ -208,7 +208,7 @@ int omap_ehci_hcd_init(struct omap_usbhs_board_data *usbhs_pdata, clrbits_le32(®, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS); else setbits_le32(®, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS); - } else if (rev == OMAP_USBHS_REV2) { + } else if ((rev == OMAP_USBHS_REV2) || (rev == OMAP_USBHS_REV2_1)) { clrsetbits_le32(®, (OMAP_P1_MODE_CLEAR | OMAP_P2_MODE_CLEAR), OMAP4_UHH_HOSTCONFIG_APP_START_CLK);
* Enable the OMAP5 EHCI host clocks * Add OMAP5 EHCI register definitions * Add OMAP5 ES2 host revision Signed-off-by: Dan Murphy <dmurphy@ti.com> --- arch/arm/cpu/armv7/omap5/hw_data.c | 13 ++++++++++ arch/arm/include/asm/arch-omap5/clock.h | 6 +++++ arch/arm/include/asm/arch-omap5/ehci.h | 43 +++++++++++++++++++++++++++++++ arch/arm/include/asm/ehci-omap.h | 1 + drivers/usb/host/ehci-omap.c | 2 +- 5 files changed, 64 insertions(+), 1 deletion(-) create mode 100644 arch/arm/include/asm/arch-omap5/ehci.h