Patchwork [mips] Size optimization for MIPS

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Submitter Steve Ellcey
Date July 9, 2013, 4:29 p.m.
Message ID <0107490d-b4e6-4a64-ae4c-c05f00c8ee24@BAMAIL02.ba.imgtec.org>
Download mbox | patch
Permalink /patch/257778/
State New
Headers show

Comments

Steve Ellcey - July 9, 2013, 4:29 p.m.
While doing some size measurements and optimization I found that using the 
t0 through t7 registers on MIPS in MIPS16 mode resulted in larger code.  This
is because you cannot actually do any operations on these registers in MIPS16
mode but can only move data to or from them.  Compiling libraries like libjpeg
and libpng with this change saved about 1% in space.  I also ran coremark, the
space saving there was smaller and the performance slowdown was around 3% so
I made the change dependent on the optimize_size flag.

I tested the change with the mips-mti-elf, running the GCC testsuite with the
-mips16 and saw no regressions.  OK to checkin?

Steve Ellcey
sellcey@mips.com


Steve Ellcey  <sellcey@mips.com>

	* config/mips/mips.c (mips_conditional_register_usage): Do not
	use t[0-7] registers in MIPS16 mode when optimizing for size.
Richard Henderson - July 9, 2013, 4:46 p.m.
On 07/09/2013 09:29 AM, Steve Ellcey wrote:
> +      /* In MIPS16 mode using the $t registers for reload results in code
> +         that is larger (and slightly faster) then if we do not use them so
> +	 if optimizing for size, do not use them.  */
> +      if (optimize_size)
> +	{
> +	  fixed_regs[8] = call_used_regs[8] = 1;
> +	  fixed_regs[9] = call_used_regs[9] = 1;
> +	  fixed_regs[10] = call_used_regs[10] = 1;
> +	  fixed_regs[11] = call_used_regs[11] = 1;
> +	  fixed_regs[12] = call_used_regs[12] = 1;
> +	  fixed_regs[13] = call_used_regs[13] = 1;
> +	  fixed_regs[14] = call_used_regs[14] = 1;
> +	  fixed_regs[15] = call_used_regs[15] = 1;
> +	}

Surely the registers are better used by LRA as spill than the stack.
Perhaps time better spent enabling LRA for the mips target?


r~
Richard Sandiford - July 9, 2013, 5:25 p.m.
"Steve Ellcey " <sellcey@mips.com> writes:
> While doing some size measurements and optimization I found that using the 
> t0 through t7 registers on MIPS in MIPS16 mode resulted in larger code.  This
> is because you cannot actually do any operations on these registers in MIPS16
> mode but can only move data to or from them.

That was always the case though.  These registers weren't enabled because
you can do operations on them.  They were enabled because they should make
ideal spill space.  Moves to and from these registers always take 2 bytes,
whereas stack spills take either 2 or 4 bytes (as well as being slower).

So it sounds like the problem is that the heuristics aren't tuned properly.
Disabling the registers seems like papering over the problem rather than
fixing it.  But since no-one is likely to do the work to fix the heuristics,
that isn't a good enough reason to reject the patch.

> +      /* In MIPS16 mode using the $t registers for reload results in code
> +         that is larger (and slightly faster) then if we do not use them so
> +	 if optimizing for size, do not use them.  */
> +      if (optimize_size)
> +	{
> +	  fixed_regs[8] = call_used_regs[8] = 1;
> +	  fixed_regs[9] = call_used_regs[9] = 1;
> +	  fixed_regs[10] = call_used_regs[10] = 1;
> +	  fixed_regs[11] = call_used_regs[11] = 1;
> +	  fixed_regs[12] = call_used_regs[12] = 1;
> +	  fixed_regs[13] = call_used_regs[13] = 1;
> +	  fixed_regs[14] = call_used_regs[14] = 1;
> +	  fixed_regs[15] = call_used_regs[15] = 1;
> +	}

Please combine this with the previous block though, since the comment here
contradicts the comment there.  It would also be worth saying why you
keep $24 (for CMP and CMPI) and $25 (for SVR4 PIC).

Please also run some sanity checks for -mabi=eabi and functions that
have 5+ arguments (all used) to make sure that they still work.

Thanks,
Richard

Patch

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index bd1d10b..fb89aa8 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -17213,6 +17213,21 @@  mips_conditional_register_usage (void)
       fixed_regs[27] = call_used_regs[27] = 1;
       fixed_regs[30] = call_used_regs[30] = 1;
 
+      /* In MIPS16 mode using the $t registers for reload results in code
+         that is larger (and slightly faster) then if we do not use them so
+	 if optimizing for size, do not use them.  */
+      if (optimize_size)
+	{
+	  fixed_regs[8] = call_used_regs[8] = 1;
+	  fixed_regs[9] = call_used_regs[9] = 1;
+	  fixed_regs[10] = call_used_regs[10] = 1;
+	  fixed_regs[11] = call_used_regs[11] = 1;
+	  fixed_regs[12] = call_used_regs[12] = 1;
+	  fixed_regs[13] = call_used_regs[13] = 1;
+	  fixed_regs[14] = call_used_regs[14] = 1;
+	  fixed_regs[15] = call_used_regs[15] = 1;
+	}
+
       /* Do not allow HI and LO to be treated as register operands.
 	 There are no MTHI or MTLO instructions (or any real need
 	 for them) and one-way registers cannot easily be reloaded.  */