Patchwork [U-Boot,2/3] usb: omap5-evm: Add ethernet support to the uevm

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Submitter Dan Murphy
Date July 8, 2013, 8:59 p.m.
Message ID <1373317175-28926-3-git-send-email-dmurphy@ti.com>
Download mbox | patch
Permalink /patch/257606/
State Superseded
Delegated to: Tom Rini
Headers show

Comments

Dan Murphy - July 8, 2013, 8:59 p.m.
Add code to configure the USB EHCI host controller.
This enumerates an ethernet controller through USB3 using
the HSIC lines.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
---
 arch/arm/cpu/armv7/omap5/hw_data.c      |   15 +++++++++++
 arch/arm/include/asm/arch-omap5/clock.h |    6 +++++
 arch/arm/include/asm/arch-omap5/ehci.h  |   44 +++++++++++++++++++++++++++++++
 arch/arm/include/asm/ehci-omap.h        |    1 +
 board/ti/omap5_uevm/evm.c               |   35 ++++++++++++++++++++++++
 board/ti/omap5_uevm/mux_data.h          |    4 ++-
 drivers/usb/host/ehci-omap.c            |    2 +-
 include/configs/omap5_common.h          |    2 --
 include/configs/omap5_uevm.h            |   23 ++++++++++++++++
 9 files changed, 128 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-omap5/ehci.h
Nishanth Menon - July 8, 2013, 9:13 p.m.
On 07/08/2013 03:59 PM, Dan Murphy wrote:
> Add code to configure the USB EHCI host controller.
> This enumerates an ethernet controller through USB3 using
> the HSIC lines.
Code says:
 > + * OMAP EHCI port support
 > + * Based on LINUX KERNEL
 > + * drivers/usb/host/ehci-omap.c and drivers/mfd/omap-usb-host.c
which kernel?

>
> Signed-off-by: Dan Murphy <dmurphy@ti.com>
> ---
>   arch/arm/cpu/armv7/omap5/hw_data.c      |   15 +++++++++++
>   arch/arm/include/asm/arch-omap5/clock.h |    6 +++++
>   arch/arm/include/asm/arch-omap5/ehci.h  |   44 +++++++++++++++++++++++++++++++
>   arch/arm/include/asm/ehci-omap.h        |    1 +
>   board/ti/omap5_uevm/evm.c               |   35 ++++++++++++++++++++++++
>   board/ti/omap5_uevm/mux_data.h          |    4 ++-
>   drivers/usb/host/ehci-omap.c            |    2 +-
>   include/configs/omap5_common.h          |    2 --
>   include/configs/omap5_uevm.h            |   23 ++++++++++++++++

Is it possible to split this into stuff that is OMAP5 specific and stuff 
that is uEVM specific?

>   9 files changed, 128 insertions(+), 4 deletions(-)
>   create mode 100644 arch/arm/include/asm/arch-omap5/ehci.h
>
> diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c
> index 56cf1f8..f3973ee 100644
> --- a/arch/arm/cpu/armv7/omap5/hw_data.c
> +++ b/arch/arm/cpu/armv7/omap5/hw_data.c
> @@ -412,6 +412,8 @@ void enable_basic_clocks(void)
>   		(*prcm)->cm_l4per_gpio4_clkctrl,
>   		(*prcm)->cm_l4per_gpio5_clkctrl,
>   		(*prcm)->cm_l4per_gpio6_clkctrl,
> +		(*prcm)->cm_clksel_usb_60mhz,
> +		(*prcm)->cm_l3init_hsusbtll_clkctrl,
>   		0
>   	};
>
> @@ -423,6 +425,7 @@ void enable_basic_clocks(void)
>   		(*prcm)->cm_wkup_wdtimer2_clkctrl,
>   		(*prcm)->cm_l4per_uart3_clkctrl,
>   		(*prcm)->cm_l4per_i2c1_clkctrl,
> +		(*prcm)->cm_l3init_hsusbhost_clkctrl,
>   		0
>   	};
>
> @@ -446,6 +449,14 @@ void enable_basic_clocks(void)
>   	setbits_le32((*prcm)->cm_wkup_gptimer1_clkctrl,
>   			GPTIMER1_CLKCTRL_CLKSEL_MASK);
>
> +	/* Enbale all 3 usb ports enable uhh, utmi and hsic clocks*/
here
> +	setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl,
> +			USB_HOST_HS_CLKCTRL_MASK);
> +
> +	/* Enbale all 3 usb host ports tll clocks*/
here
> +	setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
> +			USB_TLL_HS_CLKCTRL_MASK);
> +

Who disables these when control is given to kernel?

>   	do_enable_clocks(clk_domains_essential,
>   			 clk_modules_hw_auto_essential,
>   			 clk_modules_explicit_en_essential,
> @@ -480,6 +491,10 @@ void enable_basic_uboot_clocks(void)
>   		0
>   	};
>
> +	/* Enbale all 3 usb host ports tll clocks*/
Enbale <- spell check. and a space after clocks
> +	setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
> +			USB_TLL_HS_CLKCTRL_MASK);
> +
>   	do_enable_clocks(clk_domains_essential,
>   			 clk_modules_hw_auto_essential,
>   			 clk_modules_explicit_en_essential,
> diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h
> index 4d2765d..f98fe74 100644
> --- a/arch/arm/include/asm/arch-omap5/clock.h
> +++ b/arch/arm/include/asm/arch-omap5/clock.h
> @@ -165,6 +165,12 @@
>   /* CM_L3INIT_USBPHY_CLKCTRL */
>   #define USBPHY_CLKCTRL_OPTFCLKEN_PHY_48M_MASK	8
>
> +/* CM_L3INIT_USB_HOST_HS_CLKCTRL */
> +#define USB_HOST_HS_CLKCTRL_MASK		0x7FC0
> +
> +/* CM_L3INIT_USB_TLL_HS_CLKCTRL */
> +#define USB_TLL_HS_CLKCTRL_MASK			0x700
> +
>   /* CM_MPU_MPU_CLKCTRL */
>   #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_SHIFT	24
>   #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK	(3 << 24)
> diff --git a/arch/arm/include/asm/arch-omap5/ehci.h b/arch/arm/include/asm/arch-omap5/ehci.h
> new file mode 100644
> index 0000000..49197f2
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-omap5/ehci.h
> @@ -0,0 +1,44 @@
> +/*
> + * OMAP EHCI port support
> + * Based on LINUX KERNEL
> + * drivers/usb/host/ehci-omap.c and drivers/mfd/omap-usb-host.c
> + *
> + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com*
> + * Author: Govindraj R <govindraj.raja@ti.com>
2013?
> + *
> + * This program is free software: you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2  of
> + * the License as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program. If not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +#ifndef _EHCI_H
> +#define _EHCI_H
> +
> +#define OMAP_EHCI_BASE				(OMAP54XX_L4_CORE_BASE + 0x64C00)
> +#define OMAP_UHH_BASE				(OMAP54XX_L4_CORE_BASE + 0x64000)
> +#define OMAP_USBTLL_BASE			(OMAP54XX_L4_CORE_BASE + 0x62000)
> +
> +/* TLL Register Set */
> +#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE		(1 << 3)
> +#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP		(1 << 2)
> +#define OMAP_USBTLL_SYSCONFIG_SOFTRESET		(1 << 1)
> +#define OMAP_USBTLL_SYSCONFIG_CACTIVITY		(1 << 8)
> +#define OMAP_USBTLL_SYSSTATUS_RESETDONE		1
> +
> +#define OMAP_UHH_SYSCONFIG_SOFTRESET		1
> +#define OMAP_UHH_SYSSTATUS_EHCI_RESETDONE	(1 << 2)
> +#define OMAP_UHH_SYSCONFIG_NOIDLE		(1 << 2)
> +#define OMAP_UHH_SYSCONFIG_NOSTDBY		(1 << 4)
> +
> +#define OMAP_UHH_SYSCONFIG_VAL	(OMAP_UHH_SYSCONFIG_NOIDLE | \
> +					OMAP_UHH_SYSCONFIG_NOSTDBY)
> +
> +#endif /* _EHCI_H */
> diff --git a/arch/arm/include/asm/ehci-omap.h b/arch/arm/include/asm/ehci-omap.h
> index 77e8170..0b09e9d 100644
> --- a/arch/arm/include/asm/ehci-omap.h
> +++ b/arch/arm/include/asm/ehci-omap.h
> @@ -42,6 +42,7 @@ enum usbhs_omap_port_mode {
>   /* Values of UHH_REVISION - Note: these are not given in the TRM */
>   #define OMAP_USBHS_REV1					0x00000010 /* OMAP3 */
>   #define OMAP_USBHS_REV2					0x50700100 /* OMAP4 */
> +#define OMAP_USBHS_REV2_1				0x50700101 /* OMAP5 */
>
>   /* UHH Register Set */
>   #define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN		(1 << 2)
> diff --git a/board/ti/omap5_uevm/evm.c b/board/ti/omap5_uevm/evm.c
> index 00bd72d..21d4704 100644
> --- a/board/ti/omap5_uevm/evm.c
> +++ b/board/ti/omap5_uevm/evm.c
> @@ -29,6 +29,12 @@
>
>   #include "mux_data.h"
>
> +#ifdef CONFIG_USB_EHCI
> +#include <usb.h>
> +#include <asm/arch/ehci.h>
> +#include <asm/ehci-omap.h>
> +#endif
> +
>   DECLARE_GLOBAL_DATA_PTR;
>
>   const struct omap_sysinfo sysinfo = {
> @@ -103,3 +109,32 @@ int board_mmc_init(bd_t *bis)
>   	return 0;
>   }
>   #endif
> +
> +#ifdef CONFIG_USB_EHCI
> +static struct omap_usbhs_board_data usbhs_bdata = {
> +	.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
> +	.port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC,
> +	.port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC,
> +};
> +
> +int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
> +{
> +	int ret;
> +
> +	ret = omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor);
> +	if (ret < 0) {
> +		printf("Failed to initialize ehci\n");
> +		return ret;
> +	}
> +
> +	return 0;
> +}
> +
> +int ehci_hcd_stop(void)
> +{
> +	int ret;
> +
> +	ret = omap_ehci_hcd_stop();
> +	return ret;
> +}
> +#endif
> diff --git a/board/ti/omap5_uevm/mux_data.h b/board/ti/omap5_uevm/mux_data.h
> index a82795d..dc3a8b1 100644
> --- a/board/ti/omap5_uevm/mux_data.h
> +++ b/board/ti/omap5_uevm/mux_data.h
> @@ -56,7 +56,9 @@ const struct pad_conf_entry core_padconf_array_essential[] = {
>   	{USBD0_HS_DP, (IEN | M0)},	/*  USBD0_HS_DP */
>   	{USBD0_HS_DM, (IEN | M0)},	/*  USBD0_HS_DM */
>   	{USBD0_SS_RX, (IEN | M0)},	/*  USBD0_SS_RX */
> -
> +	{HSI2_ACWAKE, (M6)},    /*  HSI2_ACWAKE */
> +	{HSI2_CAFLAG, (M6)},    /*  HSI2_CAFLAG */
both are output pins?
> +	{FREF_CLK1_OUT, (M0)},    /*  FREF_CLK1_OUT  */
>   };
>
>   const struct pad_conf_entry wkup_padconf_array_essential[] = {
> diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
> index 086c697..17f2214 100644
> --- a/drivers/usb/host/ehci-omap.c
> +++ b/drivers/usb/host/ehci-omap.c
> @@ -208,7 +208,7 @@ int omap_ehci_hcd_init(struct omap_usbhs_board_data *usbhs_pdata,
>   			clrbits_le32(&reg, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS);
>   		else
>   			setbits_le32(&reg, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS);
> -	} else if (rev == OMAP_USBHS_REV2) {
> +	} else if ((rev == OMAP_USBHS_REV2) || (rev == OMAP_USBHS_REV2_1)) {
>   		clrsetbits_le32(&reg, (OMAP_P1_MODE_CLEAR | OMAP_P2_MODE_CLEAR),
>   					OMAP4_UHH_HOSTCONFIG_APP_START_CLK);
>
> diff --git a/include/configs/omap5_common.h b/include/configs/omap5_common.h
> index b87ee42..32f053d 100644
> --- a/include/configs/omap5_common.h
> +++ b/include/configs/omap5_common.h
> @@ -113,8 +113,6 @@
>   #define CONFIG_CMD_MMC		/* MMC support                  */
>
>   /* Disabled commands */
> -#undef CONFIG_CMD_NET
> -#undef CONFIG_CMD_NFS
why? I think your intent is to move changes to being board specific, but 
lets make it separate?
>   #undef CONFIG_CMD_FPGA		/* FPGA configuration Support   */
>   #undef CONFIG_CMD_IMLS		/* List all found images        */
>
> diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h
> index 46dacc2..86f4238 100644
> --- a/include/configs/omap5_uevm.h
> +++ b/include/configs/omap5_uevm.h
> @@ -53,6 +53,29 @@
>   #define CONFIG_PARTITION_UUIDS
>   #define CONFIG_CMD_PART
>
> +/* USB UHH support options */
> +#define CONFIG_CMD_USB
> +#define CONFIG_USB_HOST
> +#define CONFIG_USB_EHCI
> +#define CONFIG_USB_EHCI_OMAP
> +#define CONFIG_USB_STORAGE
> +#define CONFIG_USB_ULPI
> +#define CONFIG_USB_ULPI_VIEWPORT_OMAP
> +#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
> +
> +#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 79
> +#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 80
> +
> +/* Enabled commands */
> +#define CONFIG_NET_MULTI
> +#define CONFIG_CMD_DHCP		/* DHCP Support			*/
> +#define CONFIG_CMD_NET		/* bootp, tftpboot, rarpboot	*/
> +#define CONFIG_CMD_NFS		/* NFS support			*/
> +
> +/* USB Networking options */
> +#define CONFIG_USB_HOST_ETHER
> +#define CONFIG_USB_ETHER_SMSC95XX
> +
>   #define CONFIG_SYS_PROMPT		"OMAP5432 uEVM # "
>
>   #define CONSOLEDEV		"ttyO2"
>
Lokesh Vutla - July 9, 2013, 3:29 a.m.
Hi Dan,
On Tuesday 09 July 2013 02:29 AM, Dan Murphy wrote:
> Add code to configure the USB EHCI host controller.
> This enumerates an ethernet controller through USB3 using
> the HSIC lines.
> 
> Signed-off-by: Dan Murphy <dmurphy@ti.com>
> ---
>  arch/arm/cpu/armv7/omap5/hw_data.c      |   15 +++++++++++
>  arch/arm/include/asm/arch-omap5/clock.h |    6 +++++
>  arch/arm/include/asm/arch-omap5/ehci.h  |   44 +++++++++++++++++++++++++++++++
>  arch/arm/include/asm/ehci-omap.h        |    1 +
>  board/ti/omap5_uevm/evm.c               |   35 ++++++++++++++++++++++++
>  board/ti/omap5_uevm/mux_data.h          |    4 ++-
>  drivers/usb/host/ehci-omap.c            |    2 +-
>  include/configs/omap5_common.h          |    2 --
>  include/configs/omap5_uevm.h            |   23 ++++++++++++++++
>  9 files changed, 128 insertions(+), 4 deletions(-)
>  create mode 100644 arch/arm/include/asm/arch-omap5/ehci.h
I see a other patch from you which adds the same file.
Is the previous patch sent by mistake?
> 
> diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c
> index 56cf1f8..f3973ee 100644
> --- a/arch/arm/cpu/armv7/omap5/hw_data.c
> +++ b/arch/arm/cpu/armv7/omap5/hw_data.c
> @@ -412,6 +412,8 @@ void enable_basic_clocks(void)
>  		(*prcm)->cm_l4per_gpio4_clkctrl,
>  		(*prcm)->cm_l4per_gpio5_clkctrl,
>  		(*prcm)->cm_l4per_gpio6_clkctrl,
> +		(*prcm)->cm_clksel_usb_60mhz,
> +		(*prcm)->cm_l3init_hsusbtll_clkctrl,
>  		0
>  	};
>  
> @@ -423,6 +425,7 @@ void enable_basic_clocks(void)
>  		(*prcm)->cm_wkup_wdtimer2_clkctrl,
>  		(*prcm)->cm_l4per_uart3_clkctrl,
>  		(*prcm)->cm_l4per_i2c1_clkctrl,
> +		(*prcm)->cm_l3init_hsusbhost_clkctrl,
>  		0
>  	};
>  
> @@ -446,6 +449,14 @@ void enable_basic_clocks(void)
>  	setbits_le32((*prcm)->cm_wkup_gptimer1_clkctrl,
>  			GPTIMER1_CLKCTRL_CLKSEL_MASK);
>  
> +	/* Enbale all 3 usb ports enable uhh, utmi and hsic clocks*/
> +	setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl,
> +			USB_HOST_HS_CLKCTRL_MASK);
> +
> +	/* Enbale all 3 usb host ports tll clocks*/
> +	setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
> +			USB_TLL_HS_CLKCTRL_MASK);
Please keep this under a macro.
> +
>  	do_enable_clocks(clk_domains_essential,
>  			 clk_modules_hw_auto_essential,
>  			 clk_modules_explicit_en_essential,
> @@ -480,6 +491,10 @@ void enable_basic_uboot_clocks(void)
>  		0
>  	};
>  
> +	/* Enbale all 3 usb host ports tll clocks*/
> +	setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
> +			USB_TLL_HS_CLKCTRL_MASK);
> +
>  	do_enable_clocks(clk_domains_essential,
>  			 clk_modules_hw_auto_essential,
>  			 clk_modules_explicit_en_essential,
> diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h
> index 4d2765d..f98fe74 100644
> --- a/arch/arm/include/asm/arch-omap5/clock.h
> +++ b/arch/arm/include/asm/arch-omap5/clock.h
> @@ -165,6 +165,12 @@
>  /* CM_L3INIT_USBPHY_CLKCTRL */
>  #define USBPHY_CLKCTRL_OPTFCLKEN_PHY_48M_MASK	8
>  
> +/* CM_L3INIT_USB_HOST_HS_CLKCTRL */
> +#define USB_HOST_HS_CLKCTRL_MASK		0x7FC0
> +
> +/* CM_L3INIT_USB_TLL_HS_CLKCTRL */
> +#define USB_TLL_HS_CLKCTRL_MASK			0x700
> +
>  /* CM_MPU_MPU_CLKCTRL */
>  #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_SHIFT	24
>  #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK	(3 << 24)
> diff --git a/arch/arm/include/asm/arch-omap5/ehci.h b/arch/arm/include/asm/arch-omap5/ehci.h
> new file mode 100644
> index 0000000..49197f2
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-omap5/ehci.h
> @@ -0,0 +1,44 @@
> +/*
> + * OMAP EHCI port support
> + * Based on LINUX KERNEL
> + * drivers/usb/host/ehci-omap.c and drivers/mfd/omap-usb-host.c
> + *
> + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com*
2013...:)

Thanks 
Lokesh
> + * Author: Govindraj R <govindraj.raja@ti.com>
> + *
> + * This program is free software: you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2  of
> + * the License as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program. If not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +#ifndef _EHCI_H
> +#define _EHCI_H
> +
> +#define OMAP_EHCI_BASE				(OMAP54XX_L4_CORE_BASE + 0x64C00)
> +#define OMAP_UHH_BASE				(OMAP54XX_L4_CORE_BASE + 0x64000)
> +#define OMAP_USBTLL_BASE			(OMAP54XX_L4_CORE_BASE + 0x62000)
> +
> +/* TLL Register Set */
> +#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE		(1 << 3)
> +#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP		(1 << 2)
> +#define OMAP_USBTLL_SYSCONFIG_SOFTRESET		(1 << 1)
> +#define OMAP_USBTLL_SYSCONFIG_CACTIVITY		(1 << 8)
> +#define OMAP_USBTLL_SYSSTATUS_RESETDONE		1
> +
> +#define OMAP_UHH_SYSCONFIG_SOFTRESET		1
> +#define OMAP_UHH_SYSSTATUS_EHCI_RESETDONE	(1 << 2)
> +#define OMAP_UHH_SYSCONFIG_NOIDLE		(1 << 2)
> +#define OMAP_UHH_SYSCONFIG_NOSTDBY		(1 << 4)
> +
> +#define OMAP_UHH_SYSCONFIG_VAL	(OMAP_UHH_SYSCONFIG_NOIDLE | \
> +					OMAP_UHH_SYSCONFIG_NOSTDBY)
> +
> +#endif /* _EHCI_H */
> diff --git a/arch/arm/include/asm/ehci-omap.h b/arch/arm/include/asm/ehci-omap.h
> index 77e8170..0b09e9d 100644
> --- a/arch/arm/include/asm/ehci-omap.h
> +++ b/arch/arm/include/asm/ehci-omap.h
> @@ -42,6 +42,7 @@ enum usbhs_omap_port_mode {
>  /* Values of UHH_REVISION - Note: these are not given in the TRM */
>  #define OMAP_USBHS_REV1					0x00000010 /* OMAP3 */
>  #define OMAP_USBHS_REV2					0x50700100 /* OMAP4 */
> +#define OMAP_USBHS_REV2_1				0x50700101 /* OMAP5 */
>  
>  /* UHH Register Set */
>  #define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN		(1 << 2)
> diff --git a/board/ti/omap5_uevm/evm.c b/board/ti/omap5_uevm/evm.c
> index 00bd72d..21d4704 100644
> --- a/board/ti/omap5_uevm/evm.c
> +++ b/board/ti/omap5_uevm/evm.c
> @@ -29,6 +29,12 @@
>  
>  #include "mux_data.h"
>  
> +#ifdef CONFIG_USB_EHCI
> +#include <usb.h>
> +#include <asm/arch/ehci.h>
> +#include <asm/ehci-omap.h>
> +#endif
> +
>  DECLARE_GLOBAL_DATA_PTR;
>  
>  const struct omap_sysinfo sysinfo = {
> @@ -103,3 +109,32 @@ int board_mmc_init(bd_t *bis)
>  	return 0;
>  }
>  #endif
> +
> +#ifdef CONFIG_USB_EHCI
> +static struct omap_usbhs_board_data usbhs_bdata = {
> +	.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
> +	.port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC,
> +	.port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC,
> +};
> +
> +int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
> +{
> +	int ret;
> +
> +	ret = omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor);
> +	if (ret < 0) {
> +		printf("Failed to initialize ehci\n");
> +		return ret;
> +	}
> +
> +	return 0;
> +}
> +
> +int ehci_hcd_stop(void)
> +{
> +	int ret;
> +
> +	ret = omap_ehci_hcd_stop();
> +	return ret;
> +}
> +#endif
> diff --git a/board/ti/omap5_uevm/mux_data.h b/board/ti/omap5_uevm/mux_data.h
> index a82795d..dc3a8b1 100644
> --- a/board/ti/omap5_uevm/mux_data.h
> +++ b/board/ti/omap5_uevm/mux_data.h
> @@ -56,7 +56,9 @@ const struct pad_conf_entry core_padconf_array_essential[] = {
>  	{USBD0_HS_DP, (IEN | M0)},	/*  USBD0_HS_DP */
>  	{USBD0_HS_DM, (IEN | M0)},	/*  USBD0_HS_DM */
>  	{USBD0_SS_RX, (IEN | M0)},	/*  USBD0_SS_RX */
> -
> +	{HSI2_ACWAKE, (M6)},    /*  HSI2_ACWAKE */
> +	{HSI2_CAFLAG, (M6)},    /*  HSI2_CAFLAG */
> +	{FREF_CLK1_OUT, (M0)},    /*  FREF_CLK1_OUT  */
>  };
>  
>  const struct pad_conf_entry wkup_padconf_array_essential[] = {
> diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
> index 086c697..17f2214 100644
> --- a/drivers/usb/host/ehci-omap.c
> +++ b/drivers/usb/host/ehci-omap.c
> @@ -208,7 +208,7 @@ int omap_ehci_hcd_init(struct omap_usbhs_board_data *usbhs_pdata,
>  			clrbits_le32(&reg, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS);
>  		else
>  			setbits_le32(&reg, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS);
> -	} else if (rev == OMAP_USBHS_REV2) {
> +	} else if ((rev == OMAP_USBHS_REV2) || (rev == OMAP_USBHS_REV2_1)) {
>  		clrsetbits_le32(&reg, (OMAP_P1_MODE_CLEAR | OMAP_P2_MODE_CLEAR),
>  					OMAP4_UHH_HOSTCONFIG_APP_START_CLK);
>  
> diff --git a/include/configs/omap5_common.h b/include/configs/omap5_common.h
> index b87ee42..32f053d 100644
> --- a/include/configs/omap5_common.h
> +++ b/include/configs/omap5_common.h
> @@ -113,8 +113,6 @@
>  #define CONFIG_CMD_MMC		/* MMC support                  */
>  
>  /* Disabled commands */
> -#undef CONFIG_CMD_NET
> -#undef CONFIG_CMD_NFS
>  #undef CONFIG_CMD_FPGA		/* FPGA configuration Support   */
>  #undef CONFIG_CMD_IMLS		/* List all found images        */
>  
> diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h
> index 46dacc2..86f4238 100644
> --- a/include/configs/omap5_uevm.h
> +++ b/include/configs/omap5_uevm.h
> @@ -53,6 +53,29 @@
>  #define CONFIG_PARTITION_UUIDS
>  #define CONFIG_CMD_PART
>  
> +/* USB UHH support options */
> +#define CONFIG_CMD_USB
> +#define CONFIG_USB_HOST
> +#define CONFIG_USB_EHCI
> +#define CONFIG_USB_EHCI_OMAP
> +#define CONFIG_USB_STORAGE
> +#define CONFIG_USB_ULPI
> +#define CONFIG_USB_ULPI_VIEWPORT_OMAP
> +#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
> +
> +#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 79
> +#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 80
> +
> +/* Enabled commands */
> +#define CONFIG_NET_MULTI
> +#define CONFIG_CMD_DHCP		/* DHCP Support			*/
> +#define CONFIG_CMD_NET		/* bootp, tftpboot, rarpboot	*/
> +#define CONFIG_CMD_NFS		/* NFS support			*/
> +
> +/* USB Networking options */
> +#define CONFIG_USB_HOST_ETHER
> +#define CONFIG_USB_ETHER_SMSC95XX
> +
>  #define CONFIG_SYS_PROMPT		"OMAP5432 uEVM # "
>  
>  #define CONSOLEDEV		"ttyO2"
>
Roger Quadros - July 9, 2013, 9:57 a.m.
Hi Dan,

On 07/08/2013 11:59 PM, Dan Murphy wrote:
> Add code to configure the USB EHCI host controller.
> This enumerates an ethernet controller through USB3 using
> the HSIC lines.
> 
> Signed-off-by: Dan Murphy <dmurphy@ti.com>
> ---
>  arch/arm/cpu/armv7/omap5/hw_data.c      |   15 +++++++++++
>  arch/arm/include/asm/arch-omap5/clock.h |    6 +++++
>  arch/arm/include/asm/arch-omap5/ehci.h  |   44 +++++++++++++++++++++++++++++++
>  arch/arm/include/asm/ehci-omap.h        |    1 +
>  board/ti/omap5_uevm/evm.c               |   35 ++++++++++++++++++++++++
>  board/ti/omap5_uevm/mux_data.h          |    4 ++-
>  drivers/usb/host/ehci-omap.c            |    2 +-
>  include/configs/omap5_common.h          |    2 --
>  include/configs/omap5_uevm.h            |   23 ++++++++++++++++
>  9 files changed, 128 insertions(+), 4 deletions(-)
>  create mode 100644 arch/arm/include/asm/arch-omap5/ehci.h
> 
> diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c
> index 56cf1f8..f3973ee 100644
> --- a/arch/arm/cpu/armv7/omap5/hw_data.c
> +++ b/arch/arm/cpu/armv7/omap5/hw_data.c
> @@ -412,6 +412,8 @@ void enable_basic_clocks(void)
>  		(*prcm)->cm_l4per_gpio4_clkctrl,
>  		(*prcm)->cm_l4per_gpio5_clkctrl,
>  		(*prcm)->cm_l4per_gpio6_clkctrl,
> +		(*prcm)->cm_clksel_usb_60mhz,
> +		(*prcm)->cm_l3init_hsusbtll_clkctrl,
>  		0
>  	};
>  
> @@ -423,6 +425,7 @@ void enable_basic_clocks(void)
>  		(*prcm)->cm_wkup_wdtimer2_clkctrl,
>  		(*prcm)->cm_l4per_uart3_clkctrl,
>  		(*prcm)->cm_l4per_i2c1_clkctrl,
> +		(*prcm)->cm_l3init_hsusbhost_clkctrl,
>  		0
>  	};
>  
> @@ -446,6 +449,14 @@ void enable_basic_clocks(void)
>  	setbits_le32((*prcm)->cm_wkup_gptimer1_clkctrl,
>  			GPTIMER1_CLKCTRL_CLKSEL_MASK);
>  
> +	/* Enbale all 3 usb ports enable uhh, utmi and hsic clocks*/
> +	setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl,
> +			USB_HOST_HS_CLKCTRL_MASK);
> +
> +	/* Enbale all 3 usb host ports tll clocks*/
> +	setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
> +			USB_TLL_HS_CLKCTRL_MASK);
> +

Why enable all 3 port clocks here? uEVM uses only 2 ports.

Did you verify that if you boot the linux kernel without USB support
then the USB_Host and USB_TLL module are back to idle state?

Just checking if we need to add something more in the linux kernel
to make sure that these modules are not stuck in transition state.

If this is taken care of, I really don't mind even if all 3 clocks kept
enabled ;).

>  	do_enable_clocks(clk_domains_essential,
>  			 clk_modules_hw_auto_essential,
>  			 clk_modules_explicit_en_essential,
> @@ -480,6 +491,10 @@ void enable_basic_uboot_clocks(void)
>  		0
>  	};
>  
> +	/* Enbale all 3 usb host ports tll clocks*/
> +	setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
> +			USB_TLL_HS_CLKCTRL_MASK);
> +
>  	do_enable_clocks(clk_domains_essential,
>  			 clk_modules_hw_auto_essential,
>  			 clk_modules_explicit_en_essential,

cheers,
-roger

Patch

diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c
index 56cf1f8..f3973ee 100644
--- a/arch/arm/cpu/armv7/omap5/hw_data.c
+++ b/arch/arm/cpu/armv7/omap5/hw_data.c
@@ -412,6 +412,8 @@  void enable_basic_clocks(void)
 		(*prcm)->cm_l4per_gpio4_clkctrl,
 		(*prcm)->cm_l4per_gpio5_clkctrl,
 		(*prcm)->cm_l4per_gpio6_clkctrl,
+		(*prcm)->cm_clksel_usb_60mhz,
+		(*prcm)->cm_l3init_hsusbtll_clkctrl,
 		0
 	};
 
@@ -423,6 +425,7 @@  void enable_basic_clocks(void)
 		(*prcm)->cm_wkup_wdtimer2_clkctrl,
 		(*prcm)->cm_l4per_uart3_clkctrl,
 		(*prcm)->cm_l4per_i2c1_clkctrl,
+		(*prcm)->cm_l3init_hsusbhost_clkctrl,
 		0
 	};
 
@@ -446,6 +449,14 @@  void enable_basic_clocks(void)
 	setbits_le32((*prcm)->cm_wkup_gptimer1_clkctrl,
 			GPTIMER1_CLKCTRL_CLKSEL_MASK);
 
+	/* Enbale all 3 usb ports enable uhh, utmi and hsic clocks*/
+	setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl,
+			USB_HOST_HS_CLKCTRL_MASK);
+
+	/* Enbale all 3 usb host ports tll clocks*/
+	setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
+			USB_TLL_HS_CLKCTRL_MASK);
+
 	do_enable_clocks(clk_domains_essential,
 			 clk_modules_hw_auto_essential,
 			 clk_modules_explicit_en_essential,
@@ -480,6 +491,10 @@  void enable_basic_uboot_clocks(void)
 		0
 	};
 
+	/* Enbale all 3 usb host ports tll clocks*/
+	setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
+			USB_TLL_HS_CLKCTRL_MASK);
+
 	do_enable_clocks(clk_domains_essential,
 			 clk_modules_hw_auto_essential,
 			 clk_modules_explicit_en_essential,
diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h
index 4d2765d..f98fe74 100644
--- a/arch/arm/include/asm/arch-omap5/clock.h
+++ b/arch/arm/include/asm/arch-omap5/clock.h
@@ -165,6 +165,12 @@ 
 /* CM_L3INIT_USBPHY_CLKCTRL */
 #define USBPHY_CLKCTRL_OPTFCLKEN_PHY_48M_MASK	8
 
+/* CM_L3INIT_USB_HOST_HS_CLKCTRL */
+#define USB_HOST_HS_CLKCTRL_MASK		0x7FC0
+
+/* CM_L3INIT_USB_TLL_HS_CLKCTRL */
+#define USB_TLL_HS_CLKCTRL_MASK			0x700
+
 /* CM_MPU_MPU_CLKCTRL */
 #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_SHIFT	24
 #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK	(3 << 24)
diff --git a/arch/arm/include/asm/arch-omap5/ehci.h b/arch/arm/include/asm/arch-omap5/ehci.h
new file mode 100644
index 0000000..49197f2
--- /dev/null
+++ b/arch/arm/include/asm/arch-omap5/ehci.h
@@ -0,0 +1,44 @@ 
+/*
+ * OMAP EHCI port support
+ * Based on LINUX KERNEL
+ * drivers/usb/host/ehci-omap.c and drivers/mfd/omap-usb-host.c
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com*
+ * Author: Govindraj R <govindraj.raja@ti.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2  of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _EHCI_H
+#define _EHCI_H
+
+#define OMAP_EHCI_BASE				(OMAP54XX_L4_CORE_BASE + 0x64C00)
+#define OMAP_UHH_BASE				(OMAP54XX_L4_CORE_BASE + 0x64000)
+#define OMAP_USBTLL_BASE			(OMAP54XX_L4_CORE_BASE + 0x62000)
+
+/* TLL Register Set */
+#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE		(1 << 3)
+#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP		(1 << 2)
+#define OMAP_USBTLL_SYSCONFIG_SOFTRESET		(1 << 1)
+#define OMAP_USBTLL_SYSCONFIG_CACTIVITY		(1 << 8)
+#define OMAP_USBTLL_SYSSTATUS_RESETDONE		1
+
+#define OMAP_UHH_SYSCONFIG_SOFTRESET		1
+#define OMAP_UHH_SYSSTATUS_EHCI_RESETDONE	(1 << 2)
+#define OMAP_UHH_SYSCONFIG_NOIDLE		(1 << 2)
+#define OMAP_UHH_SYSCONFIG_NOSTDBY		(1 << 4)
+
+#define OMAP_UHH_SYSCONFIG_VAL	(OMAP_UHH_SYSCONFIG_NOIDLE | \
+					OMAP_UHH_SYSCONFIG_NOSTDBY)
+
+#endif /* _EHCI_H */
diff --git a/arch/arm/include/asm/ehci-omap.h b/arch/arm/include/asm/ehci-omap.h
index 77e8170..0b09e9d 100644
--- a/arch/arm/include/asm/ehci-omap.h
+++ b/arch/arm/include/asm/ehci-omap.h
@@ -42,6 +42,7 @@  enum usbhs_omap_port_mode {
 /* Values of UHH_REVISION - Note: these are not given in the TRM */
 #define OMAP_USBHS_REV1					0x00000010 /* OMAP3 */
 #define OMAP_USBHS_REV2					0x50700100 /* OMAP4 */
+#define OMAP_USBHS_REV2_1				0x50700101 /* OMAP5 */
 
 /* UHH Register Set */
 #define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN		(1 << 2)
diff --git a/board/ti/omap5_uevm/evm.c b/board/ti/omap5_uevm/evm.c
index 00bd72d..21d4704 100644
--- a/board/ti/omap5_uevm/evm.c
+++ b/board/ti/omap5_uevm/evm.c
@@ -29,6 +29,12 @@ 
 
 #include "mux_data.h"
 
+#ifdef CONFIG_USB_EHCI
+#include <usb.h>
+#include <asm/arch/ehci.h>
+#include <asm/ehci-omap.h>
+#endif
+
 DECLARE_GLOBAL_DATA_PTR;
 
 const struct omap_sysinfo sysinfo = {
@@ -103,3 +109,32 @@  int board_mmc_init(bd_t *bis)
 	return 0;
 }
 #endif
+
+#ifdef CONFIG_USB_EHCI
+static struct omap_usbhs_board_data usbhs_bdata = {
+	.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
+	.port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC,
+	.port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC,
+};
+
+int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+{
+	int ret;
+
+	ret = omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor);
+	if (ret < 0) {
+		printf("Failed to initialize ehci\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+int ehci_hcd_stop(void)
+{
+	int ret;
+
+	ret = omap_ehci_hcd_stop();
+	return ret;
+}
+#endif
diff --git a/board/ti/omap5_uevm/mux_data.h b/board/ti/omap5_uevm/mux_data.h
index a82795d..dc3a8b1 100644
--- a/board/ti/omap5_uevm/mux_data.h
+++ b/board/ti/omap5_uevm/mux_data.h
@@ -56,7 +56,9 @@  const struct pad_conf_entry core_padconf_array_essential[] = {
 	{USBD0_HS_DP, (IEN | M0)},	/*  USBD0_HS_DP */
 	{USBD0_HS_DM, (IEN | M0)},	/*  USBD0_HS_DM */
 	{USBD0_SS_RX, (IEN | M0)},	/*  USBD0_SS_RX */
-
+	{HSI2_ACWAKE, (M6)},    /*  HSI2_ACWAKE */
+	{HSI2_CAFLAG, (M6)},    /*  HSI2_CAFLAG */
+	{FREF_CLK1_OUT, (M0)},    /*  FREF_CLK1_OUT  */
 };
 
 const struct pad_conf_entry wkup_padconf_array_essential[] = {
diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
index 086c697..17f2214 100644
--- a/drivers/usb/host/ehci-omap.c
+++ b/drivers/usb/host/ehci-omap.c
@@ -208,7 +208,7 @@  int omap_ehci_hcd_init(struct omap_usbhs_board_data *usbhs_pdata,
 			clrbits_le32(&reg, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS);
 		else
 			setbits_le32(&reg, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS);
-	} else if (rev == OMAP_USBHS_REV2) {
+	} else if ((rev == OMAP_USBHS_REV2) || (rev == OMAP_USBHS_REV2_1)) {
 		clrsetbits_le32(&reg, (OMAP_P1_MODE_CLEAR | OMAP_P2_MODE_CLEAR),
 					OMAP4_UHH_HOSTCONFIG_APP_START_CLK);
 
diff --git a/include/configs/omap5_common.h b/include/configs/omap5_common.h
index b87ee42..32f053d 100644
--- a/include/configs/omap5_common.h
+++ b/include/configs/omap5_common.h
@@ -113,8 +113,6 @@ 
 #define CONFIG_CMD_MMC		/* MMC support                  */
 
 /* Disabled commands */
-#undef CONFIG_CMD_NET
-#undef CONFIG_CMD_NFS
 #undef CONFIG_CMD_FPGA		/* FPGA configuration Support   */
 #undef CONFIG_CMD_IMLS		/* List all found images        */
 
diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h
index 46dacc2..86f4238 100644
--- a/include/configs/omap5_uevm.h
+++ b/include/configs/omap5_uevm.h
@@ -53,6 +53,29 @@ 
 #define CONFIG_PARTITION_UUIDS
 #define CONFIG_CMD_PART
 
+/* USB UHH support options */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_HOST
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_OMAP
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_ULPI
+#define CONFIG_USB_ULPI_VIEWPORT_OMAP
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
+
+#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 79
+#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 80
+
+/* Enabled commands */
+#define CONFIG_NET_MULTI
+#define CONFIG_CMD_DHCP		/* DHCP Support			*/
+#define CONFIG_CMD_NET		/* bootp, tftpboot, rarpboot	*/
+#define CONFIG_CMD_NFS		/* NFS support			*/
+
+/* USB Networking options */
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_SMSC95XX
+
 #define CONFIG_SYS_PROMPT		"OMAP5432 uEVM # "
 
 #define CONSOLEDEV		"ttyO2"