From patchwork Fri Jul 5 10:44:40 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hiroshi Doyu X-Patchwork-Id: 257087 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id D47492C0090 for ; Fri, 5 Jul 2013 20:46:02 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757303Ab3GEKqB (ORCPT ); Fri, 5 Jul 2013 06:46:01 -0400 Received: from hqemgate04.nvidia.com ([216.228.121.35]:14851 "EHLO hqemgate04.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757207Ab3GEKqB (ORCPT ); Fri, 5 Jul 2013 06:46:01 -0400 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate04.nvidia.com id ; Fri, 05 Jul 2013 03:45:43 -0700 Received: from hqemhub02.nvidia.com ([172.20.12.94]) by hqnvupgp07.nvidia.com (PGP Universal service); Fri, 05 Jul 2013 03:46:30 -0700 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Fri, 05 Jul 2013 03:46:30 -0700 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by hqemhub02.nvidia.com (172.20.150.31) with Microsoft SMTP Server id 8.3.298.1; Fri, 5 Jul 2013 03:45:25 -0700 Received: from sc-daphne.nvidia.com (Not Verified[172.20.232.60]) by hqnvemgw02.nvidia.com with MailMarshal (v7,1,2,5326) id ; Fri, 05 Jul 2013 03:45:25 -0700 Received: from oreo.Nvidia.com (dhcp-10-21-26-134.nvidia.com [10.21.26.134]) by sc-daphne.nvidia.com (8.13.8+Sun/8.8.8) with ESMTP id r65AjE3d022328; Fri, 5 Jul 2013 03:45:24 -0700 (PDT) From: Hiroshi Doyu To: CC: , , , Hiroshi Doyu Subject: [PATCH v2 05/22] ARM: dt: tegra30: iommu: Add "nvidia, memory-client" Date: Fri, 5 Jul 2013 13:44:40 +0300 Message-ID: <1373021097-32420-6-git-send-email-hdoyu@nvidia.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1373021097-32420-1-git-send-email-hdoyu@nvidia.com> References: <1373021097-32420-1-git-send-email-hdoyu@nvidia.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Add "nvidia,memory-client" to identify which swgroup ID a device belongs to. Signed-off-by: Hiroshi Doyu --- arch/arm/boot/dts/tegra30.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 4a9594e..4aa5b4a 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -23,6 +23,7 @@ interrupts = , /* syncpt */ ; /* general */ clocks = <&tegra_car TEGRA30_CLK_HOST1X>; + nvidia,memory-client = ; #address-cells = <1>; #size-cells = <1>; @@ -34,6 +35,7 @@ reg = <0x54040000 0x00040000>; interrupts = ; clocks = <&tegra_car TEGRA30_CLK_MPE>; + nvidia,memory-client = ; }; vi { @@ -41,6 +43,7 @@ reg = <0x54080000 0x00040000>; interrupts = ; clocks = <&tegra_car TEGRA30_CLK_VI>; + nvidia,memory-client = ; }; epp { @@ -48,6 +51,7 @@ reg = <0x540c0000 0x00040000>; interrupts = ; clocks = <&tegra_car TEGRA30_CLK_EPP>; + nvidia,memory-client = ; }; isp { @@ -55,6 +59,7 @@ reg = <0x54100000 0x00040000>; interrupts = ; clocks = <&tegra_car TEGRA30_CLK_ISP>; + nvidia,memory-client = ; }; gr2d { @@ -62,6 +67,7 @@ reg = <0x54140000 0x00040000>; interrupts = ; clocks = <&tegra_car TEGRA30_CLK_GR2D>; + nvidia,memory-client = ; }; gr3d { @@ -69,6 +75,8 @@ reg = <0x54180000 0x00040000>; clocks = <&tegra_car 24 &tegra_car 98>; clock-names = "3d", "3d2"; + nvidia,memory-client = ; }; dc@54200000 { @@ -78,6 +86,7 @@ clocks = <&tegra_car TEGRA30_CLK_DISP1>, <&tegra_car TEGRA30_CLK_PLL_P>; clock-names = "disp1", "parent"; + nvidia,memory-client = ; rgb { status = "disabled"; @@ -91,6 +100,7 @@ clocks = <&tegra_car TEGRA30_CLK_DISP2>, <&tegra_car TEGRA30_CLK_PLL_P>; clock-names = "disp2", "parent"; + nvidia,memory-client = ; rgb { status = "disabled"; @@ -247,6 +257,7 @@ interrupts = ; nvidia,dma-request-selector = <&apbdma 8>; clocks = <&tegra_car TEGRA30_CLK_UARTA>; + nvidia,memory-client = ; status = "disabled"; }; @@ -257,6 +268,7 @@ interrupts = ; nvidia,dma-request-selector = <&apbdma 9>; clocks = <&tegra_car TEGRA30_CLK_UARTB>; + nvidia,memory-client = ; status = "disabled"; }; @@ -267,6 +279,7 @@ interrupts = ; nvidia,dma-request-selector = <&apbdma 10>; clocks = <&tegra_car TEGRA30_CLK_UARTC>; + nvidia,memory-client = ; status = "disabled"; }; @@ -277,6 +290,7 @@ interrupts = ; nvidia,dma-request-selector = <&apbdma 19>; clocks = <&tegra_car TEGRA30_CLK_UARTD>; + nvidia,memory-client = ; status = "disabled"; }; @@ -287,6 +301,7 @@ interrupts = ; nvidia,dma-request-selector = <&apbdma 20>; clocks = <&tegra_car TEGRA30_CLK_UARTE>; + nvidia,memory-client = ; status = "disabled"; }; @@ -536,6 +551,7 @@ reg = <0x78000000 0x200>; interrupts = ; clocks = <&tegra_car TEGRA30_CLK_SDMMC1>; + nvidia,memory-client = ; status = "disabled"; }; @@ -544,6 +560,7 @@ reg = <0x78000200 0x200>; interrupts = ; clocks = <&tegra_car TEGRA30_CLK_SDMMC2>; + nvidia,memory-client = ; status = "disabled"; }; @@ -552,6 +569,7 @@ reg = <0x78000400 0x200>; interrupts = ; clocks = <&tegra_car TEGRA30_CLK_SDMMC3>; + nvidia,memory-client = ; status = "disabled"; }; @@ -560,6 +578,7 @@ reg = <0x78000600 0x200>; interrupts = ; clocks = <&tegra_car TEGRA30_CLK_SDMMC4>; + nvidia,memory-client = ; status = "disabled"; };