From patchwork Thu Jul 4 11:36:48 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?546L5a6H6Iiq?= X-Patchwork-Id: 256879 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from casper.infradead.org (casper.infradead.org [IPv6:2001:770:15f::2]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 568A52C0091 for ; Thu, 4 Jul 2013 21:37:48 +1000 (EST) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Uuhqc-0001Y1-IS; Thu, 04 Jul 2013 11:37:14 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Uuhqa-0005PP-KG; Thu, 04 Jul 2013 11:37:12 +0000 Received: from mail-oa0-x22c.google.com ([2607:f8b0:4003:c02::22c]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UuhqY-0005OU-C7; Thu, 04 Jul 2013 11:37:11 +0000 Received: by mail-oa0-f44.google.com with SMTP id l10so1816542oag.3 for ; Thu, 04 Jul 2013 04:36:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:date:message-id:subject:from:to:cc:content-type; bh=x12YaIAeOQsUdVvazJYL2ptKAz9MO9yyXp8NcHoHutY=; b=pi1nLBJj2w7sM0NKJZQvGoLgVAEZdbIsFI5uxY7LoziLw7Bp9X0h2F4OU+sR3zd5Fu e1hAz3018ccfqe0I5xTUUldkBYtHnLuGdtzBwdNXasqrFwZVMRSwqIqn1h1J8jQ5g4kP CS1xadwd/FI0lgQVW2WpW8iYNjGiIbEzZU0ExdZo9P4X/G1Wn4/RRjPVmBA63dHaMUAg JjT5LAWockORPVXWBXKLqEJvqexcJZEc+sZuumnv3UJigMcVQLBPUpN19PYpdiV8/veT kqx26S0L9l+yIMCfcQrIoyxr4rzBiAdSEYdRgKELk9AZ23Q5Jg4kOVyXUbM4B0A2flH/ ETpg== MIME-Version: 1.0 X-Received: by 10.60.137.225 with SMTP id ql1mr5599911oeb.48.1372937809065; Thu, 04 Jul 2013 04:36:49 -0700 (PDT) Received: by 10.182.73.170 with HTTP; Thu, 4 Jul 2013 04:36:48 -0700 (PDT) Date: Thu, 4 Jul 2013 19:36:48 +0800 Message-ID: Subject: SPI: DUAL/QUAD support From: yuhang wang To: broonie@kernel.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130704_073710_551387_C4166353 X-CRM114-Status: GOOD ( 15.39 ) X-Spam-Score: -1.8 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.8 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (wangyuhang2014[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit (wangyuhang2014[at]gmail.com) -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Grant Likely , spi-devel-general@lists.sourceforge.net, linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Hi Mark, Thanks for your reply. I have added the kerneldoc into the patch below to explain the "DUAL" and "QUAD" modes. Hope for your suggestions. Documentation/spi/spi-dual_quad | 102 +++++++++++++++++++++++++++++++++++++++ drivers/mtd/devices/m25p80.c | 2 + drivers/spi/spi.c | 2 + include/linux/spi/spi.h | 8 +++ 4 files changed, 114 insertions(+) create mode 100644 Documentation/spi/spi-dual_quad --- 1.7.9.5 Best regards diff --git a/Documentation/spi/spi-dual_quad b/Documentation/spi/spi-dual_quad new file mode 100644 index 0000000..06a2f9e --- /dev/null +++ b/Documentation/spi/spi-dual_quad @@ -0,0 +1,102 @@ +spi-dual_quad: make spi support DUAL/QUAD +============================================ + +Description +---------------------- +DUAL/QUAD means spi can transfer in 2bits/4bits at the same time. +These spi controllers provide 8 data lines(4-tx and 4-rx). User can +choose tranfer mode(SINGLE/DUAL/QUAD) by setting the certain register. +Though SPI is a serial interface, some spi controllers can support +transmitting and receiving in DUAL and QUAD modes aimed to improve +the performance. Also as spi slave lots of flashes do support this attribute, +such as serial-norflash in spansion company. + +Serial-flash such as s25fl129p in spansion company. +In common way, the flash has two data pins(IO0,IO1) supporting SINGLE/DUAL. +The flash also can work in QUAD mode, there are still other two pins(HOLD,W#)which +in other usage will be regarded as data pins. + +The members added below is used to provide the transfer information from slave +to master. Thus spi controller driver can distinguish the transfer mode(SINGLE +/DUAL/QUAD) and set the certain controlling register. + + +Members added +---------------------- +struct spi_device { ++ u8 rx_bitwidth; ++ u8 tx_bitwidth; +} + +struct spi_transfer { ++ u8 bitwidth; ++#define SPI_BITWIDTH_SINGLE 0x01; /* 1bit transfer */ ++#define SPI_BITWIDTH_DUAL 0x02; /* 2bits transfer */ ++#define SPI_BITWIDTH_QUAD 0x03; /* 4bits transfer */ +} + +struct spi_board_info { ++ u8 rx_bitwidth; ++ u8 tx_bitwidth; +} + + +How to use the added members +---------------------- + +DECLARE SLAVE DEVICES + +Normally your arch/.../mach-*/board-*.c files would provide a small table +listing the SPI devices on each board. Details refered to "spi-summary". +At the same time, if your slave device support DUAL/QUAD transfer, you can +set as below: + + static struct spi_board_info spi_board_info[] __initdata = { + { + .modalias = "xxxxx", + ....... + .chip_select = 0, + .rx_bitwidth = SPI_BITWIDTH_DUAL, + .tx_bitwidth = SPI_BITWIDTH_QUAD, + }, + }; + +ORGANISE SPI PACKAGE + +When your slave is registered by: + + spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info)); + +rx_bitwidth and tx_bitwidth members will be delivered into "struct spi_device". +Thus the flash driver can notice the tranfer mode that user has appointed. +Flash driver receives the data from the uplayer and organise the spi_transfer +package as below: + + ...... + struct spi_transfer t[2]; + struct spi_message m; + spi_message_init(&m); + memset(t, 0, (sizeof t)); + ...... + t[0].rx_buf = buf; + t[0].len = len; + t[0].bitwidth = spi->rx_bitwidth/spi->tx_bitwidth; + spi_message_add_tail(&t[0], &m); + ...... + spi_sync(spi, &m); + ...... + +finally, spi controller driver will deal with the spi_tranfer package. +Controller driver will pick the bitwidth member out due to which set the transfer +mode register. + diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c index 5b6b072..1411678 100644 --- a/drivers/mtd/devices/m25p80.c +++ b/drivers/mtd/devices/m25p80.c @@ -354,6 +354,7 @@ static int m25p80_read(struct mtd_info *mtd, loff_t from, size_t len, t[1].rx_buf = buf; t[1].len = len; + t[1].bitwidth = flash->spi->rx_bitwidth; spi_message_add_tail(&t[1], &m); mutex_lock(&flash->lock); @@ -409,6 +410,7 @@ static int m25p80_write(struct mtd_info *mtd, loff_t to, size_t len, spi_message_add_tail(&t[0], &m); t[1].tx_buf = buf; + t[1].bitwidth = flash->spi->tx_bitwidth; spi_message_add_tail(&t[1], &m); mutex_lock(&flash->lock); diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 004b10f..cd99022 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -452,6 +452,8 @@ struct spi_device *spi_new_device(struct spi_master *master, proxy->irq = chip->irq; strlcpy(proxy->modalias, chip->modalias, sizeof(proxy->modalias)); proxy->dev.platform_data = (void *) chip->platform_data; + proxy->rx_bitwidth = chip->rx_bitwidth; + proxy->tx_bitwidth = chip->tx_bitwidth; proxy->controller_data = chip->controller_data; proxy->controller_state = NULL; diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index 38c2b92..ddcf308 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -93,6 +93,8 @@ struct spi_device { void *controller_data; char modalias[SPI_NAME_SIZE]; int cs_gpio; /* chip select gpio */ + u8 rx_bitwidth; + u8 tx_bitwidth; /* * likely need more hooks for more protocol options affecting how @@ -511,6 +513,10 @@ struct spi_transfer { dma_addr_t rx_dma; unsigned cs_change:1; + u8 bitwidth; +#define SPI_BITWIDTH_SINGLE 0x01; /* 1bit transfer */ +#define SPI_BITWIDTH_DUAL 0x02; /* 2bits transfer */ +#define SPI_BITWIDTH_QUAD 0x03; /* 4bits transfer */ u8 bits_per_word; u16 delay_usecs; u32 speed_hz; @@ -859,6 +865,8 @@ struct spi_board_info { * where the default of SPI_CS_HIGH = 0 is wrong. */ u8 mode; + u8 rx_bitwidth; + u8 tx_bitwidth; /* ... may need additional spi_device chip config data here. * avoid stuff protocol drivers can set; but include stuff