From patchwork Mon Jul 1 17:35:09 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 256188 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 1F6502C007C for ; Tue, 2 Jul 2013 03:49:39 +1000 (EST) Received: from localhost ([::1]:40039 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UtiEK-0006sI-Mq for incoming@patchwork.ozlabs.org; Mon, 01 Jul 2013 13:49:36 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34927) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UtiDt-0006j4-NE for qemu-devel@nongnu.org; Mon, 01 Jul 2013 13:49:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Uti0h-0002yf-Bc for qemu-devel@nongnu.org; Mon, 01 Jul 2013 13:35:37 -0400 Received: from mnementh.archaic.org.uk ([81.2.115.146]:32885) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Uti0h-0002vc-3a for qemu-devel@nongnu.org; Mon, 01 Jul 2013 13:35:31 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1Uti0Y-0002Ks-Ar; Mon, 01 Jul 2013 18:35:22 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Mon, 1 Jul 2013 18:35:09 +0100 Message-Id: <1372700120-8896-11-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1372700120-8896-1-git-send-email-peter.maydell@linaro.org> References: <1372700120-8896-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 81.2.115.146 Cc: Andreas Schwab , Alexander Graf , "Mian M. Hamayun" , patches@linaro.org Subject: [Qemu-devel] [PATCH v5 10/21] linux-user: Add cpu loop for AArch64 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Add the main linux-user cpu loop for AArch64. Since AArch64 has a different system call interface, doesn't need to worry about FPA emulation and may in the future keep the prefetch/data abort information in different system registers, it's simplest just to use a completely separate loop from the 32 bit ARM target, rather than peppering it with ifdefs. Signed-off-by: Peter Maydell --- linux-user/main.c | 82 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 82 insertions(+) diff --git a/linux-user/main.c b/linux-user/main.c index af82db8..8aba817 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -484,6 +484,9 @@ void cpu_loop(CPUX86State *env) __r; \ }) +#ifdef TARGET_ABI32 +/* Commpage handling -- there is no commpage for AArch64 */ + /* * See the Linux kernel's Documentation/arm/kernel_user_helpers.txt * Input: @@ -617,6 +620,7 @@ do_kernel_trap(CPUARMState *env) return 0; } +#endif static int do_strex(CPUARMState *env) { @@ -696,6 +700,7 @@ done: return segv; } +#ifdef TARGET_ABI32 void cpu_loop(CPUARMState *env) { CPUState *cs = CPU(arm_env_get_cpu(env)); @@ -908,6 +913,83 @@ void cpu_loop(CPUARMState *env) } } +#else + +/* AArch64 main loop */ +void cpu_loop(CPUARMState *env) +{ + CPUState *cs = CPU(arm_env_get_cpu(env)); + int trapnr, sig; + target_siginfo_t info; + uint32_t addr; + + for (;;) { + cpu_exec_start(cs); + trapnr = cpu_arm_exec(env); + cpu_exec_end(cs); + + switch (trapnr) { + case EXCP_SWI: + env->xregs[0] = do_syscall(env, + env->xregs[8], + env->xregs[0], + env->xregs[1], + env->xregs[2], + env->xregs[3], + env->xregs[4], + env->xregs[5], + 0, 0); + break; + case EXCP_INTERRUPT: + /* just indicate that signals should be handled asap */ + break; + case EXCP_UDEF: + info.si_signo = SIGILL; + info.si_errno = 0; + info.si_code = TARGET_ILL_ILLOPN; + info._sifields._sigfault._addr = env->pc; + queue_signal(env, info.si_signo, &info); + break; + case EXCP_PREFETCH_ABORT: + addr = env->cp15.c6_insn; + goto do_segv; + case EXCP_DATA_ABORT: + addr = env->cp15.c6_data; + do_segv: + info.si_signo = SIGSEGV; + info.si_errno = 0; + /* XXX: check env->error_code */ + info.si_code = TARGET_SEGV_MAPERR; + info._sifields._sigfault._addr = addr; + queue_signal(env, info.si_signo, &info); + break; + case EXCP_DEBUG: + case EXCP_BKPT: + sig = gdb_handlesig(env, TARGET_SIGTRAP); + if (sig) { + info.si_signo = sig; + info.si_errno = 0; + info.si_code = TARGET_TRAP_BRKPT; + queue_signal(env, info.si_signo, &info); + } + break; + case EXCP_STREX: + if (do_strex(env)) { + addr = env->cp15.c6_data; + goto do_segv; + } + break; + default: + fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", + trapnr); + cpu_dump_state(cs, stderr, fprintf, 0); + abort(); + } + process_pending_signals(env); + } +} +#endif /* ndef TARGET_ABI32 */ + #endif #ifdef TARGET_UNICORE32