Patchwork [26/32] PPC: Fix GDB read on code area for PPC6xx

login
register
mail settings
Submitter Alexander Graf
Date June 30, 2013, 1:45 a.m.
Message ID <1372556709-23868-27-git-send-email-agraf@suse.de>
Download mbox | patch
Permalink /patch/255830/
State New
Headers show

Comments

Alexander Graf - June 30, 2013, 1:45 a.m.
From: Fabien Chouteau <chouteau@adacore.com>

On PPC 6xx, data and code have separated TLBs. Until now QEMU was only
looking at data TLBs, which is not good when GDB wants to read code.

This patch adds a second call to get_physical_address() with an
ACCESS_CODE type of access when the first call with ACCESS_INT fails.

Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
---
 target-ppc/mmu_helper.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

Patch

diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
index 34330dc..385b67a 100644
--- a/target-ppc/mmu_helper.c
+++ b/target-ppc/mmu_helper.c
@@ -1431,7 +1431,15 @@  hwaddr cpu_get_phys_page_debug(CPUPPCState *env, target_ulong addr)
     }
 
     if (unlikely(get_physical_address(env, &ctx, addr, 0, ACCESS_INT) != 0)) {
-        return -1;
+
+        /* Some MMUs have separate TLBs for code and data. If we only try an
+         * ACCESS_INT, we may not be able to read instructions mapped by code
+         * TLBs, so we also try a ACCESS_CODE.
+         */
+        if (unlikely(get_physical_address(env, &ctx, addr, 0,
+                                          ACCESS_CODE) != 0)) {
+            return -1;
+        }
     }
 
     return ctx.raddr & TARGET_PAGE_MASK;