[RFC,qom-cpu,24/41] target-alpha: Change DisasContext::env to CPUState

Submitted by Andreas Färber on June 29, 2013, 8:01 p.m.

Details

Message ID 1372536117-28167-25-git-send-email-afaerber@suse.de
State New
Headers show

Commit Message

Andreas Färber June 29, 2013, 8:01 p.m.
Needed for moving singlestep_enabled to CPUState.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-alpha/translate.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

Richard Henderson July 1, 2013, 5:18 p.m.
On 06/29/2013 01:01 PM, Andreas Färber wrote:
> Needed for moving singlestep_enabled to CPUState.
> 
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  target-alpha/translate.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)

Reviewed-by: Richard Henderson <rth@twiddle.net>


r~
Richard Henderson July 1, 2013, 5:23 p.m.
On 06/29/2013 01:01 PM, Andreas Färber wrote:
> -    CPUAlphaState *env;
> +    AlphaCPU *cpu;

Actually, I take this back.  I'd prefer that we simply pull out the two
variables that we need and place them in the DisasContext.  That's the way it
should have been in the first place.

> @@ -3394,7 +3394,7 @@ static inline void gen_intermediate_code_internal(AlphaCPU *cpu,
>      gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE;
>  
>      ctx.tb = tb;
> -    ctx.env = env;
> +    ctx.cpu = alpha_env_get_cpu(env);

This should have been ctx.cpu = cpu anyway, apparently fixed in the next patch.


r~
Andreas Färber July 1, 2013, 5:42 p.m.
Am 01.07.2013 19:23, schrieb Richard Henderson:
> On 06/29/2013 01:01 PM, Andreas Färber wrote:
>> -    CPUAlphaState *env;
>> +    AlphaCPU *cpu;
> 
> Actually, I take this back.  I'd prefer that we simply pull out the two
> variables that we need and place them in the DisasContext.  That's the way it
> should have been in the first place.

Fine with me. Do you want to send a patch based on master right away, or
should I do that in v2?

>> @@ -3394,7 +3394,7 @@ static inline void gen_intermediate_code_internal(AlphaCPU *cpu,
>>      gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE;
>>  
>>      ctx.tb = tb;
>> -    ctx.env = env;
>> +    ctx.cpu = alpha_env_get_cpu(env);
> 
> This should have been ctx.cpu = cpu anyway, apparently fixed in the next patch.

Oops, I had done alpha first and then prepended the AlphaCPU propagation
alongside the other targets that needed it.

Andreas

Patch hide | download patch | download mbox

diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index dd7f0fb..147285a 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -38,7 +38,7 @@ 
 typedef struct DisasContext DisasContext;
 struct DisasContext {
     struct TranslationBlock *tb;
-    CPUAlphaState *env;
+    AlphaCPU *cpu;
     uint64_t pc;
     int mem_idx;
 
@@ -380,7 +380,7 @@  static int use_goto_tb(DisasContext *ctx, uint64_t dest)
     /* Check for the dest on the same page as the start of the TB.  We
        also want to suppress goto_tb in the case of single-steping and IO.  */
     return (((ctx->tb->pc ^ dest) & TARGET_PAGE_MASK) == 0
-            && !ctx->env->singlestep_enabled
+            && !ctx->cpu->env.singlestep_enabled
             && !(ctx->tb->cflags & CF_LAST_IO));
 }
 
@@ -2245,7 +2245,7 @@  static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
         case 0x6C:
             /* IMPLVER */
             if (rc != 31)
-                tcg_gen_movi_i64(cpu_ir[rc], ctx->env->implver);
+                tcg_gen_movi_i64(cpu_ir[rc], ctx->cpu->env.implver);
             break;
         default:
             goto invalid_opc;
@@ -3394,7 +3394,7 @@  static inline void gen_intermediate_code_internal(AlphaCPU *cpu,
     gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE;
 
     ctx.tb = tb;
-    ctx.env = env;
+    ctx.cpu = alpha_env_get_cpu(env);
     ctx.pc = pc_start;
     ctx.mem_idx = cpu_mmu_index(env);