@@ -1681,7 +1681,7 @@ static subpage_t *subpage_init(AddressSpace *as, hwaddr base)
mmio->as = as;
mmio->base = base;
- memory_region_init_io(&mmio->iomem, &subpage_ops, mmio,
+ memory_region_init_io(&mmio->iomem, NULL, &subpage_ops, mmio,
"subpage", TARGET_PAGE_SIZE);
mmio->iomem.subpage = true;
#if defined(DEBUG_SUBPAGE)
@@ -1712,12 +1712,12 @@ MemoryRegion *iotlb_to_region(hwaddr index)
static void io_mem_init(void)
{
- memory_region_init_io(&io_mem_rom, &unassigned_mem_ops, NULL, "rom", UINT64_MAX);
- memory_region_init_io(&io_mem_unassigned, &unassigned_mem_ops, NULL,
+ memory_region_init_io(&io_mem_rom, NULL, &unassigned_mem_ops, NULL, "rom", UINT64_MAX);
+ memory_region_init_io(&io_mem_unassigned, NULL, &unassigned_mem_ops, NULL,
"unassigned", UINT64_MAX);
- memory_region_init_io(&io_mem_notdirty, ¬dirty_mem_ops, NULL,
+ memory_region_init_io(&io_mem_notdirty, NULL, ¬dirty_mem_ops, NULL,
"notdirty", UINT64_MAX);
- memory_region_init_io(&io_mem_watch, &watch_mem_ops, NULL,
+ memory_region_init_io(&io_mem_watch, NULL, &watch_mem_ops, NULL,
"watch", UINT64_MAX);
}
@@ -1800,11 +1800,11 @@ void address_space_destroy_dispatch(AddressSpace *as)
static void memory_map_init(void)
{
system_memory = g_malloc(sizeof(*system_memory));
- memory_region_init(system_memory, "system", INT64_MAX);
+ memory_region_init(system_memory, NULL, "system", INT64_MAX);
address_space_init(&address_space_memory, system_memory, "memory");
system_io = g_malloc(sizeof(*system_io));
- memory_region_init(system_io, "io", 65536);
+ memory_region_init(system_io, NULL, "io", 65536);
address_space_init(&address_space_io, system_io, "I/O");
memory_listener_register(&core_memory_listener, &address_space_memory);
@@ -419,7 +419,7 @@ void acpi_pm1_evt_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
MemoryRegion *parent)
{
ar->pm1.evt.update_sci = update_sci;
- memory_region_init_io(&ar->pm1.evt.io, &acpi_pm_evt_ops, ar, "acpi-evt", 4);
+ memory_region_init_io(&ar->pm1.evt.io, NULL, &acpi_pm_evt_ops, ar, "acpi-evt", 4);
memory_region_add_subregion(parent, 0, &ar->pm1.evt.io);
}
@@ -481,7 +481,7 @@ void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
{
ar->tmr.update_sci = update_sci;
ar->tmr.timer = qemu_new_timer_ns(vm_clock, acpi_pm_tmr_timer, ar);
- memory_region_init_io(&ar->tmr.io, &acpi_pm_tmr_ops, ar, "acpi-tmr", 4);
+ memory_region_init_io(&ar->tmr.io, NULL, &acpi_pm_tmr_ops, ar, "acpi-tmr", 4);
memory_region_add_subregion(parent, 8, &ar->tmr.io);
}
@@ -552,7 +552,7 @@ void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent, uint8_t s4_val)
ar->pm1.cnt.s4_val = s4_val;
ar->wakeup.notify = acpi_notify_wakeup;
qemu_register_wakeup_notifier(&ar->wakeup);
- memory_region_init_io(&ar->pm1.cnt.io, &acpi_pm_cnt_ops, ar, "acpi-cnt", 2);
+ memory_region_init_io(&ar->pm1.cnt.io, NULL, &acpi_pm_cnt_ops, ar, "acpi-cnt", 2);
memory_region_add_subregion(parent, 4, &ar->pm1.cnt.io);
}
@@ -205,7 +205,7 @@ static void pm_powerdown_req(Notifier *n, void *opaque)
void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
qemu_irq sci_irq)
{
- memory_region_init(&pm->io, "ich9-pm", ICH9_PMIO_SIZE);
+ memory_region_init(&pm->io, NULL, "ich9-pm", ICH9_PMIO_SIZE);
memory_region_set_enabled(&pm->io, false);
memory_region_add_subregion(pci_address_space_io(lpc_pci),
0, &pm->io);
@@ -215,11 +215,11 @@ void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
acpi_pm1_cnt_init(&pm->acpi_regs, &pm->io, 2);
acpi_gpe_init(&pm->acpi_regs, ICH9_PMIO_GPE0_LEN);
- memory_region_init_io(&pm->io_gpe, &ich9_gpe_ops, pm, "apci-gpe0",
+ memory_region_init_io(&pm->io_gpe, NULL, &ich9_gpe_ops, pm, "apci-gpe0",
ICH9_PMIO_GPE0_LEN);
memory_region_add_subregion(&pm->io, ICH9_PMIO_GPE0_STS, &pm->io_gpe);
- memory_region_init_io(&pm->io_smi, &ich9_smi_ops, pm, "apci-smi",
+ memory_region_init_io(&pm->io_smi, NULL, &ich9_smi_ops, pm, "apci-smi",
8);
memory_region_add_subregion(&pm->io, ICH9_PMIO_SMI_EN, &pm->io_smi);
@@ -424,7 +424,7 @@ static int piix4_pm_initfn(PCIDevice *dev)
memory_region_add_subregion(pci_address_space_io(dev),
s->smb_io_base, &s->smb.io);
- memory_region_init(&s->io, "piix4-pm", 64);
+ memory_region_init(&s->io, NULL, "piix4-pm", 64);
memory_region_set_enabled(&s->io, false);
memory_region_add_subregion(pci_address_space_io(dev),
0, &s->io);
@@ -671,18 +671,18 @@ static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev,
static void piix4_acpi_system_hot_add_init(MemoryRegion *parent,
PCIBus *bus, PIIX4PMState *s)
{
- memory_region_init_io(&s->io_gpe, &piix4_gpe_ops, s, "apci-gpe0",
+ memory_region_init_io(&s->io_gpe, NULL, &piix4_gpe_ops, s, "apci-gpe0",
GPE_LEN);
memory_region_add_subregion(parent, GPE_BASE, &s->io_gpe);
- memory_region_init_io(&s->io_pci, &piix4_pci_ops, s, "apci-pci-hotplug",
+ memory_region_init_io(&s->io_pci, NULL, &piix4_pci_ops, s, "apci-pci-hotplug",
PCI_HOTPLUG_SIZE);
memory_region_add_subregion(parent, PCI_HOTPLUG_ADDR,
&s->io_pci);
pci_bus_hotplug(bus, piix4_device_hotplug, &s->dev.qdev);
qemu_for_each_cpu(piix4_init_cpu_status, &s->gpe_cpu);
- memory_region_init_io(&s->io_cpu, &cpu_hotplug_ops, s, "apci-cpu-hotplug",
+ memory_region_init_io(&s->io_cpu, NULL, &cpu_hotplug_ops, s, "apci-cpu-hotplug",
PIIX4_PROC_LEN);
memory_region_add_subregion(parent, PIIX4_PROC_BASE, &s->io_cpu);
s->cpu_added_notifier.notify = piix4_cpu_added_req;
@@ -735,7 +735,7 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,
/* Main memory region, 0x00.0000.0000. Real hardware supports 32GB,
but the address space hole reserved at this point is 8TB. */
- memory_region_init_ram(&s->ram_region, "ram", ram_size);
+ memory_region_init_ram(&s->ram_region, NULL, "ram", ram_size);
vmstate_register_ram_global(&s->ram_region);
memory_region_add_subregion(addr_space, 0, &s->ram_region);
@@ -744,22 +744,22 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,
the flash ROM. I'm not sure that we need to implement it at all. */
/* Pchip0 CSRs, 0x801.8000.0000, 256MB. */
- memory_region_init_io(&s->pchip.region, &pchip_ops, s, "pchip0", 256*MB);
+ memory_region_init_io(&s->pchip.region, NULL, &pchip_ops, s, "pchip0", 256*MB);
memory_region_add_subregion(addr_space, 0x80180000000ULL,
&s->pchip.region);
/* Cchip CSRs, 0x801.A000.0000, 256MB. */
- memory_region_init_io(&s->cchip.region, &cchip_ops, s, "cchip0", 256*MB);
+ memory_region_init_io(&s->cchip.region, NULL, &cchip_ops, s, "cchip0", 256*MB);
memory_region_add_subregion(addr_space, 0x801a0000000ULL,
&s->cchip.region);
/* Dchip CSRs, 0x801.B000.0000, 256MB. */
- memory_region_init_io(&s->dchip_region, &dchip_ops, s, "dchip0", 256*MB);
+ memory_region_init_io(&s->dchip_region, NULL, &dchip_ops, s, "dchip0", 256*MB);
memory_region_add_subregion(addr_space, 0x801b0000000ULL,
&s->dchip_region);
/* Pchip0 PCI memory, 0x800.0000.0000, 4GB. */
- memory_region_init(&s->pchip.reg_mem, "pci0-mem", 4*GB);
+ memory_region_init(&s->pchip.reg_mem, NULL, "pci0-mem", 4*GB);
memory_region_add_subregion(addr_space, 0x80000000000ULL,
&s->pchip.reg_mem);
@@ -767,7 +767,7 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,
/* ??? Ideally we drop the "system" i/o space on the floor and give the
PCI subsystem the full address space reserved by the chipset.
We can't do that until the MEM and IO paths in memory.c are unified. */
- memory_region_init_io(&s->pchip.reg_io, &alpha_pci_bw_io_ops, NULL,
+ memory_region_init_io(&s->pchip.reg_io, NULL, &alpha_pci_bw_io_ops, NULL,
"pci0-io", 32*MB);
memory_region_add_subregion(addr_space, 0x801fc000000ULL,
&s->pchip.reg_io);
@@ -778,13 +778,13 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,
phb->bus = b;
/* Pchip0 PCI special/interrupt acknowledge, 0x801.F800.0000, 64MB. */
- memory_region_init_io(&s->pchip.reg_iack, &alpha_pci_iack_ops, b,
+ memory_region_init_io(&s->pchip.reg_iack, NULL, &alpha_pci_iack_ops, b,
"pci0-iack", 64*MB);
memory_region_add_subregion(addr_space, 0x801f8000000ULL,
&s->pchip.reg_iack);
/* Pchip0 PCI configuration, 0x801.FE00.0000, 16MB. */
- memory_region_init_io(&s->pchip.reg_conf, &alpha_pci_conf1_ops, b,
+ memory_region_init_io(&s->pchip.reg_conf, NULL, &alpha_pci_conf1_ops, b,
"pci0-conf", 16*MB);
memory_region_add_subregion(addr_space, 0x801fe000000ULL,
&s->pchip.reg_conf);
@@ -124,7 +124,7 @@ static int bitband_init(SysBusDevice *dev)
{
BitBandState *s = FROM_SYSBUS(BitBandState, dev);
- memory_region_init_io(&s->iomem, &bitband_ops, &s->base, "bitband",
+ memory_region_init_io(&s->iomem, NULL, &bitband_ops, &s->base, "bitband",
0x02000000);
sysbus_init_mmio(dev, &s->iomem);
return 0;
@@ -203,11 +203,11 @@ qemu_irq *armv7m_init(MemoryRegion *address_space_mem,
#endif
/* Flash programming is done via the SCU, so pretend it is ROM. */
- memory_region_init_ram(flash, "armv7m.flash", flash_size);
+ memory_region_init_ram(flash, NULL, "armv7m.flash", flash_size);
vmstate_register_ram_global(flash);
memory_region_set_readonly(flash, true);
memory_region_add_subregion(address_space_mem, 0, flash);
- memory_region_init_ram(sram, "armv7m.sram", sram_size);
+ memory_region_init_ram(sram, NULL, "armv7m.sram", sram_size);
vmstate_register_ram_global(sram);
memory_region_add_subregion(address_space_mem, 0x20000000, sram);
armv7m_bitband_init();
@@ -247,7 +247,7 @@ qemu_irq *armv7m_init(MemoryRegion *address_space_mem,
/* Hack to map an additional page of ram at the top of the address
space. This stops qemu complaining about executing code outside RAM
when returning from an exception. */
- memory_region_init_ram(hack, "armv7m.hack", 0x1000);
+ memory_region_init_ram(hack, NULL, "armv7m.hack", 0x1000);
vmstate_register_ram_global(hack);
memory_region_add_subregion(address_space_mem, 0xfffff000, hack);
@@ -241,20 +241,20 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
/*** Memory ***/
/* Chip-ID and OMR */
- memory_region_init_io(&s->chipid_mem, &exynos4210_chipid_and_omr_ops,
+ memory_region_init_io(&s->chipid_mem, NULL, &exynos4210_chipid_and_omr_ops,
NULL, "exynos4210.chipid", sizeof(chipid_and_omr));
memory_region_add_subregion(system_mem, EXYNOS4210_CHIPID_ADDR,
&s->chipid_mem);
/* Internal ROM */
- memory_region_init_ram(&s->irom_mem, "exynos4210.irom",
+ memory_region_init_ram(&s->irom_mem, NULL, "exynos4210.irom",
EXYNOS4210_IROM_SIZE);
vmstate_register_ram_global(&s->irom_mem);
memory_region_set_readonly(&s->irom_mem, true);
memory_region_add_subregion(system_mem, EXYNOS4210_IROM_BASE_ADDR,
&s->irom_mem);
/* mirror of iROM */
- memory_region_init_alias(&s->irom_alias_mem, "exynos4210.irom_alias",
+ memory_region_init_alias(&s->irom_alias_mem, NULL, "exynos4210.irom_alias",
&s->irom_mem,
0,
EXYNOS4210_IROM_SIZE);
@@ -263,7 +263,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
&s->irom_alias_mem);
/* Internal RAM */
- memory_region_init_ram(&s->iram_mem, "exynos4210.iram",
+ memory_region_init_ram(&s->iram_mem, NULL, "exynos4210.iram",
EXYNOS4210_IRAM_SIZE);
vmstate_register_ram_global(&s->iram_mem);
memory_region_add_subregion(system_mem, EXYNOS4210_IRAM_BASE_ADDR,
@@ -272,14 +272,14 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
/* DRAM */
mem_size = ram_size;
if (mem_size > EXYNOS4210_DRAM_MAX_SIZE) {
- memory_region_init_ram(&s->dram1_mem, "exynos4210.dram1",
+ memory_region_init_ram(&s->dram1_mem, NULL, "exynos4210.dram1",
mem_size - EXYNOS4210_DRAM_MAX_SIZE);
vmstate_register_ram_global(&s->dram1_mem);
memory_region_add_subregion(system_mem, EXYNOS4210_DRAM1_BASE_ADDR,
&s->dram1_mem);
mem_size = EXYNOS4210_DRAM_MAX_SIZE;
}
- memory_region_init_ram(&s->dram0_mem, "exynos4210.dram0", mem_size);
+ memory_region_init_ram(&s->dram0_mem, NULL, "exynos4210.dram0", mem_size);
vmstate_register_ram_global(&s->dram0_mem);
memory_region_add_subregion(system_mem, EXYNOS4210_DRAM0_BASE_ADDR,
&s->dram0_mem);
@@ -149,7 +149,7 @@ static int highbank_regs_init(SysBusDevice *dev)
HighbankRegsState *s = FROM_SYSBUS(HighbankRegsState, dev);
s->iomem = g_new(MemoryRegion, 1);
- memory_region_init_io(s->iomem, &hb_mem_ops, s->regs, "highbank_regs",
+ memory_region_init_io(s->iomem, NULL, &hb_mem_ops, s->regs, "highbank_regs",
0x1000);
sysbus_init_mmio(dev, s->iomem);
@@ -227,12 +227,12 @@ static void highbank_init(QEMUMachineInitArgs *args)
sysmem = get_system_memory();
dram = g_new(MemoryRegion, 1);
- memory_region_init_ram(dram, "highbank.dram", ram_size);
+ memory_region_init_ram(dram, NULL, "highbank.dram", ram_size);
/* SDRAM at address zero. */
memory_region_add_subregion(sysmem, 0, dram);
sysram = g_new(MemoryRegion, 1);
- memory_region_init_ram(sysram, "highbank.sysram", 0x8000);
+ memory_region_init_ram(sysram, NULL, "highbank.sysram", 0x8000);
memory_region_add_subregion(sysmem, 0xfff88000, sysram);
if (bios_name != NULL) {
sysboot_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
@@ -249,10 +249,10 @@ static int integratorcm_init(SysBusDevice *dev)
}
memcpy(integrator_spd + 73, "QEMU-MEMORY", 11);
s->cm_init = 0x00000112;
- memory_region_init_ram(&s->flash, "integrator.flash", 0x100000);
+ memory_region_init_ram(&s->flash, NULL, "integrator.flash", 0x100000);
vmstate_register_ram_global(&s->flash);
- memory_region_init_io(&s->iomem, &integratorcm_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &integratorcm_ops, s,
"integratorcm", 0x00800000);
sysbus_init_mmio(dev, &s->iomem);
@@ -374,7 +374,7 @@ static int icp_pic_init(SysBusDevice *dev)
qdev_init_gpio_in(&dev->qdev, icp_pic_set_irq, 32);
sysbus_init_irq(dev, &s->parent_irq);
sysbus_init_irq(dev, &s->parent_fiq);
- memory_region_init_io(&s->iomem, &icp_pic_ops, s, "icp-pic", 0x00800000);
+ memory_region_init_io(&s->iomem, NULL, &icp_pic_ops, s, "icp-pic", 0x00800000);
sysbus_init_mmio(dev, &s->iomem);
return 0;
}
@@ -424,7 +424,7 @@ static void icp_control_init(hwaddr base)
MemoryRegion *io;
io = (MemoryRegion *)g_malloc0(sizeof(MemoryRegion));
- memory_region_init_io(io, &icp_control_ops, NULL,
+ memory_region_init_io(io, NULL, &icp_control_ops, NULL,
"control", 0x00800000);
memory_region_add_subregion(get_system_memory(), base, io);
/* ??? Save/restore. */
@@ -463,14 +463,14 @@ static void integratorcp_init(QEMUMachineInitArgs *args)
exit(1);
}
- memory_region_init_ram(ram, "integrator.ram", ram_size);
+ memory_region_init_ram(ram, NULL, "integrator.ram", ram_size);
vmstate_register_ram_global(ram);
/* ??? On a real system the first 1Mb is mapped as SSRAM or boot flash. */
/* ??? RAM should repeat to fill physical memory space. */
/* SDRAM at address zero*/
memory_region_add_subregion(address_space_mem, 0, ram);
/* And again at address 0x80000000 */
- memory_region_init_alias(ram_alias, "ram.alias", ram, 0, ram_size);
+ memory_region_init_alias(ram_alias, NULL, "ram.alias", ram, 0, ram_size);
memory_region_add_subregion(address_space_mem, 0x80000000, ram_alias);
dev = qdev_create(NULL, "integrator_core");
@@ -98,14 +98,14 @@ static void kzm_init(QEMUMachineInitArgs *args)
/* On a real system, the first 16k is a `secure boot rom' */
- memory_region_init_ram(ram, "kzm.ram", ram_size);
+ memory_region_init_ram(ram, NULL, "kzm.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, KZM_RAMADDRESS, ram);
- memory_region_init_alias(ram_alias, "ram.alias", ram, 0, ram_size);
+ memory_region_init_alias(ram_alias, NULL, "ram.alias", ram, 0, ram_size);
memory_region_add_subregion(address_space_mem, 0x88000000, ram_alias);
- memory_region_init_ram(sram, "kzm.sram", 0x4000);
+ memory_region_init_ram(sram, NULL, "kzm.sram", 0x4000);
memory_region_add_subregion(address_space_mem, 0x1FFFC000, sram);
cpu_pic = arm_pic_init_cpu(cpu);
@@ -113,7 +113,7 @@ static void mainstone_common_init(MemoryRegion *address_space_mem,
/* Setup CPU & memory */
mpu = pxa270_init(address_space_mem, mainstone_binfo.ram_size, cpu_model);
- memory_region_init_ram(rom, "mainstone.rom", MAINSTONE_ROM);
+ memory_region_init_ram(rom, NULL, "mainstone.rom", MAINSTONE_ROM);
vmstate_register_ram_global(rom);
memory_region_set_readonly(rom, true);
memory_region_add_subregion(address_space_mem, 0, rom);
@@ -389,7 +389,7 @@ static int mv88w8618_eth_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
s->nic = qemu_new_nic(&net_mv88w8618_info, &s->conf,
object_get_typename(OBJECT(dev)), dev->qdev.id, s);
- memory_region_init_io(&s->iomem, &mv88w8618_eth_ops, s, "mv88w8618-eth",
+ memory_region_init_io(&s->iomem, NULL, &mv88w8618_eth_ops, s, "mv88w8618-eth",
MP_ETH_SIZE);
sysbus_init_mmio(dev, &s->iomem);
return 0;
@@ -612,7 +612,7 @@ static int musicpal_lcd_init(SysBusDevice *dev)
s->brightness = 7;
- memory_region_init_io(&s->iomem, &musicpal_lcd_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &musicpal_lcd_ops, s,
"musicpal-lcd", MP_LCD_SIZE);
sysbus_init_mmio(dev, &s->iomem);
@@ -740,7 +740,7 @@ static int mv88w8618_pic_init(SysBusDevice *dev)
qdev_init_gpio_in(&dev->qdev, mv88w8618_pic_set_irq, 32);
sysbus_init_irq(dev, &s->parent_irq);
- memory_region_init_io(&s->iomem, &mv88w8618_pic_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &mv88w8618_pic_ops, s,
"musicpal-pic", MP_PIC_SIZE);
sysbus_init_mmio(dev, &s->iomem);
return 0;
@@ -905,7 +905,7 @@ static int mv88w8618_pit_init(SysBusDevice *dev)
mv88w8618_timer_init(dev, &s->timer[i], 1000000);
}
- memory_region_init_io(&s->iomem, &mv88w8618_pit_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &mv88w8618_pit_ops, s,
"musicpal-pit", MP_PIT_SIZE);
sysbus_init_mmio(dev, &s->iomem);
return 0;
@@ -999,7 +999,7 @@ static int mv88w8618_flashcfg_init(SysBusDevice *dev)
mv88w8618_flashcfg_state *s = FROM_SYSBUS(mv88w8618_flashcfg_state, dev);
s->cfgr0 = 0xfffe4285; /* Default as set by U-Boot for 8 MB flash */
- memory_region_init_io(&s->iomem, &mv88w8618_flashcfg_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &mv88w8618_flashcfg_ops, s,
"musicpal-flashcfg", MP_FLASHCFG_SIZE);
sysbus_init_mmio(dev, &s->iomem);
return 0;
@@ -1074,7 +1074,7 @@ static void musicpal_misc_init(Object *obj)
SysBusDevice *sd = SYS_BUS_DEVICE(obj);
MusicPalMiscState *s = MUSICPAL_MISC(obj);
- memory_region_init_io(&s->iomem, &musicpal_misc_ops, NULL,
+ memory_region_init_io(&s->iomem, NULL, &musicpal_misc_ops, NULL,
"musicpal-misc", MP_MISC_SIZE);
sysbus_init_mmio(sd, &s->iomem);
}
@@ -1121,7 +1121,7 @@ static int mv88w8618_wlan_init(SysBusDevice *dev)
{
MemoryRegion *iomem = g_new(MemoryRegion, 1);
- memory_region_init_io(iomem, &mv88w8618_wlan_ops, NULL,
+ memory_region_init_io(iomem, NULL, &mv88w8618_wlan_ops, NULL,
"musicpal-wlan", MP_WLAN_SIZE);
sysbus_init_mmio(dev, iomem);
return 0;
@@ -1327,7 +1327,7 @@ static int musicpal_gpio_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
- memory_region_init_io(&s->iomem, &musicpal_gpio_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &musicpal_gpio_ops, s,
"musicpal-gpio", MP_GPIO_SIZE);
sysbus_init_mmio(dev, &s->iomem);
@@ -1484,7 +1484,7 @@ static int musicpal_key_init(SysBusDevice *dev)
{
musicpal_key_state *s = FROM_SYSBUS(musicpal_key_state, dev);
- memory_region_init(&s->iomem, "dummy", 0);
+ memory_region_init(&s->iomem, NULL, "dummy", 0);
sysbus_init_mmio(dev, &s->iomem);
s->kbd_extended = 0;
@@ -1564,11 +1564,11 @@ static void musicpal_init(QEMUMachineInitArgs *args)
cpu_pic = arm_pic_init_cpu(cpu);
/* For now we use a fixed - the original - RAM size */
- memory_region_init_ram(ram, "musicpal.ram", MP_RAM_DEFAULT_SIZE);
+ memory_region_init_ram(ram, NULL, "musicpal.ram", MP_RAM_DEFAULT_SIZE);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, 0, ram);
- memory_region_init_ram(sram, "musicpal.sram", MP_SRAM_SIZE);
+ memory_region_init_ram(sram, NULL, "musicpal.sram", MP_SRAM_SIZE);
vmstate_register_ram_global(sram);
memory_region_add_subregion(address_space_mem, MP_SRAM_BASE, sram);
@@ -264,7 +264,7 @@ static struct omap_mpu_timer_s *omap_mpu_timer_init(MemoryRegion *system_memory,
omap_mpu_timer_reset(s);
omap_timer_clk_setup(s);
- memory_region_init_io(&s->iomem, &omap_mpu_timer_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &omap_mpu_timer_ops, s,
"omap-mpu-timer", 0x100);
memory_region_add_subregion(system_memory, base, &s->iomem);
@@ -392,7 +392,7 @@ static struct omap_watchdog_timer_s *omap_wd_timer_init(MemoryRegion *memory,
omap_wd_timer_reset(s);
omap_timer_clk_setup(&s->timer);
- memory_region_init_io(&s->iomem, &omap_wd_timer_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &omap_wd_timer_ops, s,
"omap-wd-timer", 0x100);
memory_region_add_subregion(memory, base, &s->iomem);
@@ -498,7 +498,7 @@ static struct omap_32khz_timer_s *omap_os_timer_init(MemoryRegion *memory,
omap_os_timer_reset(s);
omap_timer_clk_setup(&s->timer);
- memory_region_init_io(&s->iomem, &omap_os_timer_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &omap_os_timer_ops, s,
"omap-os-timer", 0x800);
memory_region_add_subregion(memory, base, &s->iomem);
@@ -731,7 +731,7 @@ static void omap_ulpd_pm_init(MemoryRegion *system_memory,
hwaddr base,
struct omap_mpu_state_s *mpu)
{
- memory_region_init_io(&mpu->ulpd_pm_iomem, &omap_ulpd_pm_ops, mpu,
+ memory_region_init_io(&mpu->ulpd_pm_iomem, NULL, &omap_ulpd_pm_ops, mpu,
"omap-ulpd-pm", 0x800);
memory_region_add_subregion(system_memory, base, &mpu->ulpd_pm_iomem);
omap_ulpd_pm_reset(mpu);
@@ -949,7 +949,7 @@ static void omap_pin_cfg_init(MemoryRegion *system_memory,
hwaddr base,
struct omap_mpu_state_s *mpu)
{
- memory_region_init_io(&mpu->pin_cfg_iomem, &omap_pin_cfg_ops, mpu,
+ memory_region_init_io(&mpu->pin_cfg_iomem, NULL, &omap_pin_cfg_ops, mpu,
"omap-pin-cfg", 0x800);
memory_region_add_subregion(system_memory, base, &mpu->pin_cfg_iomem);
omap_pin_cfg_reset(mpu);
@@ -1021,16 +1021,16 @@ static const MemoryRegionOps omap_id_ops = {
static void omap_id_init(MemoryRegion *memory, struct omap_mpu_state_s *mpu)
{
- memory_region_init_io(&mpu->id_iomem, &omap_id_ops, mpu,
+ memory_region_init_io(&mpu->id_iomem, NULL, &omap_id_ops, mpu,
"omap-id", 0x100000000ULL);
- memory_region_init_alias(&mpu->id_iomem_e18, "omap-id-e18", &mpu->id_iomem,
+ memory_region_init_alias(&mpu->id_iomem_e18, NULL, "omap-id-e18", &mpu->id_iomem,
0xfffe1800, 0x800);
memory_region_add_subregion(memory, 0xfffe1800, &mpu->id_iomem_e18);
- memory_region_init_alias(&mpu->id_iomem_ed4, "omap-id-ed4", &mpu->id_iomem,
+ memory_region_init_alias(&mpu->id_iomem_ed4, NULL, "omap-id-ed4", &mpu->id_iomem,
0xfffed400, 0x100);
memory_region_add_subregion(memory, 0xfffed400, &mpu->id_iomem_ed4);
if (!cpu_is_omap15xx(mpu)) {
- memory_region_init_alias(&mpu->id_iomem_ed4, "omap-id-e20",
+ memory_region_init_alias(&mpu->id_iomem_ed4, NULL, "omap-id-e20",
&mpu->id_iomem, 0xfffe2000, 0x800);
memory_region_add_subregion(memory, 0xfffe2000, &mpu->id_iomem_e20);
}
@@ -1115,7 +1115,7 @@ static void omap_mpui_reset(struct omap_mpu_state_s *s)
static void omap_mpui_init(MemoryRegion *memory, hwaddr base,
struct omap_mpu_state_s *mpu)
{
- memory_region_init_io(&mpu->mpui_iomem, &omap_mpui_ops, mpu,
+ memory_region_init_io(&mpu->mpui_iomem, NULL, &omap_mpui_ops, mpu,
"omap-mpui", 0x100);
memory_region_add_subregion(memory, base, &mpu->mpui_iomem);
@@ -1227,7 +1227,7 @@ static struct omap_tipb_bridge_s *omap_tipb_bridge_init(
s->abort = abort_irq;
omap_tipb_bridge_reset(s);
- memory_region_init_io(&s->iomem, &omap_tipb_bridge_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &omap_tipb_bridge_ops, s,
"omap-tipb-bridge", 0x100);
memory_region_add_subregion(memory, base, &s->iomem);
@@ -1336,7 +1336,7 @@ static void omap_tcmi_reset(struct omap_mpu_state_s *mpu)
static void omap_tcmi_init(MemoryRegion *memory, hwaddr base,
struct omap_mpu_state_s *mpu)
{
- memory_region_init_io(&mpu->tcmi_iomem, &omap_tcmi_ops, mpu,
+ memory_region_init_io(&mpu->tcmi_iomem, NULL, &omap_tcmi_ops, mpu,
"omap-tcmi", 0x100);
memory_region_add_subregion(memory, base, &mpu->tcmi_iomem);
omap_tcmi_reset(mpu);
@@ -1418,7 +1418,7 @@ static struct dpll_ctl_s *omap_dpll_init(MemoryRegion *memory,
hwaddr base, omap_clk clk)
{
struct dpll_ctl_s *s = g_malloc0(sizeof(*s));
- memory_region_init_io(&s->iomem, &omap_dpll_ops, s, "omap-dpll", 0x100);
+ memory_region_init_io(&s->iomem, NULL, &omap_dpll_ops, s, "omap-dpll", 0x100);
s->dpll = clk;
omap_dpll_reset(s);
@@ -1831,9 +1831,9 @@ static void omap_clkm_reset(struct omap_mpu_state_s *s)
static void omap_clkm_init(MemoryRegion *memory, hwaddr mpu_base,
hwaddr dsp_base, struct omap_mpu_state_s *s)
{
- memory_region_init_io(&s->clkm_iomem, &omap_clkm_ops, s,
+ memory_region_init_io(&s->clkm_iomem, NULL, &omap_clkm_ops, s,
"omap-clkm", 0x100);
- memory_region_init_io(&s->clkdsp_iomem, &omap_clkdsp_ops, s,
+ memory_region_init_io(&s->clkdsp_iomem, NULL, &omap_clkdsp_ops, s,
"omap-clkdsp", 0x1000);
s->clkm.arm_idlect1 = 0x03ff;
@@ -2090,7 +2090,7 @@ static struct omap_mpuio_s *omap_mpuio_init(MemoryRegion *memory,
s->in = qemu_allocate_irqs(omap_mpuio_set, s, 16);
omap_mpuio_reset(s);
- memory_region_init_io(&s->iomem, &omap_mpuio_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &omap_mpuio_ops, s,
"omap-mpuio", 0x800);
memory_region_add_subregion(memory, base, &s->iomem);
@@ -2281,7 +2281,7 @@ static struct omap_uwire_s *omap_uwire_init(MemoryRegion *system_memory,
s->txdrq = dma;
omap_uwire_reset(s);
- memory_region_init_io(&s->iomem, &omap_uwire_ops, s, "omap-uwire", 0x800);
+ memory_region_init_io(&s->iomem, NULL, &omap_uwire_ops, s, "omap-uwire", 0x800);
memory_region_add_subregion(system_memory, base, &s->iomem);
return s;
@@ -2393,7 +2393,7 @@ static struct omap_pwl_s *omap_pwl_init(MemoryRegion *system_memory,
omap_pwl_reset(s);
- memory_region_init_io(&s->iomem, &omap_pwl_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &omap_pwl_ops, s,
"omap-pwl", 0x800);
memory_region_add_subregion(system_memory, base, &s->iomem);
@@ -2500,7 +2500,7 @@ static struct omap_pwt_s *omap_pwt_init(MemoryRegion *system_memory,
s->clk = clk;
omap_pwt_reset(s);
- memory_region_init_io(&s->iomem, &omap_pwt_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &omap_pwt_ops, s,
"omap-pwt", 0x800);
memory_region_add_subregion(system_memory, base, &s->iomem);
return s;
@@ -2919,7 +2919,7 @@ static struct omap_rtc_s *omap_rtc_init(MemoryRegion *system_memory,
omap_rtc_reset(s);
- memory_region_init_io(&s->iomem, &omap_rtc_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &omap_rtc_ops, s,
"omap-rtc", 0x800);
memory_region_add_subregion(system_memory, base, &s->iomem);
@@ -3452,7 +3452,7 @@ static struct omap_mcbsp_s *omap_mcbsp_init(MemoryRegion *system_memory,
s->source_timer = qemu_new_timer_ns(vm_clock, omap_mcbsp_source_tick, s);
omap_mcbsp_reset(s);
- memory_region_init_io(&s->iomem, &omap_mcbsp_ops, s, "omap-mcbsp", 0x800);
+ memory_region_init_io(&s->iomem, NULL, &omap_mcbsp_ops, s, "omap-mcbsp", 0x800);
memory_region_add_subregion(system_memory, base, &s->iomem);
return s;
@@ -3627,7 +3627,7 @@ static struct omap_lpg_s *omap_lpg_init(MemoryRegion *system_memory,
omap_lpg_reset(s);
- memory_region_init_io(&s->iomem, &omap_lpg_ops, s, "omap-lpg", 0x800);
+ memory_region_init_io(&s->iomem, NULL, &omap_lpg_ops, s, "omap-lpg", 0x800);
memory_region_add_subregion(system_memory, base, &s->iomem);
omap_clk_adduser(clk, qemu_allocate_irqs(omap_lpg_clk_update, s, 1)[0]);
@@ -3666,7 +3666,7 @@ static const MemoryRegionOps omap_mpui_io_ops = {
static void omap_setup_mpui_io(MemoryRegion *system_memory,
struct omap_mpu_state_s *mpu)
{
- memory_region_init_io(&mpu->mpui_io_iomem, &omap_mpui_io_ops, mpu,
+ memory_region_init_io(&mpu->mpui_io_iomem, NULL, &omap_mpui_io_ops, mpu,
"omap-mpui-io", 0x7fff);
memory_region_add_subregion(system_memory, OMAP_MPUI_BASE,
&mpu->mpui_io_iomem);
@@ -3747,7 +3747,7 @@ static void omap_setup_dsp_mapping(MemoryRegion *system_memory,
for (; map->phys_dsp; map ++) {
io = g_new(MemoryRegion, 1);
- memory_region_init_alias(io, map->name,
+ memory_region_init_alias(io, NULL, map->name,
system_memory, map->phys_mpu, map->size);
memory_region_add_subregion(system_memory, map->phys_dsp, io);
}
@@ -3851,10 +3851,10 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory,
omap_clk_init(s);
/* Memory-mapped stuff */
- memory_region_init_ram(&s->emiff_ram, "omap1.dram", s->sdram_size);
+ memory_region_init_ram(&s->emiff_ram, NULL, "omap1.dram", s->sdram_size);
vmstate_register_ram_global(&s->emiff_ram);
memory_region_add_subregion(system_memory, OMAP_EMIFF_BASE, &s->emiff_ram);
- memory_region_init_ram(&s->imif_ram, "omap1.sram", s->sram_size);
+ memory_region_init_ram(&s->imif_ram, NULL, "omap1.sram", s->sram_size);
vmstate_register_ram_global(&s->imif_ram);
memory_region_add_subregion(system_memory, OMAP_IMIF_BASE, &s->imif_ram);
@@ -603,7 +603,7 @@ static struct omap_eac_s *omap_eac_init(struct omap_target_agent_s *ta,
AUD_register_card("OMAP EAC", &s->codec.card);
- memory_region_init_io(&s->iomem, &omap_eac_ops, s, "omap.eac",
+ memory_region_init_io(&s->iomem, NULL, &omap_eac_ops, s, "omap.eac",
omap_l4_region_size(ta, 0));
omap_l4_attach(ta, 0, &s->iomem);
@@ -791,11 +791,11 @@ static struct omap_sti_s *omap_sti_init(struct omap_target_agent_s *ta,
s->chr = chr ?: qemu_chr_new("null", "null", NULL);
- memory_region_init_io(&s->iomem, &omap_sti_ops, s, "omap.sti",
+ memory_region_init_io(&s->iomem, NULL, &omap_sti_ops, s, "omap.sti",
omap_l4_region_size(ta, 0));
omap_l4_attach(ta, 0, &s->iomem);
- memory_region_init_io(&s->iomem_fifo, &omap_sti_fifo_ops, s,
+ memory_region_init_io(&s->iomem_fifo, NULL, &omap_sti_fifo_ops, s,
"omap.sti.fifo", 0x10000);
memory_region_add_subregion(sysmem, channel_base, &s->iomem_fifo);
@@ -1809,9 +1809,9 @@ static struct omap_prcm_s *omap_prcm_init(struct omap_target_agent_s *ta,
s->mpu = mpu;
omap_prcm_coldreset(s);
- memory_region_init_io(&s->iomem0, &omap_prcm_ops, s, "omap.pcrm0",
+ memory_region_init_io(&s->iomem0, NULL, &omap_prcm_ops, s, "omap.pcrm0",
omap_l4_region_size(ta, 0));
- memory_region_init_io(&s->iomem1, &omap_prcm_ops, s, "omap.pcrm1",
+ memory_region_init_io(&s->iomem1, NULL, &omap_prcm_ops, s, "omap.pcrm1",
omap_l4_region_size(ta, 1));
omap_l4_attach(ta, 0, &s->iomem0);
omap_l4_attach(ta, 1, &s->iomem1);
@@ -2185,7 +2185,7 @@ static struct omap_sysctl_s *omap_sysctl_init(struct omap_target_agent_s *ta,
s->mpu = mpu;
omap_sysctl_reset(s);
- memory_region_init_io(&s->iomem, &omap_sysctl_ops, s, "omap.sysctl",
+ memory_region_init_io(&s->iomem, NULL, &omap_sysctl_ops, s, "omap.sysctl",
omap_l4_region_size(ta, 0));
omap_l4_attach(ta, 0, &s->iomem);
@@ -2267,10 +2267,10 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sysmem,
omap_clk_init(s);
/* Memory-mapped stuff */
- memory_region_init_ram(&s->sdram, "omap2.dram", s->sdram_size);
+ memory_region_init_ram(&s->sdram, NULL, "omap2.dram", s->sdram_size);
vmstate_register_ram_global(&s->sdram);
memory_region_add_subregion(sysmem, OMAP2_Q2_BASE, &s->sdram);
- memory_region_init_ram(&s->sram, "omap2.sram", s->sram_size);
+ memory_region_init_ram(&s->sram, NULL, "omap2.sram", s->sram_size);
vmstate_register_ram_global(&s->sram);
memory_region_add_subregion(sysmem, OMAP2_SRAM_BASE, &s->sram);
@@ -120,23 +120,23 @@ static void sx1_init(QEMUMachineInitArgs *args, const int version)
mpu = omap310_mpu_init(address_space, sx1_binfo.ram_size, args->cpu_model);
/* External Flash (EMIFS) */
- memory_region_init_ram(flash, "omap_sx1.flash0-0", flash_size);
+ memory_region_init_ram(flash, NULL, "omap_sx1.flash0-0", flash_size);
vmstate_register_ram_global(flash);
memory_region_set_readonly(flash, true);
memory_region_add_subregion(address_space, OMAP_CS0_BASE, flash);
- memory_region_init_io(&cs[0], &static_ops, &cs0val,
+ memory_region_init_io(&cs[0], NULL, &static_ops, &cs0val,
"sx1.cs0", OMAP_CS0_SIZE - flash_size);
memory_region_add_subregion(address_space,
OMAP_CS0_BASE + flash_size, &cs[0]);
- memory_region_init_io(&cs[2], &static_ops, &cs2val,
+ memory_region_init_io(&cs[2], NULL, &static_ops, &cs2val,
"sx1.cs2", OMAP_CS2_SIZE);
memory_region_add_subregion(address_space,
OMAP_CS2_BASE, &cs[2]);
- memory_region_init_io(&cs[3], &static_ops, &cs3val,
+ memory_region_init_io(&cs[3], NULL, &static_ops, &cs3val,
"sx1.cs3", OMAP_CS3_SIZE);
memory_region_add_subregion(address_space,
OMAP_CS2_BASE, &cs[3]);
@@ -162,12 +162,12 @@ static void sx1_init(QEMUMachineInitArgs *args, const int version)
if ((version == 1) &&
(dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
- memory_region_init_ram(flash_1, "omap_sx1.flash1-0", flash1_size);
+ memory_region_init_ram(flash_1, NULL, "omap_sx1.flash1-0", flash1_size);
vmstate_register_ram_global(flash_1);
memory_region_set_readonly(flash_1, true);
memory_region_add_subregion(address_space, OMAP_CS1_BASE, flash_1);
- memory_region_init_io(&cs[1], &static_ops, &cs1val,
+ memory_region_init_io(&cs[1], NULL, &static_ops, &cs1val,
"sx1.cs1", OMAP_CS1_SIZE - flash1_size);
memory_region_add_subregion(address_space,
OMAP_CS1_BASE + flash1_size, &cs[1]);
@@ -182,7 +182,7 @@ static void sx1_init(QEMUMachineInitArgs *args, const int version)
}
fl_idx++;
} else {
- memory_region_init_io(&cs[1], &static_ops, &cs1val,
+ memory_region_init_io(&cs[1], NULL, &static_ops, &cs1val,
"sx1.cs1", OMAP_CS1_SIZE);
memory_region_add_subregion(address_space,
OMAP_CS1_BASE, &cs[1]);
@@ -211,22 +211,22 @@ static void palmte_init(QEMUMachineInitArgs *args)
mpu = omap310_mpu_init(address_space_mem, sdram_size, cpu_model);
/* External Flash (EMIFS) */
- memory_region_init_ram(flash, "palmte.flash", flash_size);
+ memory_region_init_ram(flash, NULL, "palmte.flash", flash_size);
vmstate_register_ram_global(flash);
memory_region_set_readonly(flash, true);
memory_region_add_subregion(address_space_mem, OMAP_CS0_BASE, flash);
- memory_region_init_io(&cs[0], &static_ops, &cs0val, "palmte-cs0",
+ memory_region_init_io(&cs[0], NULL, &static_ops, &cs0val, "palmte-cs0",
OMAP_CS0_SIZE - flash_size);
memory_region_add_subregion(address_space_mem, OMAP_CS0_BASE + flash_size,
&cs[0]);
- memory_region_init_io(&cs[1], &static_ops, &cs1val, "palmte-cs1",
+ memory_region_init_io(&cs[1], NULL, &static_ops, &cs1val, "palmte-cs1",
OMAP_CS1_SIZE);
memory_region_add_subregion(address_space_mem, OMAP_CS1_BASE, &cs[1]);
- memory_region_init_io(&cs[2], &static_ops, &cs2val, "palmte-cs2",
+ memory_region_init_io(&cs[2], NULL, &static_ops, &cs2val, "palmte-cs2",
OMAP_CS2_SIZE);
memory_region_add_subregion(address_space_mem, OMAP_CS2_BASE, &cs[2]);
- memory_region_init_io(&cs[3], &static_ops, &cs3val, "palmte-cs3",
+ memory_region_init_io(&cs[3], NULL, &static_ops, &cs3val, "palmte-cs3",
OMAP_CS3_SIZE);
memory_region_add_subregion(address_space_mem, OMAP_CS3_BASE, &cs[3]);
@@ -764,7 +764,7 @@ static int pxa2xx_ssp_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
- memory_region_init_io(&s->iomem, &pxa2xx_ssp_ops, s, "pxa2xx-ssp", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &pxa2xx_ssp_ops, s, "pxa2xx-ssp", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
register_savevm(&dev->qdev, "pxa2xx_ssp", -1, 0,
pxa2xx_ssp_save, pxa2xx_ssp_load, s);
@@ -1131,7 +1131,7 @@ static int pxa2xx_rtc_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->rtc_irq);
- memory_region_init_io(&s->iomem, &pxa2xx_rtc_ops, s, "pxa2xx-rtc", 0x10000);
+ memory_region_init_io(&s->iomem, NULL, &pxa2xx_rtc_ops, s, "pxa2xx-rtc", 0x10000);
sysbus_init_mmio(dev, &s->iomem);
return 0;
@@ -1481,7 +1481,7 @@ static int pxa2xx_i2c_initfn(SysBusDevice *dev)
s->bus = i2c_init_bus(&dev->qdev, "i2c");
- memory_region_init_io(&s->iomem, &pxa2xx_i2c_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &pxa2xx_i2c_ops, s,
"pxa2xx-i2x", s->region_size);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
@@ -1720,7 +1720,7 @@ static PXA2xxI2SState *pxa2xx_i2s_init(MemoryRegion *sysmem,
pxa2xx_i2s_reset(s);
- memory_region_init_io(&s->iomem, &pxa2xx_i2s_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &pxa2xx_i2s_ops, s,
"pxa2xx-i2s", 0x100000);
memory_region_add_subregion(sysmem, base, &s->iomem);
@@ -1978,7 +1978,7 @@ static PXA2xxFIrState *pxa2xx_fir_init(MemoryRegion *sysmem,
pxa2xx_fir_reset(s);
- memory_region_init_io(&s->iomem, &pxa2xx_fir_ops, s, "pxa2xx-fir", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &pxa2xx_fir_ops, s, "pxa2xx-fir", 0x1000);
memory_region_add_subregion(sysmem, base, &s->iomem);
if (chr) {
@@ -2027,10 +2027,10 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space,
s->reset = qemu_allocate_irqs(pxa2xx_reset, s, 1)[0];
/* SDRAM & Internal Memory Storage */
- memory_region_init_ram(&s->sdram, "pxa270.sdram", sdram_size);
+ memory_region_init_ram(&s->sdram, NULL, "pxa270.sdram", sdram_size);
vmstate_register_ram_global(&s->sdram);
memory_region_add_subregion(address_space, PXA2XX_SDRAM_BASE, &s->sdram);
- memory_region_init_ram(&s->internal, "pxa270.internal", 0x40000);
+ memory_region_init_ram(&s->internal, NULL, "pxa270.internal", 0x40000);
vmstate_register_ram_global(&s->internal);
memory_region_add_subregion(address_space, PXA2XX_INTERNAL_BASE,
&s->internal);
@@ -2083,7 +2083,7 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space,
s->cm_base = 0x41300000;
s->cm_regs[CCCR >> 2] = 0x02000210; /* 416.0 MHz */
s->clkcfg = 0x00000009; /* Turbo mode active */
- memory_region_init_io(&s->cm_iomem, &pxa2xx_cm_ops, s, "pxa2xx-cm", 0x1000);
+ memory_region_init_io(&s->cm_iomem, NULL, &pxa2xx_cm_ops, s, "pxa2xx-cm", 0x1000);
memory_region_add_subregion(address_space, s->cm_base, &s->cm_iomem);
vmstate_register(NULL, 0, &vmstate_pxa2xx_cm, s);
@@ -2093,12 +2093,12 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space,
s->mm_regs[MDMRS >> 2] = 0x00020002;
s->mm_regs[MDREFR >> 2] = 0x03ca4000;
s->mm_regs[MECR >> 2] = 0x00000001; /* Two PC Card sockets */
- memory_region_init_io(&s->mm_iomem, &pxa2xx_mm_ops, s, "pxa2xx-mm", 0x1000);
+ memory_region_init_io(&s->mm_iomem, NULL, &pxa2xx_mm_ops, s, "pxa2xx-mm", 0x1000);
memory_region_add_subregion(address_space, s->mm_base, &s->mm_iomem);
vmstate_register(NULL, 0, &vmstate_pxa2xx_mm, s);
s->pm_base = 0x40f00000;
- memory_region_init_io(&s->pm_iomem, &pxa2xx_pm_ops, s, "pxa2xx-pm", 0x100);
+ memory_region_init_io(&s->pm_iomem, NULL, &pxa2xx_pm_ops, s, "pxa2xx-pm", 0x100);
memory_region_add_subregion(address_space, s->pm_base, &s->pm_iomem);
vmstate_register(NULL, 0, &vmstate_pxa2xx_pm, s);
@@ -2158,10 +2158,10 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size)
s->reset = qemu_allocate_irqs(pxa2xx_reset, s, 1)[0];
/* SDRAM & Internal Memory Storage */
- memory_region_init_ram(&s->sdram, "pxa255.sdram", sdram_size);
+ memory_region_init_ram(&s->sdram, NULL, "pxa255.sdram", sdram_size);
vmstate_register_ram_global(&s->sdram);
memory_region_add_subregion(address_space, PXA2XX_SDRAM_BASE, &s->sdram);
- memory_region_init_ram(&s->internal, "pxa255.internal",
+ memory_region_init_ram(&s->internal, NULL, "pxa255.internal",
PXA2XX_INTERNAL_SIZE);
vmstate_register_ram_global(&s->internal);
memory_region_add_subregion(address_space, PXA2XX_INTERNAL_BASE,
@@ -2214,7 +2214,7 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size)
s->cm_base = 0x41300000;
s->cm_regs[CCCR >> 2] = 0x02000210; /* 416.0 MHz */
s->clkcfg = 0x00000009; /* Turbo mode active */
- memory_region_init_io(&s->cm_iomem, &pxa2xx_cm_ops, s, "pxa2xx-cm", 0x1000);
+ memory_region_init_io(&s->cm_iomem, NULL, &pxa2xx_cm_ops, s, "pxa2xx-cm", 0x1000);
memory_region_add_subregion(address_space, s->cm_base, &s->cm_iomem);
vmstate_register(NULL, 0, &vmstate_pxa2xx_cm, s);
@@ -2224,12 +2224,12 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size)
s->mm_regs[MDMRS >> 2] = 0x00020002;
s->mm_regs[MDREFR >> 2] = 0x03ca4000;
s->mm_regs[MECR >> 2] = 0x00000001; /* Two PC Card sockets */
- memory_region_init_io(&s->mm_iomem, &pxa2xx_mm_ops, s, "pxa2xx-mm", 0x1000);
+ memory_region_init_io(&s->mm_iomem, NULL, &pxa2xx_mm_ops, s, "pxa2xx-mm", 0x1000);
memory_region_add_subregion(address_space, s->mm_base, &s->mm_iomem);
vmstate_register(NULL, 0, &vmstate_pxa2xx_mm, s);
s->pm_base = 0x40f00000;
- memory_region_init_io(&s->pm_iomem, &pxa2xx_pm_ops, s, "pxa2xx-pm", 0x100);
+ memory_region_init_io(&s->pm_iomem, NULL, &pxa2xx_pm_ops, s, "pxa2xx-pm", 0x100);
memory_region_add_subregion(address_space, s->pm_base, &s->pm_iomem);
vmstate_register(NULL, 0, &vmstate_pxa2xx_pm, s);
@@ -283,7 +283,7 @@ static int pxa2xx_gpio_initfn(SysBusDevice *dev)
qdev_init_gpio_in(&dev->qdev, pxa2xx_gpio_set, s->lines);
qdev_init_gpio_out(&dev->qdev, s->handler, s->lines);
- memory_region_init_io(&s->iomem, &pxa_gpio_ops, s, "pxa2xx-gpio", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &pxa_gpio_ops, s, "pxa2xx-gpio", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq0);
sysbus_init_irq(dev, &s->irq1);
@@ -278,7 +278,7 @@ DeviceState *pxa2xx_pic_init(hwaddr base, ARMCPU *cpu)
qdev_init_gpio_in(dev, pxa2xx_pic_set_irq, PXA2XX_PIC_SRCS);
/* Enable IC memory-mapped registers access. */
- memory_region_init_io(&s->iomem, &pxa2xx_pic_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &pxa2xx_pic_ops, s,
"pxa2xx-pic", 0x00100000);
sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
@@ -114,18 +114,18 @@ static void realview_init(QEMUMachineInitArgs *args,
/* Core tile RAM. */
low_ram_size = ram_size - 0x20000000;
ram_size = 0x20000000;
- memory_region_init_ram(ram_lo, "realview.lowmem", low_ram_size);
+ memory_region_init_ram(ram_lo, NULL, "realview.lowmem", low_ram_size);
vmstate_register_ram_global(ram_lo);
memory_region_add_subregion(sysmem, 0x20000000, ram_lo);
}
- memory_region_init_ram(ram_hi, "realview.highmem", ram_size);
+ memory_region_init_ram(ram_hi, NULL, "realview.highmem", ram_size);
vmstate_register_ram_global(ram_hi);
low_ram_size = ram_size;
if (low_ram_size > 0x10000000)
low_ram_size = 0x10000000;
/* SDRAM at address zero. */
- memory_region_init_alias(ram_alias, "realview.alias",
+ memory_region_init_alias(ram_alias, NULL, "realview.alias",
ram_hi, 0, low_ram_size);
memory_region_add_subregion(sysmem, 0, ram_alias);
if (is_pb) {
@@ -318,7 +318,7 @@ static void realview_init(QEMUMachineInitArgs *args,
startup code. I guess this works on real hardware because the
BootROM happens to be in ROM/flash or in memory that isn't clobbered
until after Linux boots the secondary CPUs. */
- memory_region_init_ram(ram_hack, "realview.hack", 0x1000);
+ memory_region_init_ram(ram_hack, NULL, "realview.hack", 0x1000);
vmstate_register_ram_global(ram_hack);
memory_region_add_subregion(sysmem, SMP_BOOT_ADDR, ram_hack);
@@ -169,7 +169,7 @@ static int sl_nand_init(SysBusDevice *dev) {
nand = drive_get(IF_MTD, 0, 0);
s->nand = nand_init(nand ? nand->bdrv : NULL, s->manf_id, s->chip_id);
- memory_region_init_io(&s->iomem, &sl_ops, s, "sl", 0x40);
+ memory_region_init_io(&s->iomem, NULL, &sl_ops, s, "sl", 0x40);
sysbus_init_mmio(dev, &s->iomem);
return 0;
@@ -896,7 +896,7 @@ static void spitz_common_init(QEMUMachineInitArgs *args,
sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
- memory_region_init_ram(rom, "spitz.rom", SPITZ_ROM);
+ memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM);
vmstate_register_ram_global(rom);
memory_region_set_readonly(rom, true);
memory_region_add_subregion(address_space_mem, 0, rom);
@@ -307,7 +307,7 @@ static int stellaris_gptm_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
qdev_init_gpio_out(&dev->qdev, &s->trigger, 1);
- memory_region_init_io(&s->iomem, &gptm_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &gptm_ops, s,
"gptm", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
@@ -669,7 +669,7 @@ static int stellaris_sys_init(uint32_t base, qemu_irq irq,
s->user0 = macaddr[0] | (macaddr[1] << 8) | (macaddr[2] << 16);
s->user1 = macaddr[3] | (macaddr[4] << 8) | (macaddr[5] << 16);
- memory_region_init_io(&s->iomem, &ssys_ops, s, "ssys", 0x00001000);
+ memory_region_init_io(&s->iomem, NULL, &ssys_ops, s, "ssys", 0x00001000);
memory_region_add_subregion(get_system_memory(), base, &s->iomem);
ssys_reset(s);
vmstate_register(NULL, -1, &vmstate_stellaris_sys, s);
@@ -862,7 +862,7 @@ static int stellaris_i2c_init(SysBusDevice * dev)
bus = i2c_init_bus(&dev->qdev, "i2c");
s->bus = bus;
- memory_region_init_io(&s->iomem, &stellaris_i2c_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &stellaris_i2c_ops, s,
"i2c", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
/* ??? For now we only implement the master interface. */
@@ -1145,7 +1145,7 @@ static int stellaris_adc_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq[n]);
}
- memory_region_init_io(&s->iomem, &stellaris_adc_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &stellaris_adc_ops, s,
"adc", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
stellaris_adc_reset(s);
@@ -173,7 +173,7 @@ static int strongarm_pic_initfn(SysBusDevice *dev)
StrongARMPICState *s = FROM_SYSBUS(StrongARMPICState, dev);
qdev_init_gpio_in(&dev->qdev, strongarm_pic_set_irq, SA_PIC_SRCS);
- memory_region_init_io(&s->iomem, &strongarm_pic_ops, s, "pic", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &strongarm_pic_ops, s, "pic", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
sysbus_init_irq(dev, &s->fiq);
@@ -383,7 +383,7 @@ static int strongarm_rtc_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->rtc_irq);
sysbus_init_irq(dev, &s->rtc_hz_irq);
- memory_region_init_io(&s->iomem, &strongarm_rtc_ops, s, "rtc", 0x10000);
+ memory_region_init_io(&s->iomem, NULL, &strongarm_rtc_ops, s, "rtc", 0x10000);
sysbus_init_mmio(dev, &s->iomem);
return 0;
@@ -637,7 +637,7 @@ static int strongarm_gpio_initfn(SysBusDevice *dev)
qdev_init_gpio_in(&dev->qdev, strongarm_gpio_set, 28);
qdev_init_gpio_out(&dev->qdev, s->handler, 28);
- memory_region_init_io(&s->iomem, &strongarm_gpio_ops, s, "gpio", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &strongarm_gpio_ops, s, "gpio", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
for (i = 0; i < 11; i++) {
@@ -808,7 +808,7 @@ static int strongarm_ppc_init(SysBusDevice *dev)
qdev_init_gpio_in(&dev->qdev, strongarm_ppc_set, 22);
qdev_init_gpio_out(&dev->qdev, s->handler, 22);
- memory_region_init_io(&s->iomem, &strongarm_ppc_ops, s, "ppc", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &strongarm_ppc_ops, s, "ppc", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
@@ -1204,7 +1204,7 @@ static int strongarm_uart_init(SysBusDevice *dev)
{
StrongARMUARTState *s = FROM_SYSBUS(StrongARMUARTState, dev);
- memory_region_init_io(&s->iomem, &strongarm_uart_ops, s, "uart", 0x10000);
+ memory_region_init_io(&s->iomem, NULL, &strongarm_uart_ops, s, "uart", 0x10000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
@@ -1496,7 +1496,7 @@ static int strongarm_ssp_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
- memory_region_init_io(&s->iomem, &strongarm_ssp_ops, s, "ssp", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &strongarm_ssp_ops, s, "ssp", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
s->bus = ssi_create_bus(&dev->qdev, "ssi");
@@ -1571,7 +1571,7 @@ StrongARMState *sa1110_init(MemoryRegion *sysmem,
exit(1);
}
- memory_region_init_ram(&s->sdram, "strongarm.sdram", sdram_size);
+ memory_region_init_ram(&s->sdram, NULL, "strongarm.sdram", sdram_size);
vmstate_register_ram_global(&s->sdram);
memory_region_add_subregion(sysmem, SA_SDCS0, &s->sdram);
@@ -222,7 +222,7 @@ static void tosa_init(QEMUMachineInitArgs *args)
mpu = pxa255_init(address_space_mem, tosa_binfo.ram_size);
- memory_region_init_ram(rom, "tosa.rom", TOSA_ROM);
+ memory_region_init_ram(rom, NULL, "tosa.rom", TOSA_ROM);
vmstate_register_ram_global(rom);
memory_region_set_readonly(rom, true);
memory_region_add_subregion(address_space_mem, 0, rom);
@@ -154,7 +154,7 @@ static int vpb_sic_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->parent[i]);
}
s->irq = 31;
- memory_region_init_io(&s->iomem, &vpb_sic_ops, s, "vpb-sic", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &vpb_sic_ops, s, "vpb-sic", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
return 0;
}
@@ -193,7 +193,7 @@ static void versatile_init(QEMUMachineInitArgs *args, int board_id)
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
}
- memory_region_init_ram(ram, "versatile.ram", args->ram_size);
+ memory_region_init_ram(ram, NULL, "versatile.ram", args->ram_size);
vmstate_register_ram_global(ram);
/* ??? RAM should repeat to fill physical memory space. */
/* SDRAM at address zero. */
@@ -196,7 +196,7 @@ static void a9_daughterboard_init(const VEDBoardInfo *daughterboard,
exit(1);
}
- memory_region_init_ram(ram, "vexpress.highmem", ram_size);
+ memory_region_init_ram(ram, NULL, "vexpress.highmem", ram_size);
vmstate_register_ram_global(ram);
low_ram_size = ram_size;
if (low_ram_size > 0x4000000) {
@@ -206,7 +206,7 @@ static void a9_daughterboard_init(const VEDBoardInfo *daughterboard,
* address space should in theory be remappable to various
* things including ROM or RAM; we always map the RAM there.
*/
- memory_region_init_alias(lowram, "vexpress.lowmem", ram, 0, low_ram_size);
+ memory_region_init_alias(lowram, NULL, "vexpress.lowmem", ram, 0, low_ram_size);
memory_region_add_subregion(sysmem, 0x0, lowram);
memory_region_add_subregion(sysmem, 0x60000000, ram);
@@ -323,7 +323,7 @@ static void a15_daughterboard_init(const VEDBoardInfo *daughterboard,
}
}
- memory_region_init_ram(ram, "vexpress.highmem", ram_size);
+ memory_region_init_ram(ram, NULL, "vexpress.highmem", ram_size);
vmstate_register_ram_global(ram);
/* RAM is from 0x80000000 upwards; there is no low-memory alias for it. */
memory_region_add_subregion(sysmem, 0x80000000, ram);
@@ -357,7 +357,7 @@ static void a15_daughterboard_init(const VEDBoardInfo *daughterboard,
/* 0x2b060000: SP805 watchdog: not modelled */
/* 0x2b0a0000: PL341 dynamic memory controller: not modelled */
/* 0x2e000000: system SRAM */
- memory_region_init_ram(sram, "vexpress.a15sram", 0x10000);
+ memory_region_init_ram(sram, NULL, "vexpress.a15sram", 0x10000);
vmstate_register_ram_global(sram);
memory_region_add_subregion(sysmem, 0x2e000000, sram);
@@ -491,12 +491,12 @@ static void vexpress_common_init(const VEDBoardInfo *daughterboard,
}
sram_size = 0x2000000;
- memory_region_init_ram(sram, "vexpress.sram", sram_size);
+ memory_region_init_ram(sram, NULL, "vexpress.sram", sram_size);
vmstate_register_ram_global(sram);
memory_region_add_subregion(sysmem, map[VE_SRAM], sram);
vram_size = 0x800000;
- memory_region_init_ram(vram, "vexpress.vram", vram_size);
+ memory_region_init_ram(vram, NULL, "vexpress.vram", vram_size);
vmstate_register_ram_global(vram);
memory_region_add_subregion(sysmem, map[VE_VIDEORAM], vram);
@@ -132,12 +132,12 @@ static void zynq_init(QEMUMachineInitArgs *args)
}
/* DDR remapped to address zero. */
- memory_region_init_ram(ext_ram, "zynq.ext_ram", ram_size);
+ memory_region_init_ram(ext_ram, NULL, "zynq.ext_ram", ram_size);
vmstate_register_ram_global(ext_ram);
memory_region_add_subregion(address_space_mem, 0, ext_ram);
/* 256K of on-chip memory */
- memory_region_init_ram(ocm_ram, "zynq.ocm_ram", 256 << 10);
+ memory_region_init_ram(ocm_ram, NULL, "zynq.ocm_ram", 256 << 10);
vmstate_register_ram_global(ocm_ram);
memory_region_add_subregion(address_space_mem, 0xFFFC0000, ocm_ram);
@@ -1378,8 +1378,8 @@ static int ac97_initfn (PCIDevice *dev)
c[PCI_INTERRUPT_LINE] = 0x00; /* intr_ln interrupt line rw */
c[PCI_INTERRUPT_PIN] = 0x01; /* intr_pn interrupt pin ro */
- memory_region_init_io (&s->io_nam, &ac97_io_nam_ops, s, "ac97-nam", 1024);
- memory_region_init_io (&s->io_nabm, &ac97_io_nabm_ops, s, "ac97-nabm", 256);
+ memory_region_init_io (&s->io_nam, NULL, &ac97_io_nam_ops, s, "ac97-nam", 1024);
+ memory_region_init_io (&s->io_nabm, NULL, &ac97_io_nabm_ops, s, "ac97-nabm", 256);
pci_register_bar (&s->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io_nam);
pci_register_bar (&s->dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &s->io_nabm);
qemu_register_reset (ac97_on_reset, s);
@@ -144,7 +144,7 @@ static int cs4231_init1(SysBusDevice *dev)
{
CSState *s = FROM_SYSBUS(CSState, dev);
- memory_region_init_io(&s->iomem, &cs_mem_ops, s, "cs4321", CS_SIZE);
+ memory_region_init_io(&s->iomem, NULL, &cs_mem_ops, s, "cs4321", CS_SIZE);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
@@ -648,7 +648,7 @@ static void cs4231a_initfn (Object *obj)
{
CSState *s = CS4231A (obj);
- memory_region_init_io (&s->ioports, &cs_ioport_ops, s, "cs4231a", 4);
+ memory_region_init_io (&s->ioports, NULL, &cs_ioport_ops, s, "cs4231a", 4);
}
static void cs4231a_realizefn (DeviceState *dev, Error **errp)
@@ -1035,7 +1035,7 @@ static int es1370_initfn (PCIDevice *dev)
c[PCI_MIN_GNT] = 0x0c;
c[PCI_MAX_LAT] = 0x80;
- memory_region_init_io (&s->io, &es1370_io_ops, s, "es1370", 256);
+ memory_region_init_io (&s->io, NULL, &es1370_io_ops, s, "es1370", 256);
pci_register_bar (&s->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io);
qemu_register_reset (es1370_on_reset, s);
@@ -1135,7 +1135,7 @@ static int intel_hda_init(PCIDevice *pci)
/* HDCTL off 0x40 bit 0 selects signaling mode (1-HDA, 0 - Ac97) 18.1.19 */
conf[0x40] = 0x01;
- memory_region_init_io(&d->mmio, &intel_hda_mmio_ops, d,
+ memory_region_init_io(&d->mmio, NULL, &intel_hda_mmio_ops, d,
"intel-hda", 0x4000);
pci_register_bar(&d->pci, 0, 0, &d->mmio);
if (d->msi) {
@@ -244,7 +244,7 @@ static int mv88w8618_audio_init(SysBusDevice *dev)
wm8750_data_req_set(s->wm, mv88w8618_audio_callback, s);
- memory_region_init_io(&s->iomem, &mv88w8618_audio_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &mv88w8618_audio_ops, s,
"audio", MP_AUDIO_SIZE);
sysbus_init_mmio(dev, &s->iomem);
@@ -300,7 +300,7 @@ static int milkymist_ac97_init(SysBusDevice *dev)
s->voice_out = AUD_open_out(&s->card, s->voice_out,
"mm_ac97.out", s, ac97_out_cb, &as);
- memory_region_init_io(&s->regs_region, &ac97_mmio_ops, s,
+ memory_region_init_io(&s->regs_region, NULL, &ac97_mmio_ops, s,
"milkymist-ac97", R_MAX * 4);
sysbus_init_mmio(dev, &s->regs_region);
@@ -167,7 +167,7 @@ static void pcspk_initfn(Object *obj)
{
PCSpkState *s = PC_SPEAKER(obj);
- memory_region_init_io(&s->ioport, &pcspk_io_ops, s, "elcr", 1);
+ memory_region_init_io(&s->ioport, NULL, &pcspk_io_ops, s, "elcr", 1);
}
static void pcspk_realizefn(DeviceState *dev, Error **errp)
@@ -543,7 +543,7 @@ static int pl041_init(SysBusDevice *dev)
}
/* Connect the device to the sysbus */
- memory_region_init_io(&s->iomem, &pl041_ops, s, "pl041", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &pl041_ops, s, "pl041", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
@@ -2149,7 +2149,7 @@ static int sysbus_fdc_init1(SysBusDevice *dev)
FDCtrl *fdctrl = &sys->state;
int ret;
- memory_region_init_io(&fdctrl->iomem, &fdctrl_mem_ops, fdctrl, "fdc", 0x08);
+ memory_region_init_io(&fdctrl->iomem, NULL, &fdctrl_mem_ops, fdctrl, "fdc", 0x08);
sysbus_init_mmio(dev, &fdctrl->iomem);
sysbus_init_irq(dev, &fdctrl->irq);
qdev_init_gpio_in(&dev->qdev, fdctrl_handle_tc, 1);
@@ -2165,7 +2165,7 @@ static int sun4m_fdc_init1(SysBusDevice *dev)
{
FDCtrl *fdctrl = &(FROM_SYSBUS(FDCtrlSysBus, dev)->state);
- memory_region_init_io(&fdctrl->iomem, &fdctrl_mem_strict_ops, fdctrl,
+ memory_region_init_io(&fdctrl->iomem, NULL, &fdctrl_mem_strict_ops, fdctrl,
"fdctrl", 0x08);
sysbus_init_mmio(dev, &fdctrl->iomem);
sysbus_init_irq(dev, &fdctrl->irq);
@@ -777,7 +777,7 @@ static int nvme_init(PCIDevice *pci_dev)
n->sq = g_malloc0(sizeof(*n->sq)*n->num_queues);
n->cq = g_malloc0(sizeof(*n->cq)*n->num_queues);
- memory_region_init_io(&n->iomem, &nvme_mmio_ops, n, "nvme", n->reg_size);
+ memory_region_init_io(&n->iomem, NULL, &nvme_mmio_ops, n, "nvme", n->reg_size);
pci_register_bar(&n->parent_obj, 0,
PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_64,
&n->iomem);
@@ -113,9 +113,9 @@ static void onenand_mem_setup(OneNANDState *s)
/* XXX: We should use IO_MEM_ROMD but we broke it earlier...
* Both 0x0000 ... 0x01ff and 0x8000 ... 0x800f can be used to
* write boot commands. Also take note of the BWPS bit. */
- memory_region_init(&s->container, "onenand", 0x10000 << s->shift);
+ memory_region_init(&s->container, NULL, "onenand", 0x10000 << s->shift);
memory_region_add_subregion(&s->container, 0, &s->iomem);
- memory_region_init_alias(&s->mapped_ram, "onenand-mapped-ram",
+ memory_region_init_alias(&s->mapped_ram, NULL, "onenand-mapped-ram",
&s->ram, 0x0200 << s->shift,
0xbe00 << s->shift);
memory_region_add_subregion_overlap(&s->container,
@@ -768,7 +768,7 @@ static int onenand_initfn(SysBusDevice *dev)
s->blockwp = g_malloc(s->blocks);
s->density_mask = (s->id.dev & 0x08)
? (1 << (6 + ((s->id.dev >> 4) & 7))) : 0;
- memory_region_init_io(&s->iomem, &onenand_ops, s, "onenand",
+ memory_region_init_io(&s->iomem, NULL, &onenand_ops, s, "onenand",
0x10000 << s->shift);
if (!s->bdrv) {
s->image = memset(g_malloc(size + (size >> 5)),
@@ -782,7 +782,7 @@ static int onenand_initfn(SysBusDevice *dev)
}
s->otp = memset(g_malloc((64 + 2) << PAGE_SHIFT),
0xff, (64 + 2) << PAGE_SHIFT);
- memory_region_init_ram(&s->ram, "onenand.ram", 0xc000 << s->shift);
+ memory_region_init_ram(&s->ram, NULL, "onenand.ram", 0xc000 << s->shift);
vmstate_register_ram_global(&s->ram);
ram = memory_region_get_ram_ptr(&s->ram);
s->boot[0] = ram + (0x0000 << s->shift);
@@ -59,7 +59,7 @@ static void pc_isa_bios_init(MemoryRegion *rom_memory,
isa_bios_size = 128 * 1024;
}
isa_bios = g_malloc(sizeof(*isa_bios));
- memory_region_init_ram(isa_bios, "isa-bios", isa_bios_size);
+ memory_region_init_ram(isa_bios, NULL, "isa-bios", isa_bios_size);
vmstate_register_ram_global(isa_bios);
memory_region_add_subregion_overlap(rom_memory,
0x100000 - isa_bios_size,
@@ -162,7 +162,7 @@ static void old_pc_system_rom_init(MemoryRegion *rom_memory, bool isapc_ram_fw)
goto bios_error;
}
bios = g_malloc(sizeof(*bios));
- memory_region_init_ram(bios, "pc.bios", bios_size);
+ memory_region_init_ram(bios, NULL, "pc.bios", bios_size);
vmstate_register_ram_global(bios);
if (!isapc_ram_fw) {
memory_region_set_readonly(bios, true);
@@ -183,7 +183,7 @@ static void old_pc_system_rom_init(MemoryRegion *rom_memory, bool isapc_ram_fw)
isa_bios_size = 128 * 1024;
}
isa_bios = g_malloc(sizeof(*isa_bios));
- memory_region_init_alias(isa_bios, "isa-bios", bios,
+ memory_region_init_alias(isa_bios, NULL, "isa-bios", bios,
bios_size - isa_bios_size, isa_bios_size);
memory_region_add_subregion_overlap(rom_memory,
0x100000 - isa_bios_size,
@@ -579,7 +579,8 @@ static int pflash_cfi01_init(SysBusDevice *dev)
#endif
memory_region_init_rom_device(
- &pfl->mem, pfl->be ? &pflash_cfi01_ops_be : &pflash_cfi01_ops_le, pfl,
+ &pfl->mem, NULL,
+ pfl->be ? &pflash_cfi01_ops_be : &pflash_cfi01_ops_le, pfl,
pfl->name, total_len);
vmstate_register_ram(&pfl->mem, DEVICE(pfl));
pfl->storage = memory_region_get_ram_ptr(&pfl->mem);
@@ -100,10 +100,10 @@ static void pflash_setup_mappings(pflash_t *pfl)
unsigned i;
hwaddr size = memory_region_size(&pfl->orig_mem);
- memory_region_init(&pfl->mem, "pflash", pfl->mappings * size);
+ memory_region_init(&pfl->mem, NULL, "pflash", pfl->mappings * size);
pfl->mem_mappings = g_new(MemoryRegion, pfl->mappings);
for (i = 0; i < pfl->mappings; ++i) {
- memory_region_init_alias(&pfl->mem_mappings[i], "pflash-alias",
+ memory_region_init_alias(&pfl->mem_mappings[i], NULL, "pflash-alias",
&pfl->orig_mem, 0, size);
memory_region_add_subregion(&pfl->mem, i * size, &pfl->mem_mappings[i]);
}
@@ -600,7 +600,7 @@ static int pflash_cfi02_init(SysBusDevice *dev)
return NULL;
#endif
- memory_region_init_rom_device(&pfl->orig_mem, pfl->be ?
+ memory_region_init_rom_device(&pfl->orig_mem, NULL, pfl->be ?
&pflash_cfi02_ops_be : &pflash_cfi02_ops_le,
pfl, pfl->name, chip_len);
vmstate_register_ram(&pfl->orig_mem, DEVICE(pfl));
@@ -442,7 +442,7 @@ static int cadence_uart_init(SysBusDevice *dev)
{
UartState *s = FROM_SYSBUS(UartState, dev);
- memory_region_init_io(&s->iomem, &uart_ops, s, "uart", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &uart_ops, s, "uart", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
@@ -103,7 +103,7 @@ static void debugcon_isa_realizefn(DeviceState *dev, Error **errp)
error_propagate(errp, err);
return;
}
- memory_region_init_io(&s->io, &debugcon_ops, s,
+ memory_region_init_io(&s->io, NULL, &debugcon_ops, s,
TYPE_ISA_DEBUGCON_DEVICE, 1);
memory_region_add_subregion(isa_address_space_io(d),
isa->iobase, &s->io);
@@ -886,7 +886,7 @@ static int escc_init1(SysBusDevice *dev)
s->chn[0].otherchn = &s->chn[1];
s->chn[1].otherchn = &s->chn[0];
- memory_region_init_io(&s->mmio, &escc_mem_ops, s, "escc",
+ memory_region_init_io(&s->mmio, NULL, &escc_mem_ops, s, "escc",
ESCC_SIZE << s->it_shift);
sysbus_init_mmio(dev, &s->mmio);
@@ -211,7 +211,7 @@ static int etraxfs_ser_init(SysBusDevice *dev)
struct etrax_serial *s = FROM_SYSBUS(typeof (*s), dev);
sysbus_init_irq(dev, &s->irq);
- memory_region_init_io(&s->mmio, &ser_ops, s, "etraxfs-serial", R_MAX * 4);
+ memory_region_init_io(&s->mmio, NULL, &ser_ops, s, "etraxfs-serial", R_MAX * 4);
sysbus_init_mmio(dev, &s->mmio);
s->chr = qemu_char_get_next_serial();
@@ -630,7 +630,7 @@ static int exynos4210_uart_init(SysBusDevice *dev)
Exynos4210UartState *s = FROM_SYSBUS(Exynos4210UartState, dev);
/* memory mapping */
- memory_region_init_io(&s->iomem, &exynos4210_uart_ops, s, "exynos4210.uart",
+ memory_region_init_io(&s->iomem, NULL, &exynos4210_uart_ops, s, "exynos4210.uart",
EXYNOS4210_UART_REGS_MEM_SIZE);
sysbus_init_mmio(dev, &s->iomem);
@@ -242,7 +242,7 @@ static int grlib_apbuart_init(SysBusDevice *dev)
sysbus_init_irq(dev, &uart->irq);
- memory_region_init_io(&uart->iomem, &grlib_apbuart_ops, uart,
+ memory_region_init_io(&uart->iomem, NULL, &grlib_apbuart_ops, uart,
"uart", UART_REG_SIZE);
sysbus_init_mmio(dev, &uart->iomem);
@@ -386,7 +386,7 @@ static int imx_serial_init(SysBusDevice *dev)
IMXSerialState *s = FROM_SYSBUS(IMXSerialState, dev);
- memory_region_init_io(&s->iomem, &imx_serial_ops, s, "imx-serial", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &imx_serial_ops, s, "imx-serial", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
@@ -250,7 +250,7 @@ static int lm32_uart_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
- memory_region_init_io(&s->iomem, &uart_ops, s, "uart", R_MAX * 4);
+ memory_region_init_io(&s->iomem, NULL, &uart_ops, s, "uart", R_MAX * 4);
sysbus_init_mmio(dev, &s->iomem);
s->chr = qemu_char_get_next_serial();
@@ -302,6 +302,6 @@ void mcf_uart_mm_init(MemoryRegion *sysmem,
mcf_uart_state *s;
s = mcf_uart_init(irq, chr);
- memory_region_init_io(&s->iomem, &mcf_uart_ops, s, "uart", 0x40);
+ memory_region_init_io(&s->iomem, NULL, &mcf_uart_ops, s, "uart", 0x40);
memory_region_add_subregion(sysmem, base, &s->iomem);
}
@@ -196,7 +196,7 @@ static int milkymist_uart_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
- memory_region_init_io(&s->regs_region, &uart_mmio_ops, s,
+ memory_region_init_io(&s->regs_region, NULL, &uart_mmio_ops, s,
"milkymist-uart", R_MAX * 4);
sysbus_init_mmio(dev, &s->regs_region);
@@ -168,7 +168,7 @@ struct omap_uart_s *omap2_uart_init(MemoryRegion *sysmem,
struct omap_uart_s *s = omap_uart_init(base, irq,
fclk, iclk, txdma, rxdma, label, chr);
- memory_region_init_io(&s->iomem, &omap_uart_ops, s, "omap.uart", 0x100);
+ memory_region_init_io(&s->iomem, NULL, &omap_uart_ops, s, "omap.uart", 0x100);
s->ta = ta;
@@ -587,7 +587,7 @@ bool parallel_mm_init(MemoryRegion *address_space,
s->it_shift = it_shift;
qemu_register_reset(parallel_reset, s);
- memory_region_init_io(&s->iomem, ¶llel_mm_ops, s,
+ memory_region_init_io(&s->iomem, NULL, ¶llel_mm_ops, s,
"parallel", 8 << it_shift);
memory_region_add_subregion(address_space, base, &s->iomem);
return true;
@@ -265,7 +265,7 @@ static int pl011_init(SysBusDevice *dev, const unsigned char *id)
{
pl011_state *s = FROM_SYSBUS(pl011_state, dev);
- memory_region_init_io(&s->iomem, &pl011_ops, s, "pl011", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &pl011_ops, s, "pl011", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
s->id = id;
@@ -72,7 +72,7 @@ static void serial_isa_realizefn(DeviceState *dev, Error **errp)
serial_realize_core(s, errp);
qdev_set_legacy_instance_id(dev, isa->iobase, 3);
- memory_region_init_io(&s->io, &serial_io_ops, s, "serial", 8);
+ memory_region_init_io(&s->io, NULL, &serial_io_ops, s, "serial", 8);
isa_register_ioport(isadev, &s->io, isa->iobase);
}
@@ -63,7 +63,7 @@ static int serial_pci_init(PCIDevice *dev)
pci->dev.config[PCI_INTERRUPT_PIN] = 0x01;
s->irq = pci->dev.irq[0];
- memory_region_init_io(&s->io, &serial_io_ops, s, "serial", 8);
+ memory_region_init_io(&s->io, NULL, &serial_io_ops, s, "serial", 8);
pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io);
return 0;
}
@@ -102,7 +102,7 @@ static int multi_serial_pci_init(PCIDevice *dev)
assert(pci->ports <= PCI_SERIAL_MAX_PORTS);
pci->dev.config[PCI_INTERRUPT_PIN] = 0x01;
- memory_region_init(&pci->iobar, "multiserial", 8 * pci->ports);
+ memory_region_init(&pci->iobar, NULL, "multiserial", 8 * pci->ports);
pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &pci->iobar);
pci->irqs = qemu_allocate_irqs(multi_serial_irq_mux, pci,
pci->ports);
@@ -118,7 +118,7 @@ static int multi_serial_pci_init(PCIDevice *dev)
}
s->irq = pci->irqs[i];
pci->name[i] = g_strdup_printf("uart #%d", i+1);
- memory_region_init_io(&s->io, &serial_io_ops, s, pci->name[i], 8);
+ memory_region_init_io(&s->io, NULL, &serial_io_ops, s, pci->name[i], 8);
memory_region_add_subregion(&pci->iobar, 8 * i, &s->io);
}
return 0;
@@ -703,7 +703,7 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase,
vmstate_register(NULL, base, &vmstate_serial, s);
- memory_region_init_io(&s->io, &serial_io_ops, s, "serial", 8);
+ memory_region_init_io(&s->io, NULL, &serial_io_ops, s, "serial", 8);
memory_region_add_subregion(system_io, base, &s->io);
return s;
@@ -766,7 +766,7 @@ SerialState *serial_mm_init(MemoryRegion *address_space,
}
vmstate_register(NULL, base, &vmstate_serial, s);
- memory_region_init_io(&s->io, &serial_mm_ops[end], s,
+ memory_region_init_io(&s->io, NULL, &serial_mm_ops[end], s,
"serial", 8 << it_shift);
memory_region_add_subregion(address_space, base, &s->io);
@@ -383,14 +383,14 @@ void sh_serial_init(MemoryRegion *sysmem,
sh_serial_clear_fifo(s);
- memory_region_init_io(&s->iomem, &sh_serial_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &sh_serial_ops, s,
"serial", 0x100000000ULL);
- memory_region_init_alias(&s->iomem_p4, "serial-p4", &s->iomem,
+ memory_region_init_alias(&s->iomem_p4, NULL, "serial-p4", &s->iomem,
0, 0x28);
memory_region_add_subregion(sysmem, P4ADDR(base), &s->iomem_p4);
- memory_region_init_alias(&s->iomem_a7, "serial-a7", &s->iomem,
+ memory_region_init_alias(&s->iomem_a7, NULL, "serial-a7", &s->iomem,
0, 0x28);
memory_region_add_subregion(sysmem, A7ADDR(base), &s->iomem_a7);
@@ -588,17 +588,17 @@ static int tpci200_initfn(PCIDevice *pci_dev)
pci_set_long(c + 0x48, 0x00024C06);
pci_set_long(c + 0x4C, 0x00000003);
- memory_region_init_io(&s->mmio, &tpci200_cfg_ops,
+ memory_region_init_io(&s->mmio, NULL, &tpci200_cfg_ops,
s, "tpci200_mmio", 128);
- memory_region_init_io(&s->io, &tpci200_cfg_ops,
+ memory_region_init_io(&s->io, NULL, &tpci200_cfg_ops,
s, "tpci200_io", 128);
- memory_region_init_io(&s->las0, &tpci200_las0_ops,
+ memory_region_init_io(&s->las0, NULL, &tpci200_las0_ops,
s, "tpci200_las0", 256);
- memory_region_init_io(&s->las1, &tpci200_las1_ops,
+ memory_region_init_io(&s->las1, NULL, &tpci200_las1_ops,
s, "tpci200_las1", 1024);
- memory_region_init_io(&s->las2, &tpci200_las2_ops,
+ memory_region_init_io(&s->las2, NULL, &tpci200_las2_ops,
s, "tpci200_las2", 1024*1024*32);
- memory_region_init_io(&s->las3, &tpci200_las3_ops,
+ memory_region_init_io(&s->las3, NULL, &tpci200_las3_ops,
s, "tpci200_las3", 1024*1024*16);
pci_register_bar(&s->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mmio);
pci_register_bar(&s->dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &s->io);
@@ -199,7 +199,7 @@ static int xilinx_uartlite_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
uart_update_status(s);
- memory_region_init_io(&s->mmio, &uart_ops, s, "xlnx.xps-uartlite",
+ memory_region_init_io(&s->mmio, NULL, &uart_ops, s, "xlnx.xps-uartlite",
R_MAX * 4);
sysbus_init_mmio(dev, &s->mmio);
@@ -70,7 +70,7 @@ static int empty_slot_init1(SysBusDevice *dev)
{
EmptySlot *s = FROM_SYSBUS(EmptySlot, dev);
- memory_region_init_io(&s->iomem, &empty_slot_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &empty_slot_ops, s,
"empty-slot", s->size);
sysbus_init_mmio(dev, &s->iomem);
return 0;
@@ -68,7 +68,7 @@ static int a15mp_priv_init(SysBusDevice *dev)
* 0x5000-0x5fff -- GIC virtual interface control (not modelled)
* 0x6000-0x7fff -- GIC virtual CPU interface (not modelled)
*/
- memory_region_init(&s->container, "a15mp-priv-container", 0x8000);
+ memory_region_init(&s->container, NULL, "a15mp-priv-container", 0x8000);
memory_region_add_subregion(&s->container, 0x1000,
sysbus_mmio_get_region(busdev, 0));
memory_region_add_subregion(&s->container, 0x2000,
@@ -71,7 +71,7 @@ static int a9mp_priv_init(SysBusDevice *dev)
*
* We should implement the global timer but don't currently do so.
*/
- memory_region_init(&s->container, "a9mp-priv-container", 0x2000);
+ memory_region_init(&s->container, NULL, "a9mp-priv-container", 0x2000);
memory_region_add_subregion(&s->container, 0,
sysbus_mmio_get_region(scubusdev, 0));
/* GIC CPU interface */
@@ -87,8 +87,8 @@ static void mpcore_priv_map_setup(ARM11MPCorePriveState *s)
SysBusDevice *gicbusdev = SYS_BUS_DEVICE(s->gic);
SysBusDevice *timerbusdev = SYS_BUS_DEVICE(s->mptimer);
SysBusDevice *wdtbusdev = SYS_BUS_DEVICE(s->wdtimer);
- memory_region_init(&s->container, "mpcode-priv-container", 0x2000);
- memory_region_init_io(&s->iomem, &mpcore_scu_ops, s, "mpcore-scu", 0x100);
+ memory_region_init(&s->container, NULL, "mpcode-priv-container", 0x2000);
+ memory_region_init_io(&s->iomem, NULL, &mpcore_scu_ops, s, "mpcore-scu", 0x100);
memory_region_add_subregion(&s->container, 0, &s->iomem);
/* GIC CPU interfaces: "current CPU" at 0x100, then specific CPUs
* at 0x200, 0x300...
@@ -95,7 +95,7 @@ static void icc_bridge_init(Object *obj)
/* Do not change order of registering regions,
* APIC must be first registered region, board maps it by 0 index
*/
- memory_region_init(&s->apic_container, "icc-apic-container",
+ memory_region_init(&s->apic_container, NULL, "icc-apic-container",
APIC_SPACE_SIZE);
sysbus_init_mmio(sb, &s->apic_container);
s->icc_bus.apic_address_space = &s->apic_container;
@@ -269,13 +269,13 @@ void axisdev88_init(QEMUMachineInitArgs *args)
env = &cpu->env;
/* allocate RAM */
- memory_region_init_ram(phys_ram, "axisdev88.ram", ram_size);
+ memory_region_init_ram(phys_ram, NULL, "axisdev88.ram", ram_size);
vmstate_register_ram_global(phys_ram);
memory_region_add_subregion(address_space_mem, 0x40000000, phys_ram);
/* The ETRAX-FS has 128Kb on chip ram, the docs refer to it as the
internal memory. */
- memory_region_init_ram(phys_intmem, "axisdev88.chipram", INTMEM_SIZE);
+ memory_region_init_ram(phys_intmem, NULL, "axisdev88.chipram", INTMEM_SIZE);
vmstate_register_ram_global(phys_intmem);
memory_region_add_subregion(address_space_mem, 0x38000000, phys_intmem);
@@ -283,13 +283,13 @@ void axisdev88_init(QEMUMachineInitArgs *args)
nand = drive_get(IF_MTD, 0, 0);
nand_state.nand = nand_init(nand ? nand->bdrv : NULL,
NAND_MFR_STMICRO, 0x39);
- memory_region_init_io(&nand_state.iomem, &nand_ops, &nand_state,
+ memory_region_init_io(&nand_state.iomem, NULL, &nand_ops, &nand_state,
"nand", 0x05000000);
memory_region_add_subregion(address_space_mem, 0x10000000,
&nand_state.iomem);
gpio_state.nand = &nand_state;
- memory_region_init_io(&gpio_state.iomem, &gpio_ops, &gpio_state,
+ memory_region_init_io(&gpio_state.iomem, NULL, &gpio_ops, &gpio_state,
"gpio", 0x5c);
memory_region_add_subregion(address_space_mem, 0x3001a000,
&gpio_state.iomem);
@@ -2840,21 +2840,21 @@ static void cirrus_init_common(CirrusVGAState * s, int device_id, int is_pci,
}
/* Register ioport 0x3b0 - 0x3df */
- memory_region_init_io(&s->cirrus_vga_io, &cirrus_vga_io_ops, s,
+ memory_region_init_io(&s->cirrus_vga_io, NULL, &cirrus_vga_io_ops, s,
"cirrus-io", 0x30);
memory_region_add_subregion(system_io, 0x3b0, &s->cirrus_vga_io);
- memory_region_init(&s->low_mem_container,
+ memory_region_init(&s->low_mem_container, NULL,
"cirrus-lowmem-container",
0x20000);
- memory_region_init_io(&s->low_mem, &cirrus_vga_mem_ops, s,
+ memory_region_init_io(&s->low_mem, NULL, &cirrus_vga_mem_ops, s,
"cirrus-low-memory", 0x20000);
memory_region_add_subregion(&s->low_mem_container, 0, &s->low_mem);
for (i = 0; i < 2; ++i) {
static const char *names[] = { "vga.bank0", "vga.bank1" };
MemoryRegion *bank = &s->cirrus_bank[i];
- memory_region_init_alias(bank, names[i], &s->vga.vram, 0, 0x8000);
+ memory_region_init_alias(bank, NULL, names[i], &s->vga.vram, 0, 0x8000);
memory_region_set_enabled(bank, false);
memory_region_add_subregion_overlap(&s->low_mem_container, i * 0x8000,
bank, 1);
@@ -2866,13 +2866,13 @@ static void cirrus_init_common(CirrusVGAState * s, int device_id, int is_pci,
memory_region_set_coalescing(&s->low_mem);
/* I/O handler for LFB */
- memory_region_init_io(&s->cirrus_linear_io, &cirrus_linear_io_ops, s,
+ memory_region_init_io(&s->cirrus_linear_io, NULL, &cirrus_linear_io_ops, s,
"cirrus-linear-io", s->vga.vram_size_mb
* 1024 * 1024);
memory_region_set_flush_coalesced(&s->cirrus_linear_io);
/* I/O handler for LFB */
- memory_region_init_io(&s->cirrus_linear_bitblt_io,
+ memory_region_init_io(&s->cirrus_linear_bitblt_io, NULL,
&cirrus_linear_bitblt_io_ops,
s,
"cirrus-bitblt-mmio",
@@ -2880,7 +2880,7 @@ static void cirrus_init_common(CirrusVGAState * s, int device_id, int is_pci,
memory_region_set_flush_coalesced(&s->cirrus_linear_bitblt_io);
/* I/O handler for memory-mapped I/O */
- memory_region_init_io(&s->cirrus_mmio_io, &cirrus_mmio_io_ops, s,
+ memory_region_init_io(&s->cirrus_mmio_io, NULL, &cirrus_mmio_io_ops, s,
"cirrus-mmio", CIRRUS_PNPMMIO_SIZE);
memory_region_set_flush_coalesced(&s->cirrus_mmio_io);
@@ -2965,7 +2965,7 @@ static int pci_cirrus_vga_initfn(PCIDevice *dev)
/* setup PCI */
- memory_region_init(&s->pci_bar, "cirrus-pci-bar0", 0x2000000);
+ memory_region_init(&s->pci_bar, NULL, "cirrus-pci-bar0", 0x2000000);
/* XXX: add byte swapping apertures */
memory_region_add_subregion(&s->pci_bar, 0, &s->cirrus_linear_io);
@@ -1902,7 +1902,7 @@ static int exynos4210_fimd_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq[1]);
sysbus_init_irq(dev, &s->irq[2]);
- memory_region_init_io(&s->iomem, &exynos4210_fimd_mmio_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &exynos4210_fimd_mmio_ops, s,
"exynos4210.fimd", FIMD_REGS_SIZE);
sysbus_init_mmio(dev, &s->iomem);
s->console = graphic_console_init(DEVICE(dev), &exynos4210_fimd_ops, s);
@@ -486,8 +486,8 @@ static void g364fb_init(DeviceState *dev, G364State *s)
s->con = graphic_console_init(dev, &g364fb_ops, s);
- memory_region_init_io(&s->mem_ctrl, &g364fb_ctrl_ops, s, "ctrl", 0x180000);
- memory_region_init_ram_ptr(&s->mem_vram, "vram",
+ memory_region_init_io(&s->mem_ctrl, NULL, &g364fb_ctrl_ops, s, "ctrl", 0x180000);
+ memory_region_init_ram_ptr(&s->mem_vram, NULL, "vram",
s->vram_size, s->vram);
vmstate_register_ram(&s->mem_vram, dev);
memory_region_set_coalescing(&s->mem_vram);
@@ -264,7 +264,7 @@ static int jazz_led_init(SysBusDevice *dev)
{
LedState *s = FROM_SYSBUS(LedState, dev);
- memory_region_init_io(&s->iomem, &led_ops, s, "led", 1);
+ memory_region_init_io(&s->iomem, NULL, &led_ops, s, "led", 1);
sysbus_init_mmio(dev, &s->iomem);
s->con = graphic_console_init(DEVICE(dev), &jazz_led_ops, s);
@@ -447,7 +447,7 @@ static int milkymist_tmu2_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
- memory_region_init_io(&s->regs_region, &tmu2_mmio_ops, s,
+ memory_region_init_io(&s->regs_region, NULL, &tmu2_mmio_ops, s,
"milkymist-tmu2", R_MAX * 4);
sysbus_init_mmio(dev, &s->regs_region);
@@ -279,7 +279,7 @@ static int milkymist_vgafb_init(SysBusDevice *dev)
{
MilkymistVgafbState *s = FROM_SYSBUS(typeof(*s), dev);
- memory_region_init_io(&s->regs_region, &vgafb_mmio_ops, s,
+ memory_region_init_io(&s->regs_region, NULL, &vgafb_mmio_ops, s,
"milkymist-vgafb", R_MAX * 4);
sysbus_init_mmio(dev, &s->regs_region);
@@ -1053,15 +1053,15 @@ struct omap_dss_s *omap_dss_init(struct omap_target_agent_s *ta,
s->drq = drq;
omap_dss_reset(s);
- memory_region_init_io(&s->iomem_diss1, &omap_diss_ops, s, "omap.diss1",
+ memory_region_init_io(&s->iomem_diss1, NULL, &omap_diss_ops, s, "omap.diss1",
omap_l4_region_size(ta, 0));
- memory_region_init_io(&s->iomem_disc1, &omap_disc_ops, s, "omap.disc1",
+ memory_region_init_io(&s->iomem_disc1, NULL, &omap_disc_ops, s, "omap.disc1",
omap_l4_region_size(ta, 1));
- memory_region_init_io(&s->iomem_rfbi1, &omap_rfbi_ops, s, "omap.rfbi1",
+ memory_region_init_io(&s->iomem_rfbi1, NULL, &omap_rfbi_ops, s, "omap.rfbi1",
omap_l4_region_size(ta, 2));
- memory_region_init_io(&s->iomem_venc1, &omap_venc_ops, s, "omap.venc1",
+ memory_region_init_io(&s->iomem_venc1, NULL, &omap_venc_ops, s, "omap.venc1",
omap_l4_region_size(ta, 3));
- memory_region_init_io(&s->iomem_im3, &omap_im3_ops, s,
+ memory_region_init_io(&s->iomem_im3, NULL, &omap_im3_ops, s,
"omap.im3", 0x1000);
omap_l4_attach(ta, 0, &s->iomem_diss1);
@@ -403,7 +403,7 @@ struct omap_lcd_panel_s *omap_lcdc_init(MemoryRegion *sysmem,
s->sysmem = sysmem;
omap_lcdc_reset(s);
- memory_region_init_io(&s->iomem, &omap_lcdc_ops, s, "omap.lcdc", 0x100);
+ memory_region_init_io(&s->iomem, NULL, &omap_lcdc_ops, s, "omap.lcdc", 0x100);
memory_region_add_subregion(sysmem, base, &s->iomem);
s->con = graphic_console_init(NULL, &omap_ops, s);
@@ -453,7 +453,7 @@ static int pl110_init(SysBusDevice *dev)
{
pl110_state *s = FROM_SYSBUS(pl110_state, dev);
- memory_region_init_io(&s->iomem, &pl110_ops, s, "pl110", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &pl110_ops, s, "pl110", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
qdev_init_gpio_in(&s->busdev.qdev, pl110_mux_ctrl_set, 1);
@@ -1009,7 +1009,7 @@ PXA2xxLCDState *pxa2xx_lcdc_init(MemoryRegion *sysmem,
pxa2xx_lcdc_orientation(s, graphic_rotate);
- memory_region_init_io(&s->iomem, &pxa2xx_lcdc_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &pxa2xx_lcdc_ops, s,
"pxa2xx-lcd-controller", 0x00100000);
memory_region_add_subregion(sysmem, base, &s->iomem);
@@ -1981,18 +1981,18 @@ static int qxl_init_common(PCIQXLDevice *qxl)
pci_set_byte(&config[PCI_INTERRUPT_PIN], 1);
qxl->rom_size = qxl_rom_size();
- memory_region_init_ram(&qxl->rom_bar, "qxl.vrom", qxl->rom_size);
+ memory_region_init_ram(&qxl->rom_bar, NULL, "qxl.vrom", qxl->rom_size);
vmstate_register_ram(&qxl->rom_bar, &qxl->pci.qdev);
init_qxl_rom(qxl);
init_qxl_ram(qxl);
qxl->guest_surfaces.cmds = g_new0(QXLPHYSICAL, qxl->ssd.num_surfaces);
- memory_region_init_ram(&qxl->vram_bar, "qxl.vram", qxl->vram_size);
+ memory_region_init_ram(&qxl->vram_bar, NULL, "qxl.vram", qxl->vram_size);
vmstate_register_ram(&qxl->vram_bar, &qxl->pci.qdev);
- memory_region_init_alias(&qxl->vram32_bar, "qxl.vram32", &qxl->vram_bar,
+ memory_region_init_alias(&qxl->vram32_bar, NULL, "qxl.vram32", &qxl->vram_bar,
0, qxl->vram32_size);
- memory_region_init_io(&qxl->io_bar, &qxl_io_ops, qxl,
+ memory_region_init_io(&qxl->io_bar, NULL, &qxl_io_ops, qxl,
"qxl-ioports", io_size);
if (qxl->id == 0) {
vga_dirty_log_start(&qxl->vga);
@@ -2093,7 +2093,7 @@ static int qxl_init_secondary(PCIDevice *dev)
qxl->id = device_id++;
qxl_init_ramsize(qxl);
- memory_region_init_ram(&qxl->vga.vram, "qxl.vgavram", qxl->vga.vram_size);
+ memory_region_init_ram(&qxl->vga.vram, NULL, "qxl.vgavram", qxl->vga.vram_size);
vmstate_register_ram(&qxl->vga.vram, &qxl->pci.qdev);
qxl->vga.vram_ptr = memory_region_get_ram_ptr(&qxl->vga.vram);
qxl->vga.con = graphic_console_init(DEVICE(dev), &qxl_ops, qxl);
@@ -1408,23 +1408,23 @@ void sm501_init(MemoryRegion *address_space_mem, uint32_t base,
s->dc_crt_control = 0x00010000;
/* allocate local memory */
- memory_region_init_ram(&s->local_mem_region, "sm501.local",
+ memory_region_init_ram(&s->local_mem_region, NULL, "sm501.local",
local_mem_bytes);
vmstate_register_ram_global(&s->local_mem_region);
s->local_mem = memory_region_get_ram_ptr(&s->local_mem_region);
memory_region_add_subregion(address_space_mem, base, &s->local_mem_region);
/* map mmio */
- memory_region_init_io(sm501_system_config, &sm501_system_config_ops, s,
+ memory_region_init_io(sm501_system_config, NULL, &sm501_system_config_ops, s,
"sm501-system-config", 0x6c);
memory_region_add_subregion(address_space_mem, base + MMIO_BASE_OFFSET,
sm501_system_config);
- memory_region_init_io(sm501_disp_ctrl, &sm501_disp_ctrl_ops, s,
+ memory_region_init_io(sm501_disp_ctrl, NULL, &sm501_disp_ctrl_ops, s,
"sm501-disp-ctrl", 0x1000);
memory_region_add_subregion(address_space_mem,
base + MMIO_BASE_OFFSET + SM501_DC,
sm501_disp_ctrl);
- memory_region_init_io(sm501_2d_engine, &sm501_2d_engine_ops, s,
+ memory_region_init_io(sm501_2d_engine, NULL, &sm501_2d_engine_ops, s,
"sm501-2d-engine", 0x54);
memory_region_add_subregion(address_space_mem,
base + MMIO_BASE_OFFSET + SM501_2D_ENGINE,
@@ -578,10 +578,10 @@ TC6393xbState *tc6393xb_init(MemoryRegion *sysmem, uint32_t base, qemu_irq irq)
nand = drive_get(IF_MTD, 0, 0);
s->flash = nand_init(nand ? nand->bdrv : NULL, NAND_MFR_TOSHIBA, 0x76);
- memory_region_init_io(&s->iomem, &tc6393xb_ops, s, "tc6393xb", 0x10000);
+ memory_region_init_io(&s->iomem, NULL, &tc6393xb_ops, s, "tc6393xb", 0x10000);
memory_region_add_subregion(sysmem, base, &s->iomem);
- memory_region_init_ram(&s->vram, "tc6393xb.vram", 0x100000);
+ memory_region_init_ram(&s->vram, NULL, "tc6393xb.vram", 0x100000);
vmstate_register_ram_global(&s->vram);
s->vram_ptr = memory_region_get_ram_ptr(&s->vram);
memory_region_add_subregion(sysmem, base + 0x100000, &s->vram);
@@ -528,7 +528,7 @@ static int tcx_init1(SysBusDevice *dev)
int size;
uint8_t *vram_base;
- memory_region_init_ram(&s->vram_mem, "tcx.vram",
+ memory_region_init_ram(&s->vram_mem, NULL, "tcx.vram",
s->vram_size * (1 + 4 + 4));
vmstate_register_ram_global(&s->vram_mem);
vram_base = memory_region_get_ram_ptr(&s->vram_mem);
@@ -536,21 +536,21 @@ static int tcx_init1(SysBusDevice *dev)
/* 8-bit plane */
s->vram = vram_base;
size = s->vram_size;
- memory_region_init_alias(&s->vram_8bit, "tcx.vram.8bit",
+ memory_region_init_alias(&s->vram_8bit, NULL, "tcx.vram.8bit",
&s->vram_mem, vram_offset, size);
sysbus_init_mmio(dev, &s->vram_8bit);
vram_offset += size;
vram_base += size;
/* DAC */
- memory_region_init_io(&s->dac, &tcx_dac_ops, s, "tcx.dac", TCX_DAC_NREGS);
+ memory_region_init_io(&s->dac, NULL, &tcx_dac_ops, s, "tcx.dac", TCX_DAC_NREGS);
sysbus_init_mmio(dev, &s->dac);
/* TEC (dummy) */
- memory_region_init_io(&s->tec, &dummy_ops, s, "tcx.tec", TCX_TEC_NREGS);
+ memory_region_init_io(&s->tec, NULL, &dummy_ops, s, "tcx.tec", TCX_TEC_NREGS);
sysbus_init_mmio(dev, &s->tec);
/* THC: NetBSD writes here even with 8-bit display: dummy */
- memory_region_init_io(&s->thc24, &dummy_ops, s, "tcx.thc24",
+ memory_region_init_io(&s->thc24, NULL, &dummy_ops, s, "tcx.thc24",
TCX_THC_NREGS_24);
sysbus_init_mmio(dev, &s->thc24);
@@ -559,7 +559,7 @@ static int tcx_init1(SysBusDevice *dev)
size = s->vram_size * 4;
s->vram24 = (uint32_t *)vram_base;
s->vram24_offset = vram_offset;
- memory_region_init_alias(&s->vram_24bit, "tcx.vram.24bit",
+ memory_region_init_alias(&s->vram_24bit, NULL, "tcx.vram.24bit",
&s->vram_mem, vram_offset, size);
sysbus_init_mmio(dev, &s->vram_24bit);
vram_offset += size;
@@ -569,14 +569,14 @@ static int tcx_init1(SysBusDevice *dev)
size = s->vram_size * 4;
s->cplane = (uint32_t *)vram_base;
s->cplane_offset = vram_offset;
- memory_region_init_alias(&s->vram_cplane, "tcx.vram.cplane",
+ memory_region_init_alias(&s->vram_cplane, NULL, "tcx.vram.cplane",
&s->vram_mem, vram_offset, size);
sysbus_init_mmio(dev, &s->vram_cplane);
s->con = graphic_console_init(DEVICE(dev), &tcx24_ops, s);
} else {
/* THC 8 bit (dummy) */
- memory_region_init_io(&s->thc8, &dummy_ops, s, "tcx.thc8",
+ memory_region_init_io(&s->thc8, NULL, &dummy_ops, s, "tcx.thc8",
TCX_THC_NREGS_8);
sysbus_init_mmio(dev, &s->thc8);
@@ -105,13 +105,13 @@ static void vga_mm_init(ISAVGAMMState *s, hwaddr vram_base,
s->it_shift = it_shift;
s_ioport_ctrl = g_malloc(sizeof(*s_ioport_ctrl));
- memory_region_init_io(s_ioport_ctrl, &vga_mm_ctrl_ops, s,
+ memory_region_init_io(s_ioport_ctrl, NULL, &vga_mm_ctrl_ops, s,
"vga-mm-ctrl", 0x100000);
memory_region_set_flush_coalesced(s_ioport_ctrl);
vga_io_memory = g_malloc(sizeof(*vga_io_memory));
/* XXX: endianness? */
- memory_region_init_io(vga_io_memory, &vga_mem_ops, &s->vga,
+ memory_region_init_io(vga_io_memory, NULL, &vga_mem_ops, &s->vga,
"vga-mem", 0x20000);
vmstate_register(NULL, 0, &vmstate_vga_common, s);
@@ -157,10 +157,10 @@ static int pci_std_vga_initfn(PCIDevice *dev)
/* mmio bar for vga register access */
if (d->flags & (1 << PCI_VGA_FLAG_ENABLE_MMIO)) {
- memory_region_init(&d->mmio, "vga.mmio", 4096);
- memory_region_init_io(&d->ioport, &pci_vga_ioport_ops, d,
+ memory_region_init(&d->mmio, NULL, "vga.mmio", 4096);
+ memory_region_init_io(&d->ioport, NULL, &pci_vga_ioport_ops, d,
"vga ioports remapped", PCI_VGA_IOPORT_SIZE);
- memory_region_init_io(&d->bochs, &pci_vga_bochs_ops, d,
+ memory_region_init_io(&d->bochs, NULL, &pci_vga_bochs_ops, d,
"bochs dispi interface", PCI_VGA_BOCHS_SIZE);
memory_region_add_subregion(&d->mmio, PCI_VGA_IOPORT_OFFSET,
@@ -198,7 +198,7 @@ static void vga_update_memory_access(VGACommonState *s)
}
base += isa_mem_base;
region = g_malloc(sizeof(*region));
- memory_region_init_alias(region, "vga.chain4", &s->vram, offset, size);
+ memory_region_init_alias(region, NULL, "vga.chain4", &s->vram, offset, size);
memory_region_add_subregion_overlap(s->legacy_address_space, base,
region, 2);
s->chain4_alias = region;
@@ -2292,7 +2292,7 @@ void vga_common_init(VGACommonState *s)
s->vram_size_mb = s->vram_size >> 20;
s->is_vbe_vmstate = 1;
- memory_region_init_ram(&s->vram, "vga.vram", s->vram_size);
+ memory_region_init_ram(&s->vram, NULL, "vga.vram", s->vram_size);
vmstate_register_ram_global(&s->vram);
xen_register_framebuffer(&s->vram);
s->vram_ptr = memory_region_get_ram_ptr(&s->vram);
@@ -2343,7 +2343,7 @@ MemoryRegion *vga_init_io(VGACommonState *s,
*vbe_ports = vbe_portio_list;
vga_mem = g_malloc(sizeof(*vga_mem));
- memory_region_init_io(vga_mem, &vga_mem_ops, s,
+ memory_region_init_io(vga_mem, NULL, &vga_mem_ops, s,
"vga-lowmem", 0x20000);
memory_region_set_flush_coalesced(vga_mem);
@@ -2385,7 +2385,7 @@ void vga_init_vbe(VGACommonState *s, MemoryRegion *system_memory)
/* With pc-0.12 and below we map both the PCI BAR and the fixed VBE region,
* so use an alias to avoid double-mapping the same region.
*/
- memory_region_init_alias(&s->vram_vbe, "vram.vbe",
+ memory_region_init_alias(&s->vram_vbe, NULL, "vram.vbe",
&s->vram, 0, memory_region_size(&s->vram));
/* XXX: use optimized standard vga accesses */
memory_region_add_subregion(system_memory,
@@ -1194,7 +1194,7 @@ static void vmsvga_init(DeviceState *dev, struct vmsvga_state_s *s,
s->vga.con = graphic_console_init(dev, &vmsvga_ops, s);
s->fifo_size = SVGA_FIFO_SIZE;
- memory_region_init_ram(&s->fifo_ram, "vmsvga.fifo", s->fifo_size);
+ memory_region_init_ram(&s->fifo_ram, NULL, "vmsvga.fifo", s->fifo_size);
vmstate_register_ram_global(&s->fifo_ram);
s->fifo_ptr = memory_region_get_ram_ptr(&s->fifo_ram);
@@ -1257,7 +1257,7 @@ static int pci_vmsvga_initfn(PCIDevice *dev)
s->card.config[PCI_LATENCY_TIMER] = 0x40; /* Latency timer */
s->card.config[PCI_INTERRUPT_LINE] = 0xff; /* End */
- memory_region_init_io(&s->io_bar, &vmsvga_io_ops, &s->chip,
+ memory_region_init_io(&s->io_bar, NULL, &vmsvga_io_ops, &s->chip,
"vmsvga-io", 0x10);
memory_region_set_flush_coalesced(&s->io_bar);
pci_register_bar(&s->card, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io_bar);
@@ -773,7 +773,7 @@ void *etraxfs_dmac_init(hwaddr base, int nr_channels)
ctrl->nr_channels = nr_channels;
ctrl->channels = g_malloc0(sizeof ctrl->channels[0] * nr_channels);
- memory_region_init_io(&ctrl->mmio, &dma_ops, ctrl, "etraxfs-dma",
+ memory_region_init_io(&ctrl->mmio, NULL, &dma_ops, ctrl, "etraxfs-dma",
nr_channels * 0x2000);
memory_region_add_subregion(get_system_memory(), base, &ctrl->mmio);
@@ -523,7 +523,7 @@ static void dma_init2(struct dma_cont *d, int base, int dshift,
d->dshift = dshift;
d->cpu_request_exit = cpu_request_exit;
- memory_region_init_io(&d->channel_io, &channel_io_ops, d,
+ memory_region_init_io(&d->channel_io, NULL, &channel_io_ops, d,
"dma-chan", 8 << d->dshift);
memory_region_add_subregion(isa_address_space_io(NULL),
base, &d->channel_io);
@@ -535,7 +535,7 @@ static void dma_init2(struct dma_cont *d, int base, int dshift,
"dma-pageh");
}
- memory_region_init_io(&d->cont_io, &cont_io_ops, d, "dma-cont",
+ memory_region_init_io(&d->cont_io, NULL, &cont_io_ops, d, "dma-cont",
8 << d->dshift);
memory_region_add_subregion(isa_address_space_io(NULL),
base + (8 << d->dshift), &d->cont_io);
@@ -1663,7 +1663,7 @@ struct soc_dma_s *omap_dma_init(hwaddr base, qemu_irq *irqs,
omap_dma_reset(s->dma);
omap_dma_clk_update(s, 0, 1);
- memory_region_init_io(&s->iomem, &omap_dma_ops, s, "omap.dma", memsize);
+ memory_region_init_io(&s->iomem, NULL, &omap_dma_ops, s, "omap.dma", memsize);
memory_region_add_subregion(sysmem, base, &s->iomem);
mpu->drq = s->dma->drq;
@@ -2085,7 +2085,7 @@ struct soc_dma_s *omap_dma4_init(hwaddr base, qemu_irq *irqs,
omap_dma_reset(s->dma);
omap_dma_clk_update(s, 0, !!s->dma->freq);
- memory_region_init_io(&s->iomem, &omap_dma4_ops, s, "omap.dma4", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &omap_dma4_ops, s, "omap.dma4", 0x1000);
memory_region_add_subregion(sysmem, base, &s->iomem);
mpu->drq = s->dma->drq;
@@ -359,7 +359,7 @@ static int pl08x_init(SysBusDevice *dev, int nchannels)
{
pl080_state *s = FROM_SYSBUS(pl080_state, dev);
- memory_region_init_io(&s->iomem, &pl080_ops, s, "pl080", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &pl080_ops, s, "pl080", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
s->nchannels = nchannels;
@@ -1528,7 +1528,7 @@ static void pl330_realize(DeviceState *dev, Error **errp)
PL330State *s = PL330(dev);
sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->irq_abort);
- memory_region_init_io(&s->iomem, &pl330_ops, s, "dma", PL330_IOMEM_SIZE);
+ memory_region_init_io(&s->iomem, NULL, &pl330_ops, s, "dma", PL330_IOMEM_SIZE);
sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem);
s->timer = qemu_new_timer_ns(vm_clock, pl330_exec_cycle_timer, s);
@@ -80,7 +80,7 @@ static int puv3_dma_init(SysBusDevice *dev)
s->reg_CFG[i] = 0x0;
}
- memory_region_init_io(&s->iomem, &puv3_dma_ops, s, "puv3_dma",
+ memory_region_init_io(&s->iomem, NULL, &puv3_dma_ops, s, "puv3_dma",
PUV3_REGS_OFFSET);
sysbus_init_mmio(dev, &s->iomem);
@@ -465,7 +465,7 @@ static int pxa2xx_dma_init(SysBusDevice *dev)
qdev_init_gpio_in(&dev->qdev, pxa2xx_dma_request, PXA2XX_DMA_NUM_REQUESTS);
- memory_region_init_io(&s->iomem, &pxa2xx_dma_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &pxa2xx_dma_ops, s,
"pxa2xx.dma", 0x00010000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
@@ -814,10 +814,10 @@ void *rc4030_init(qemu_irq timer, qemu_irq jazz_bus,
register_savevm(NULL, "rc4030", 0, 2, rc4030_save, rc4030_load, s);
rc4030_reset(s);
- memory_region_init_io(&s->iomem_chipset, &rc4030_ops, s,
+ memory_region_init_io(&s->iomem_chipset, NULL, &rc4030_ops, s,
"rc4030.chipset", 0x300);
memory_region_add_subregion(sysmem, 0x80000000, &s->iomem_chipset);
- memory_region_init_io(&s->iomem_jazzio, &jazzio_ops, s,
+ memory_region_init_io(&s->iomem_jazzio, NULL, &jazzio_ops, s,
"rc4030.jazzio", 0x00001000);
memory_region_add_subregion(sysmem, 0xf0000000, &s->iomem_jazzio);
@@ -274,7 +274,7 @@ static int sparc32_dma_init1(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
reg_size = s->is_ledma ? DMA_ETH_SIZE : DMA_SIZE;
- memory_region_init_io(&s->iomem, &dma_mem_ops, s, "dma", reg_size);
+ memory_region_init_io(&s->iomem, NULL, &dma_mem_ops, s, "dma", reg_size);
sysbus_init_mmio(dev, &s->iomem);
qdev_init_gpio_in(&dev->qdev, dma_set_irq, 1);
@@ -349,7 +349,7 @@ static int iommu_init1(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
- memory_region_init_io(&s->iomem, &iommu_mem_ops, s, "iommu",
+ memory_region_init_io(&s->iomem, NULL, &iommu_mem_ops, s, "iommu",
IOMMU_NREGS * sizeof(uint32_t));
sysbus_init_mmio(dev, &s->iomem);
@@ -590,7 +590,7 @@ static void xilinx_axidma_init(Object *obj)
sysbus_init_irq(sbd, &s->streams[0].irq);
sysbus_init_irq(sbd, &s->streams[1].irq);
- memory_region_init_io(&s->iomem, &axidma_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &axidma_ops, s,
"xlnx.axi-dma", R_MAX * 4 * 2);
sysbus_init_mmio(sbd, &s->iomem);
}
@@ -677,7 +677,7 @@ static int omap_gpio_init(SysBusDevice *dev)
qdev_init_gpio_in(&dev->qdev, omap_gpio_set, 16);
qdev_init_gpio_out(&dev->qdev, s->omap1.handler, 16);
sysbus_init_irq(dev, &s->omap1.irq);
- memory_region_init_io(&s->iomem, &omap_gpio_ops, &s->omap1,
+ memory_region_init_io(&s->iomem, NULL, &omap_gpio_ops, &s->omap1,
"omap.gpio", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
return 0;
@@ -692,7 +692,7 @@ static int omap2_gpio_init(SysBusDevice *dev)
}
if (s->mpu_model < omap3430) {
s->modulecount = (s->mpu_model < omap2430) ? 4 : 5;
- memory_region_init_io(&s->iomem, &omap2_gpif_top_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &omap2_gpif_top_ops, s,
"omap2.gpio", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
} else {
@@ -712,7 +712,7 @@ static int omap2_gpio_init(SysBusDevice *dev)
sysbus_init_irq(dev, &m->irq[0]); /* mpu irq */
sysbus_init_irq(dev, &m->irq[1]); /* dsp irq */
sysbus_init_irq(dev, &m->wkup);
- memory_region_init_io(&m->iomem, &omap2_gpio_module_ops, m,
+ memory_region_init_io(&m->iomem, NULL, &omap2_gpio_module_ops, m,
"omap.gpio-module", 0x1000);
sysbus_init_mmio(dev, &m->iomem);
}
@@ -276,7 +276,7 @@ static int pl061_init(SysBusDevice *dev, const unsigned char *id)
{
pl061_state *s = FROM_SYSBUS(pl061_state, dev);
s->id = id;
- memory_region_init_io(&s->iomem, &pl061_ops, s, "pl061", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &pl061_ops, s, "pl061", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
qdev_init_gpio_in(&dev->qdev, pl061_set_irq, 8);
@@ -112,7 +112,7 @@ static int puv3_gpio_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq[PUV3_IRQS_GPIOLOW7]);
sysbus_init_irq(dev, &s->irq[PUV3_IRQS_GPIOHIGH]);
- memory_region_init_io(&s->iomem, &puv3_gpio_ops, s, "puv3_gpio",
+ memory_region_init_io(&s->iomem, NULL, &puv3_gpio_ops, s, "puv3_gpio",
PUV3_REGS_OFFSET);
sysbus_init_mmio(dev, &s->iomem);
@@ -169,7 +169,7 @@ static int scoop_init(SysBusDevice *dev)
s->status = 0x02;
qdev_init_gpio_out(&s->busdev.qdev, s->handler, 16);
qdev_init_gpio_in(&s->busdev.qdev, scoop_gpio_set, 16);
- memory_region_init_io(&s->iomem, &scoop_ops, s, "scoop", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &scoop_ops, s, "scoop", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
@@ -209,7 +209,7 @@ static int gpio_i2c_init(SysBusDevice *dev)
GPIOI2CState *s = FROM_SYSBUS(GPIOI2CState, dev);
i2c_bus *bus;
- memory_region_init(&s->dummy_iomem, "gpio_i2c", 0);
+ memory_region_init(&s->dummy_iomem, NULL, "gpio_i2c", 0);
sysbus_init_mmio(dev, &s->dummy_iomem);
bus = i2c_init_bus(&dev->qdev, "i2c");
@@ -301,7 +301,7 @@ static int exynos4210_i2c_realize(SysBusDevice *dev)
{
Exynos4210I2CState *s = EXYNOS4_I2C(dev);
- memory_region_init_io(&s->iomem, &exynos4210_i2c_ops, s, TYPE_EXYNOS4_I2C,
+ memory_region_init_io(&s->iomem, NULL, &exynos4210_i2c_ops, s, TYPE_EXYNOS4_I2C,
EXYNOS4_I2C_MEM_SIZE);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
@@ -448,7 +448,7 @@ static int omap_i2c_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
sysbus_init_irq(dev, &s->drq[0]);
sysbus_init_irq(dev, &s->drq[1]);
- memory_region_init_io(&s->iomem, &omap_i2c_ops, s, "omap.i2c",
+ memory_region_init_io(&s->iomem, NULL, &omap_i2c_ops, s, "omap.i2c",
(s->revision < OMAP2_INTR_REV) ? 0x800 : 0x1000);
sysbus_init_mmio(dev, &s->iomem);
s->bus = i2c_init_bus(&dev->qdev, NULL);
@@ -181,5 +181,5 @@ static const MemoryRegionOps pm_smbus_ops = {
void pm_smbus_init(DeviceState *parent, PMSMBus *smb)
{
smb->smbus = i2c_init_bus(parent, "i2c");
- memory_region_init_io(&smb->io, &pm_smbus_ops, smb, "pm-smbus", 64);
+ memory_region_init_io(&smb->io, NULL, &pm_smbus_ops, smb, "pm-smbus", 64);
}
@@ -79,7 +79,7 @@ static int versatile_i2c_init(SysBusDevice *dev)
bus = i2c_init_bus(&dev->qdev, "i2c");
s->bitbang = bitbang_i2c_init(bus);
- memory_region_init_io(&s->iomem, &versatile_i2c_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &versatile_i2c_ops, s,
"versatile_i2c", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
return 0;
@@ -173,7 +173,7 @@ static const MemoryRegionOps kvm_apic_io_ops = {
static void kvm_apic_init(APICCommonState *s)
{
- memory_region_init_io(&s->io_memory, &kvm_apic_io_ops, s, "kvm-apic-msi",
+ memory_region_init_io(&s->io_memory, NULL, &kvm_apic_io_ops, s, "kvm-apic-msi",
APIC_SPACE_SIZE);
if (kvm_has_gsi_routing()) {
@@ -288,7 +288,7 @@ static void kvm_pit_realizefn(DeviceState *dev, Error **errp)
return;
}
- memory_region_init_reservation(&pit->ioports, "kvm-pit", 4);
+ memory_region_init_reservation(&pit->ioports, NULL, "kvm-pit", 4);
qdev_init_gpio_in(dev, kvm_pit_irq_control, 1);
@@ -119,8 +119,8 @@ static void kvm_pic_realize(DeviceState *dev, Error **errp)
PICCommonState *s = PIC_COMMON(dev);
KVMPICClass *kpc = KVM_PIC_GET_CLASS(dev);
- memory_region_init_reservation(&s->base_io, "kvm-pic", 2);
- memory_region_init_reservation(&s->elcr_io, "kvm-elcr", 1);
+ memory_region_init_reservation(&s->base_io, NULL, "kvm-pic", 2);
+ memory_region_init_reservation(&s->elcr_io, NULL, "kvm-elcr", 1);
kpc->parent_realize(dev, errp);
}
@@ -128,7 +128,7 @@ static void kvm_ioapic_set_irq(void *opaque, int irq, int level)
static void kvm_ioapic_init(IOAPICCommonState *s, int instance_no)
{
- memory_region_init_reservation(&s->io_memory, "kvm-ioapic", 0x1000);
+ memory_region_init_reservation(&s->io_memory, NULL, "kvm-ioapic", 0x1000);
qdev_init_gpio_in(&s->busdev.qdev, kvm_ioapic_set_irq, IOAPIC_NUM_PINS);
}
@@ -298,7 +298,7 @@ static void assigned_dev_iomem_setup(PCIDevice *pci_dev, int region_num,
PCIRegion *real_region = &r_dev->real_device.regions[region_num];
if (e_size > 0) {
- memory_region_init(®ion->container, "assigned-dev-container",
+ memory_region_init(®ion->container, NULL, "assigned-dev-container",
e_size);
memory_region_add_subregion(®ion->container, 0, ®ion->real_iomem);
@@ -329,8 +329,8 @@ static void assigned_dev_ioport_setup(PCIDevice *pci_dev, int region_num,
AssignedDevRegion *region = &r_dev->v_addrs[region_num];
region->e_size = size;
- memory_region_init(®ion->container, "assigned-dev-container", size);
- memory_region_init_io(®ion->real_iomem, &assigned_dev_ioport_ops,
+ memory_region_init(®ion->container, NULL, "assigned-dev-container", size);
+ memory_region_init_io(®ion->real_iomem, NULL, &assigned_dev_ioport_ops,
r_dev->v_addrs + region_num,
"assigned-dev-iomem", size);
memory_region_add_subregion(®ion->container, 0, ®ion->real_iomem);
@@ -478,7 +478,7 @@ static int assigned_dev_register_regions(PCIRegion *io_regions,
"4K. You might experience some performance hit "
"due to that.",
i, cur_region->base_addr, cur_region->size);
- memory_region_init_io(&pci_dev->v_addrs[i].real_iomem,
+ memory_region_init_io(&pci_dev->v_addrs[i].real_iomem, NULL,
&slow_bar_ops, &pci_dev->v_addrs[i],
"assigned-dev-slow-bar",
cur_region->size);
@@ -487,7 +487,7 @@ static int assigned_dev_register_regions(PCIRegion *io_regions,
char name[32];
snprintf(name, sizeof(name), "%s.bar%d",
object_get_typename(OBJECT(pci_dev)), i);
- memory_region_init_ram_ptr(&pci_dev->v_addrs[i].real_iomem,
+ memory_region_init_ram_ptr(&pci_dev->v_addrs[i].real_iomem, NULL,
name, cur_region->size,
virtbase);
vmstate_register_ram(&pci_dev->v_addrs[i].real_iomem,
@@ -1650,7 +1650,7 @@ static int assigned_dev_register_msix_mmio(AssignedDevice *dev)
assigned_dev_msix_reset(dev);
- memory_region_init_io(&dev->mmio, &assigned_dev_msix_mmio_ops, dev,
+ memory_region_init_io(&dev->mmio, NULL, &assigned_dev_msix_mmio_ops, dev,
"assigned-dev-msix", MSIX_PAGE_SIZE);
return 0;
}
@@ -1916,7 +1916,7 @@ static void assigned_dev_load_option_rom(AssignedDevice *dev)
snprintf(name, sizeof(name), "%s.rom",
object_get_typename(OBJECT(dev)));
- memory_region_init_ram(&dev->dev.rom, name, st.st_size);
+ memory_region_init_ram(&dev->dev.rom, NULL, name, st.st_size);
vmstate_register_ram(&dev->dev.rom, &dev->dev.qdev);
ptr = memory_region_get_ram_ptr(&dev->dev.rom);
memset(ptr, 0xff, st.st_size);
@@ -601,7 +601,7 @@ static void vapic_map_rom_writable(VAPICROMState *s)
rom_paddr &= TARGET_PAGE_MASK;
rom_size = TARGET_PAGE_ALIGN(rom_size);
- memory_region_init_alias(&s->rom, "kvmvapic-rom", section.mr, rom_paddr,
+ memory_region_init_alias(&s->rom, NULL, "kvmvapic-rom", section.mr, rom_paddr,
rom_size);
memory_region_add_subregion_overlap(as, rom_paddr, &s->rom, 1000);
s->rom_mapped_writable = true;
@@ -702,7 +702,7 @@ static int vapic_init(SysBusDevice *dev)
{
VAPICROMState *s = VAPIC(dev);
- memory_region_init_io(&s->io, &vapic_ops, s, "kvmvapic", 2);
+ memory_region_init_io(&s->io, NULL, &vapic_ops, s, "kvmvapic", 2);
sysbus_add_io(dev, VAPIC_IO_PORT, &s->io);
sysbus_init_ioports(dev, VAPIC_IO_PORT, 2);
@@ -525,7 +525,7 @@ static void port92_initfn(Object *obj)
{
Port92State *s = PORT92(obj);
- memory_region_init_io(&s->io, &port92_ops, s, "port92", 1);
+ memory_region_init_io(&s->io, NULL, &port92_ops, s, "port92", 1);
s->outport = 0;
}
@@ -1044,17 +1044,17 @@ FWCfgState *pc_memory_init(MemoryRegion *system_memory,
* with older qemus that used qemu_ram_alloc().
*/
ram = g_malloc(sizeof(*ram));
- memory_region_init_ram(ram, "pc.ram",
+ memory_region_init_ram(ram, NULL, "pc.ram",
below_4g_mem_size + above_4g_mem_size);
vmstate_register_ram_global(ram);
*ram_memory = ram;
ram_below_4g = g_malloc(sizeof(*ram_below_4g));
- memory_region_init_alias(ram_below_4g, "ram-below-4g", ram,
+ memory_region_init_alias(ram_below_4g, NULL, "ram-below-4g", ram,
0, below_4g_mem_size);
memory_region_add_subregion(system_memory, 0, ram_below_4g);
if (above_4g_mem_size > 0) {
ram_above_4g = g_malloc(sizeof(*ram_above_4g));
- memory_region_init_alias(ram_above_4g, "ram-above-4g", ram,
+ memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g", ram,
below_4g_mem_size, above_4g_mem_size);
memory_region_add_subregion(system_memory, 0x100000000ULL,
ram_above_4g);
@@ -1065,7 +1065,7 @@ FWCfgState *pc_memory_init(MemoryRegion *system_memory,
pc_system_firmware_init(rom_memory);
option_rom_mr = g_malloc(sizeof(*option_rom_mr));
- memory_region_init_ram(option_rom_mr, "pc.rom", PC_ROM_SIZE);
+ memory_region_init_ram(option_rom_mr, NULL, "pc.rom", PC_ROM_SIZE);
vmstate_register_ram_global(option_rom_mr);
memory_region_add_subregion_overlap(rom_memory,
PC_ROM_MIN_VGA,
@@ -1150,10 +1150,10 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
MemoryRegion *ioport80_io = g_new(MemoryRegion, 1);
MemoryRegion *ioportF0_io = g_new(MemoryRegion, 1);
- memory_region_init_io(ioport80_io, &ioport80_io_ops, NULL, "ioport80", 1);
+ memory_region_init_io(ioport80_io, NULL, &ioport80_io_ops, NULL, "ioport80", 1);
memory_region_add_subregion(isa_bus->address_space_io, 0x80, ioport80_io);
- memory_region_init_io(ioportF0_io, &ioportF0_io_ops, NULL, "ioportF0", 1);
+ memory_region_init_io(ioportF0_io, NULL, &ioportF0_io_ops, NULL, "ioportF0", 1);
memory_region_add_subregion(isa_bus->address_space_io, 0xf0, ioportF0_io);
/*
@@ -117,7 +117,7 @@ static void pc_init1(MemoryRegion *system_memory,
if (pci_enabled) {
pci_memory = g_new(MemoryRegion, 1);
- memory_region_init(pci_memory, "pci", INT64_MAX);
+ memory_region_init(pci_memory, NULL, "pci", INT64_MAX);
rom_memory = pci_memory;
} else {
pci_memory = NULL;
@@ -98,7 +98,7 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
/* pci enabled */
if (pci_enabled) {
pci_memory = g_new(MemoryRegion, 1);
- memory_region_init(pci_memory, "pci", INT64_MAX);
+ memory_region_init(pci_memory, NULL, "pci", INT64_MAX);
rom_memory = pci_memory;
} else {
pci_memory = NULL;
@@ -1156,8 +1156,8 @@ void ahci_init(AHCIState *s, DeviceState *qdev, AddressSpace *as, int ports)
s->dev = g_malloc0(sizeof(AHCIDevice) * ports);
ahci_reg_init(s);
/* XXX BAR size should be 1k, but that breaks, so bump it to 4k for now */
- memory_region_init_io(&s->mem, &ahci_mem_ops, s, "ahci", AHCI_MEM_BAR_SIZE);
- memory_region_init_io(&s->idp, &ahci_idp_ops, s, "ahci-idp", 32);
+ memory_region_init_io(&s->mem, NULL, &ahci_mem_ops, s, "ahci", AHCI_MEM_BAR_SIZE);
+ memory_region_init_io(&s->idp, NULL, &ahci_idp_ops, s, "ahci-idp", 32);
irqs = qemu_allocate_irqs(ahci_irq_set, s, s->ports);
@@ -117,8 +117,8 @@ static void setup_cmd646_bar(PCIIDEState *d, int bus_num)
bar->bus = bus;
bar->pci_dev = d;
- memory_region_init_io(&bar->cmd, &cmd646_cmd_ops, bar, "cmd646-cmd", 4);
- memory_region_init_io(&bar->data, &cmd646_data_ops, bar, "cmd646-data", 8);
+ memory_region_init_io(&bar->cmd, NULL, &cmd646_cmd_ops, bar, "cmd646-cmd", 4);
+ memory_region_init_io(&bar->data, NULL, &cmd646_data_ops, bar, "cmd646-data", 8);
}
static uint64_t bmdma_read(void *opaque, hwaddr addr,
@@ -203,13 +203,13 @@ static void bmdma_setup_bar(PCIIDEState *d)
BMDMAState *bm;
int i;
- memory_region_init(&d->bmdma_bar, "cmd646-bmdma", 16);
+ memory_region_init(&d->bmdma_bar, NULL, "cmd646-bmdma", 16);
for(i = 0;i < 2; i++) {
bm = &d->bmdma[i];
- memory_region_init_io(&bm->extra_io, &cmd646_bmdma_ops, bm,
+ memory_region_init_io(&bm->extra_io, NULL, &cmd646_bmdma_ops, bm,
"cmd646-bmdma-bus", 4);
memory_region_add_subregion(&d->bmdma_bar, i * 8, &bm->extra_io);
- memory_region_init_io(&bm->addr_ioport, &bmdma_addr_ioport_ops, bm,
+ memory_region_init_io(&bm->addr_ioport, NULL, &bmdma_addr_ioport_ops, bm,
"cmd646-bmdma-ioport", 4);
memory_region_add_subregion(&d->bmdma_bar, i * 8 + 4, &bm->addr_ioport);
}
@@ -335,7 +335,7 @@ static void macio_ide_initfn(Object *obj)
MACIOIDEState *s = MACIO_IDE(obj);
ide_bus_new(&s->bus, DEVICE(obj), 0, 2);
- memory_region_init_io(&s->mem, &pmac_ide_ops, s, "pmac-ide", 0x1000);
+ memory_region_init_io(&s->mem, NULL, &pmac_ide_ops, s, "pmac-ide", 0x1000);
sysbus_init_mmio(d, &s->mem);
sysbus_init_irq(d, &s->irq);
sysbus_init_irq(d, &s->dma_irq);
@@ -124,9 +124,9 @@ static void mmio_ide_realizefn(DeviceState *dev, Error **errp)
ide_init2(&s->bus, s->irq);
- memory_region_init_io(&s->iomem1, &mmio_ide_ops, s,
+ memory_region_init_io(&s->iomem1, NULL, &mmio_ide_ops, s,
"ide-mmio.1", 16 << s->shift);
- memory_region_init_io(&s->iomem2, &mmio_ide_cs_ops, s,
+ memory_region_init_io(&s->iomem2, NULL, &mmio_ide_cs_ops, s,
"ide-mmio.2", 2 << s->shift);
sysbus_init_mmio(d, &s->iomem1);
sysbus_init_mmio(d, &s->iomem2);
@@ -90,14 +90,14 @@ static void bmdma_setup_bar(PCIIDEState *d)
{
int i;
- memory_region_init(&d->bmdma_bar, "piix-bmdma-container", 16);
+ memory_region_init(&d->bmdma_bar, NULL, "piix-bmdma-container", 16);
for(i = 0;i < 2; i++) {
BMDMAState *bm = &d->bmdma[i];
- memory_region_init_io(&bm->extra_io, &piix_bmdma_ops, bm,
+ memory_region_init_io(&bm->extra_io, NULL, &piix_bmdma_ops, bm,
"piix-bmdma", 4);
memory_region_add_subregion(&d->bmdma_bar, i * 8, &bm->extra_io);
- memory_region_init_io(&bm->addr_ioport, &bmdma_addr_ioport_ops, bm,
+ memory_region_init_io(&bm->addr_ioport, NULL, &bmdma_addr_ioport_ops, bm,
"bmdma", 4);
memory_region_add_subregion(&d->bmdma_bar, i * 8 + 4, &bm->addr_ioport);
}
@@ -92,14 +92,14 @@ static void bmdma_setup_bar(PCIIDEState *d)
{
int i;
- memory_region_init(&d->bmdma_bar, "via-bmdma-container", 16);
+ memory_region_init(&d->bmdma_bar, NULL, "via-bmdma-container", 16);
for(i = 0;i < 2; i++) {
BMDMAState *bm = &d->bmdma[i];
- memory_region_init_io(&bm->extra_io, &via_bmdma_ops, bm,
+ memory_region_init_io(&bm->extra_io, NULL, &via_bmdma_ops, bm,
"via-bmdma", 4);
memory_region_add_subregion(&d->bmdma_bar, i * 8, &bm->extra_io);
- memory_region_init_io(&bm->addr_ioport, &bmdma_addr_ioport_ops, bm,
+ memory_region_init_io(&bm->addr_ioport, NULL, &bmdma_addr_ioport_ops, bm,
"bmdma", 4);
memory_region_add_subregion(&d->bmdma_bar, i * 8 + 4, &bm->addr_ioport);
}
@@ -265,17 +265,17 @@ static int milkymist_softusb_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
- memory_region_init_io(&s->regs_region, &softusb_mmio_ops, s,
+ memory_region_init_io(&s->regs_region, NULL, &softusb_mmio_ops, s,
"milkymist-softusb", R_MAX * 4);
sysbus_init_mmio(dev, &s->regs_region);
/* register pmem and dmem */
- memory_region_init_ram(&s->pmem, "milkymist-softusb.pmem",
+ memory_region_init_ram(&s->pmem, NULL, "milkymist-softusb.pmem",
s->pmem_size);
vmstate_register_ram_global(&s->pmem);
s->pmem_ptr = memory_region_get_ram_ptr(&s->pmem);
sysbus_init_mmio(dev, &s->pmem);
- memory_region_init_ram(&s->dmem, "milkymist-softusb.dmem",
+ memory_region_init_ram(&s->dmem, NULL, "milkymist-softusb.dmem",
s->dmem_size);
vmstate_register_ram_global(&s->dmem);
s->dmem_ptr = memory_region_get_ram_ptr(&s->dmem);
@@ -424,7 +424,7 @@ void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
vmstate_register(NULL, 0, &vmstate_kbd, s);
- memory_region_init_io(region, &i8042_mmio_ops, s, "i8042", size);
+ memory_region_init_io(region, NULL, &i8042_mmio_ops, s, "i8042", size);
s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);
@@ -494,8 +494,8 @@ static void i8042_initfn(Object *obj)
ISAKBDState *isa_s = I8042(obj);
KBDState *s = &isa_s->kbd;
- memory_region_init_io(isa_s->io + 0, &i8042_data_ops, s, "i8042-data", 1);
- memory_region_init_io(isa_s->io + 1, &i8042_cmd_ops, s, "i8042-cmd", 1);
+ memory_region_init_io(isa_s->io + 0, NULL, &i8042_data_ops, s, "i8042-data", 1);
+ memory_region_init_io(isa_s->io + 1, NULL, &i8042_cmd_ops, s, "i8042-cmd", 1);
}
static void i8042_realizefn(DeviceState *dev, Error **errp)
@@ -137,7 +137,7 @@ static int pl050_init(SysBusDevice *dev, int is_mouse)
{
pl050_state *s = FROM_SYSBUS(pl050_state, dev);
- memory_region_init_io(&s->iomem, &pl050_ops, s, "pl050", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &pl050_ops, s, "pl050", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
s->is_mouse = is_mouse;
@@ -313,7 +313,7 @@ PXA2xxKeyPadState *pxa27x_keypad_init(MemoryRegion *sysmem,
s = (PXA2xxKeyPadState *) g_malloc0(sizeof(PXA2xxKeyPadState));
s->irq = irq;
- memory_region_init_io(&s->iomem, &pxa2xx_keypad_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &pxa2xx_keypad_ops, s,
"pxa2xx-keypad", 0x00100000);
memory_region_add_subregion(sysmem, base, &s->iomem);
@@ -873,7 +873,7 @@ static const MemoryRegionOps apic_io_ops = {
static void apic_init(APICCommonState *s)
{
- memory_region_init_io(&s->io_memory, &apic_io_ops, s, "apic-msi",
+ memory_region_init_io(&s->io_memory, NULL, &apic_io_ops, s, "apic-msi",
APIC_SPACE_SIZE);
s->timer = qemu_new_timer_ns(vm_clock, apic_timer, s);
@@ -656,7 +656,7 @@ void gic_init_irqs_and_distributor(GICState *s, int num_irq)
for (i = 0; i < NUM_CPU(s); i++) {
sysbus_init_irq(&s->busdev, &s->parent_irq[i]);
}
- memory_region_init_io(&s->iomem, &gic_dist_ops, s, "gic_dist", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &gic_dist_ops, s, "gic_dist", 0x1000);
}
static void arm_gic_realize(DeviceState *dev, Error **errp)
@@ -682,11 +682,11 @@ static void arm_gic_realize(DeviceState *dev, Error **errp)
* GIC v2 defines a larger memory region (0x1000) so this will need
* to be extended when we implement A15.
*/
- memory_region_init_io(&s->cpuiomem[0], &gic_thiscpu_ops, s,
+ memory_region_init_io(&s->cpuiomem[0], NULL, &gic_thiscpu_ops, s,
"gic_cpu", 0x100);
for (i = 0; i < NUM_CPU(s); i++) {
s->backref[i] = s;
- memory_region_init_io(&s->cpuiomem[i+1], &gic_cpu_ops, &s->backref[i],
+ memory_region_init_io(&s->cpuiomem[i+1], NULL, &gic_cpu_ops, &s->backref[i],
"gic_cpu", 0x100);
}
/* Distributor */
@@ -120,7 +120,7 @@ static void kvm_arm_gic_realize(DeviceState *dev, Error **errp)
sysbus_init_irq(sbd, &s->parent_irq[i]);
}
/* Distributor */
- memory_region_init_reservation(&s->iomem, "kvm-gic_dist", 0x1000);
+ memory_region_init_reservation(&s->iomem, NULL, "kvm-gic_dist", 0x1000);
sysbus_init_mmio(sbd, &s->iomem);
kvm_arm_register_device(&s->iomem,
(KVM_ARM_DEVICE_VGIC_V2 << KVM_ARM_DEVICE_ID_SHIFT)
@@ -129,7 +129,7 @@ static void kvm_arm_gic_realize(DeviceState *dev, Error **errp)
* provide the "interface for core #N" memory regions, because
* cores with a VGIC don't have those.
*/
- memory_region_init_reservation(&s->cpuiomem[0], "kvm-gic_cpu", 0x1000);
+ memory_region_init_reservation(&s->cpuiomem[0], NULL, "kvm-gic_cpu", 0x1000);
sysbus_init_mmio(sbd, &s->cpuiomem[0]);
kvm_arm_register_device(&s->cpuiomem[0],
(KVM_ARM_DEVICE_VGIC_V2 << KVM_ARM_DEVICE_ID_SHIFT)
@@ -487,17 +487,17 @@ static void armv7m_nvic_realize(DeviceState *dev, Error **errp)
* We use overlaying to put the GIC like registers
* over the top of the system control register region.
*/
- memory_region_init(&s->container, "nvic", 0x1000);
+ memory_region_init(&s->container, NULL, "nvic", 0x1000);
/* The system register region goes at the bottom of the priority
* stack as it covers the whole page.
*/
- memory_region_init_io(&s->sysregmem, &nvic_sysreg_ops, s,
+ memory_region_init_io(&s->sysregmem, NULL, &nvic_sysreg_ops, s,
"nvic_sysregs", 0x1000);
memory_region_add_subregion(&s->container, 0, &s->sysregmem);
/* Alias the GIC region so we can get only the section of it
* we need, and layer it on top of the system register region.
*/
- memory_region_init_alias(&s->gic_iomem_alias, "nvic-gic", &s->gic.iomem,
+ memory_region_init_alias(&s->gic_iomem_alias, NULL, "nvic-gic", &s->gic.iomem,
0x100, 0xc00);
memory_region_add_subregion_overlap(&s->container, 0x100,
&s->gic_iomem_alias, 1);
@@ -146,7 +146,7 @@ static int etraxfs_pic_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->parent_irq);
sysbus_init_irq(dev, &s->parent_nmi);
- memory_region_init_io(&s->mmio, &pic_ops, s, "etraxfs-pic", R_MAX * 4);
+ memory_region_init_io(&s->mmio, NULL, &pic_ops, s, "etraxfs-pic", R_MAX * 4);
sysbus_init_mmio(dev, &s->mmio);
return 0;
}
@@ -417,7 +417,7 @@ static int exynos4210_combiner_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->output_irq[i]);
}
- memory_region_init_io(&s->iomem, &exynos4210_combiner_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &exynos4210_combiner_ops, s,
"exynos4210-combiner", IIC_REGION_SIZE);
sysbus_init_mmio(dev, &s->iomem);
@@ -299,15 +299,15 @@ static int exynos4210_gic_init(SysBusDevice *dev)
qdev_init_gpio_in(&s->busdev.qdev, exynos4210_gic_set_irq,
EXYNOS4210_GIC_NIRQ - 32);
- memory_region_init(&s->cpu_container, "exynos4210-cpu-container",
+ memory_region_init(&s->cpu_container, NULL, "exynos4210-cpu-container",
EXYNOS4210_EXT_GIC_CPU_REGION_SIZE);
- memory_region_init(&s->dist_container, "exynos4210-dist-container",
+ memory_region_init(&s->dist_container, NULL, "exynos4210-dist-container",
EXYNOS4210_EXT_GIC_DIST_REGION_SIZE);
for (i = 0; i < s->num_cpu; i++) {
/* Map CPU interface per SMP Core */
sprintf(cpu_alias_name, "%s%x", cpu_prefix, i);
- memory_region_init_alias(&s->cpu_alias[i],
+ memory_region_init_alias(&s->cpu_alias[i], NULL,
cpu_alias_name,
sysbus_mmio_get_region(busdev, 1),
0,
@@ -317,7 +317,7 @@ static int exynos4210_gic_init(SysBusDevice *dev)
/* Map Distributor per SMP Core */
sprintf(dist_alias_name, "%s%x", dist_prefix, i);
- memory_region_init_alias(&s->dist_alias[i],
+ memory_region_init_alias(&s->dist_alias[i], NULL,
dist_alias_name,
sysbus_mmio_get_region(busdev, 0),
0,
@@ -344,7 +344,7 @@ static int grlib_irqmp_init(SysBusDevice *dev)
return -1;
}
- memory_region_init_io(&irqmp->iomem, &grlib_irqmp_ops, irqmp,
+ memory_region_init_io(&irqmp->iomem, NULL, &grlib_irqmp_ops, irqmp,
"irqmp", IRQMP_REG_SIZE);
irqmp->state = g_malloc0(sizeof *irqmp->state);
@@ -205,7 +205,7 @@ qemu_irq *heathrow_pic_init(MemoryRegion **pmem,
s = g_malloc0(sizeof(HeathrowPICS));
/* only 1 CPU */
s->irqs = irqs[0];
- memory_region_init_io(&s->mem, &heathrow_pic_ops, s,
+ memory_region_init_io(&s->mem, NULL, &heathrow_pic_ops, s,
"heathrow-pic", 0x1000);
*pmem = &s->mem;
@@ -417,8 +417,8 @@ static void pic_realize(DeviceState *dev, Error **err)
PICCommonState *s = PIC_COMMON(dev);
PICClass *pc = PIC_GET_CLASS(dev);
- memory_region_init_io(&s->base_io, &pic_base_ioport_ops, s, "pic", 2);
- memory_region_init_io(&s->elcr_io, &pic_elcr_ioport_ops, s, "elcr", 1);
+ memory_region_init_io(&s->base_io, NULL, &pic_base_ioport_ops, s, "pic", 2);
+ memory_region_init_io(&s->elcr_io, NULL, &pic_elcr_ioport_ops, s, "elcr", 1);
qdev_init_gpio_out(dev, s->int_out, ARRAY_SIZE(s->int_out));
qdev_init_gpio_in(dev, pic_set_irq, 8);
@@ -372,7 +372,7 @@ static int imx_avic_init(SysBusDevice *dev)
{
IMXAVICState *s = FROM_SYSBUS(IMXAVICState, dev);
- memory_region_init_io(&s->iomem, &imx_avic_ops, s, "imx_avic", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &imx_avic_ops, s, "imx_avic", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
qdev_init_gpio_in(&dev->qdev, imx_avic_set_irq, IMX_AVIC_NUM_IRQS);
@@ -227,7 +227,7 @@ static const MemoryRegionOps ioapic_io_ops = {
static void ioapic_init(IOAPICCommonState *s, int instance_no)
{
- memory_region_init_io(&s->io_memory, &ioapic_io_ops, s, "ioapic", 0x1000);
+ memory_region_init_io(&s->io_memory, NULL, &ioapic_io_ops, s, "ioapic", 0x1000);
qdev_init_gpio_in(&s->busdev.qdev, ioapic_set_irq, IOAPIC_NUM_PINS);
@@ -367,7 +367,7 @@ static int omap_intc_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->parent_intr[0]);
sysbus_init_irq(dev, &s->parent_intr[1]);
qdev_init_gpio_in(&dev->qdev, omap_set_intr, s->nbanks * 32);
- memory_region_init_io(&s->mmio, &omap_inth_mem_ops, s,
+ memory_region_init_io(&s->mmio, NULL, &omap_inth_mem_ops, s,
"omap-intc", s->size);
sysbus_init_mmio(dev, &s->mmio);
return 0;
@@ -609,7 +609,7 @@ static int omap2_intc_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->parent_intr[0]);
sysbus_init_irq(dev, &s->parent_intr[1]);
qdev_init_gpio_in(&dev->qdev, omap_set_intr_noedge, s->nbanks * 32);
- memory_region_init_io(&s->mmio, &omap2_inth_mem_ops, s,
+ memory_region_init_io(&s->mmio, NULL, &omap2_inth_mem_ops, s,
"omap2-intc", 0x1000);
sysbus_init_mmio(dev, &s->mmio);
return 0;
@@ -1515,7 +1515,7 @@ static void map_list(OpenPICState *opp, const MemReg *list, int *count)
while (list->name) {
assert(*count < ARRAY_SIZE(opp->sub_io_mem));
- memory_region_init_io(&opp->sub_io_mem[*count], list->ops, opp,
+ memory_region_init_io(&opp->sub_io_mem[*count], NULL, list->ops, opp,
list->name, list->size);
memory_region_add_subregion(&opp->mem, list->start_addr,
@@ -1561,7 +1561,7 @@ static int openpic_init(SysBusDevice *dev)
{NULL}
};
- memory_region_init(&opp->mem, "openpic", 0x40000);
+ memory_region_init(&opp->mem, NULL, "openpic", 0x40000);
switch (opp->model) {
case OPENPIC_MODEL_FSL_MPIC_20:
@@ -236,7 +236,7 @@ static int pl190_init(SysBusDevice *dev)
{
pl190_state *s = FROM_SYSBUS(pl190_state, dev);
- memory_region_init_io(&s->iomem, &pl190_ops, s, "pl190", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &pl190_ops, s, "pl190", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
qdev_init_gpio_in(&dev->qdev, pl190_set_irq, 32);
sysbus_init_irq(dev, &s->irq);
@@ -106,7 +106,7 @@ static int puv3_intc_init(SysBusDevice *dev)
s->reg_ICMR = 0;
s->reg_ICPR = 0;
- memory_region_init_io(&s->iomem, &puv3_intc_ops, s, "puv3_intc",
+ memory_region_init_io(&s->iomem, NULL, &puv3_intc_ops, s, "puv3_intc",
PUV3_REGS_OFFSET);
sysbus_init_mmio(dev, &s->iomem);
@@ -43,7 +43,7 @@ static int realview_gic_init(SysBusDevice *dev)
/* Pass through inbound GPIO lines to the GIC */
qdev_init_gpio_in(&s->busdev.qdev, realview_gic_set_irq, numirq - 32);
- memory_region_init(&s->container, "realview-gic-container", 0x2000);
+ memory_region_init(&s->container, NULL, "realview-gic-container", 0x2000);
memory_region_add_subregion(&s->container, 0,
sysbus_mmio_get_region(busdev, 1));
memory_region_add_subregion(&s->container, 0x1000,
@@ -319,11 +319,11 @@ static unsigned int sh_intc_register(MemoryRegion *sysmem,
#define SH_INTC_IOMEM_FORMAT "interrupt-controller-%s-%s-%s"
snprintf(name, sizeof(name), SH_INTC_IOMEM_FORMAT, type, action, "p4");
- memory_region_init_alias(iomem_p4, name, iomem, INTC_A7(address), 4);
+ memory_region_init_alias(iomem_p4, NULL, name, iomem, INTC_A7(address), 4);
memory_region_add_subregion(sysmem, P4ADDR(address), iomem_p4);
snprintf(name, sizeof(name), SH_INTC_IOMEM_FORMAT, type, action, "a7");
- memory_region_init_alias(iomem_a7, name, iomem, INTC_A7(address), 4);
+ memory_region_init_alias(iomem_a7, NULL, name, iomem, INTC_A7(address), 4);
memory_region_add_subregion(sysmem, A7ADDR(address), iomem_a7);
#undef SH_INTC_IOMEM_FORMAT
@@ -466,7 +466,7 @@ int sh_intc_init(MemoryRegion *sysmem,
desc->irqs = qemu_allocate_irqs(sh_intc_set_irq, desc, nr_sources);
- memory_region_init_io(&desc->iomem, &sh_intc_ops, desc,
+ memory_region_init_io(&desc->iomem, NULL, &sh_intc_ops, desc,
"interrupt-controller", 0x100000000ULL);
#define INT_REG_PARAMS(reg_struct, type, action, j) \
@@ -426,7 +426,7 @@ static int slavio_intctl_init1(SysBusDevice *dev)
char slave_name[45];
qdev_init_gpio_in(&dev->qdev, slavio_set_irq_all, 32 + MAX_CPUS);
- memory_region_init_io(&s->iomem, &slavio_intctlm_mem_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &slavio_intctlm_mem_ops, s,
"master-interrupt-controller", INTCTLM_SIZE);
sysbus_init_mmio(dev, &s->iomem);
@@ -436,7 +436,7 @@ static int slavio_intctl_init1(SysBusDevice *dev)
for (j = 0; j < MAX_PILS; j++) {
sysbus_init_irq(dev, &s->cpu_irqs[i][j]);
}
- memory_region_init_io(&s->slaves[i].iomem, &slavio_intctl_mem_ops,
+ memory_region_init_io(&s->slaves[i].iomem, NULL, &slavio_intctl_mem_ops,
&s->slaves[i], slave_name, INTCTL_SIZE);
sysbus_init_mmio(dev, &s->slaves[i].iomem);
s->slaves[i].cpu = i;
@@ -160,7 +160,7 @@ static int xilinx_intc_init(SysBusDevice *dev)
qdev_init_gpio_in(&dev->qdev, irq_handler, 32);
sysbus_init_irq(dev, &p->parent_irq);
- memory_region_init_io(&p->mmio, &pic_ops, p, "xlnx.xps-intc", R_MAX * 4);
+ memory_region_init_io(&p->mmio, NULL, &pic_ops, p, "xlnx.xps-intc", R_MAX * 4);
sysbus_init_mmio(dev, &p->mmio);
return 0;
}
@@ -96,7 +96,7 @@ void apm_init(PCIDevice *dev, APMState *apm, apm_ctrl_changed_t callback,
apm->arg = arg;
/* ioport 0xb2, 0xb3 */
- memory_region_init_io(&apm->io, &apm_ops, apm, "apm-io", 2);
+ memory_region_init_io(&apm->io, NULL, &apm_ops, apm, "apm-io", 2);
memory_region_add_subregion(pci_address_space_io(dev), APM_CNT_IOPORT,
&apm->io);
}
@@ -221,10 +221,10 @@ static int pci_i82378_init(PCIDevice *dev)
pci_conf[PCI_INTERRUPT_PIN] = 1; /* interrupt pin 0 */
- memory_region_init_io(&s->io, &i82378_io_ops, s, "i82378-io", 0x00010000);
+ memory_region_init_io(&s->io, NULL, &i82378_io_ops, s, "i82378-io", 0x00010000);
pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->io);
- memory_region_init_io(&s->mem, &i82378_mem_ops, s, "i82378-mem", 0x01000000);
+ memory_region_init_io(&s->mem, NULL, &i82378_mem_ops, s, "i82378-mem", 0x01000000);
pci_register_bar(dev, 1, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mem);
/* Make I/O address read only */
@@ -69,7 +69,7 @@ static const MemoryRegionOps isa_mmio_ops = {
void isa_mmio_setup(MemoryRegion *mr, hwaddr size)
{
- memory_region_init_io(mr, &isa_mmio_ops, NULL, "isa-mmio", size);
+ memory_region_init_io(mr, NULL, &isa_mmio_ops, NULL, "isa-mmio", size);
}
void isa_mmio_init(hwaddr base, hwaddr size)
@@ -535,7 +535,7 @@ static int ich9_lpc_initfn(PCIDevice *d)
pci_set_long(d->wmask + ICH9_LPC_PMBASE,
ICH9_LPC_PMBASE_BASE_ADDRESS_MASK);
- memory_region_init_io(&lpc->rbca_mem, &rbca_mmio_ops, lpc,
+ memory_region_init_io(&lpc->rbca_mem, NULL, &rbca_mmio_ops, lpc,
"lpc-rbca-mmio", ICH9_CC_SIZE);
lpc->isa_bus = isa_bus;
@@ -546,7 +546,7 @@ static int ich9_lpc_initfn(PCIDevice *d)
lpc->machine_ready.notify = ich9_lpc_machine_ready;
qemu_add_machine_init_done_notifier(&lpc->machine_ready);
- memory_region_init_io(&lpc->rst_cnt_mem, &ich9_rst_cnt_ops, lpc,
+ memory_region_init_io(&lpc->rst_cnt_mem, NULL, &ich9_rst_cnt_ops, lpc,
"lpc-reset-control", 1);
memory_region_add_subregion_overlap(pci_address_space_io(d),
ICH9_RST_CNT_IOPORT, &lpc->rst_cnt_mem,
@@ -352,7 +352,7 @@ static void pc87312_initfn(Object *obj)
{
PC87312State *s = PC87312(obj);
- memory_region_init_io(&s->io, &pc87312_io_ops, s, "pc87312", 2);
+ memory_region_init_io(&s->io, NULL, &pc87312_io_ops, s, "pc87312", 2);
}
static const VMStateDescription vmstate_pc87312 = {
@@ -356,7 +356,7 @@ static int vt82c686b_pm_initfn(PCIDevice *dev)
apm_init(dev, &s->apm, NULL, s);
- memory_region_init(&s->io, "vt82c686-pm", 64);
+ memory_region_init(&s->io, NULL, "vt82c686-pm", 64);
memory_region_set_enabled(&s->io, false);
memory_region_add_subregion(get_system_io(), 0, &s->io);
@@ -443,8 +443,8 @@ static int vt82c686b_initfn(PCIDevice *d)
}
}
- memory_region_init_io(&vt82c->superio, &superio_ops, &vt82c->superio_conf,
- "superio", 2);
+ memory_region_init_io(&vt82c->superio, NULL, &superio_ops,
+ &vt82c->superio_conf, "superio", 2);
memory_region_set_enabled(&vt82c->superio, false);
/* The floppy also uses 0x3f0 and 0x3f1.
* But we do not emulate a floppy, so just set it here. */
@@ -106,7 +106,7 @@ static void lm32_evr_init(QEMUMachineInitArgs *args)
reset_info->flash_base = flash_base;
- memory_region_init_ram(phys_ram, "lm32_evr.sdram", ram_size);
+ memory_region_init_ram(phys_ram, NULL, "lm32_evr.sdram", ram_size);
vmstate_register_ram_global(phys_ram);
memory_region_add_subregion(address_space_mem, ram_base, phys_ram);
@@ -203,7 +203,7 @@ static void lm32_uclinux_init(QEMUMachineInitArgs *args)
reset_info->flash_base = flash_base;
- memory_region_init_ram(phys_ram, "lm32_uclinux.sdram", ram_size);
+ memory_region_init_ram(phys_ram, NULL, "lm32_uclinux.sdram", ram_size);
vmstate_register_ram_global(phys_ram);
memory_region_add_subregion(address_space_mem, ram_base, phys_ram);
@@ -112,7 +112,7 @@ milkymist_init(QEMUMachineInitArgs *args)
cpu_lm32_set_phys_msb_ignore(env, 1);
- memory_region_init_ram(phys_sdram, "milkymist.sdram", sdram_size);
+ memory_region_init_ram(phys_sdram, NULL, "milkymist.sdram", sdram_size);
vmstate_register_ram_global(phys_sdram);
memory_region_add_subregion(address_space_mem, sdram_base, phys_sdram);
@@ -49,12 +49,12 @@ static void an5206_init(QEMUMachineInitArgs *args)
env->rambar0 = AN5206_RAMBAR_ADDR | 1;
/* DRAM at address zero */
- memory_region_init_ram(ram, "an5206.ram", ram_size);
+ memory_region_init_ram(ram, NULL, "an5206.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, 0, ram);
/* Internal SRAM. */
- memory_region_init_ram(sram, "an5206.sram", 512);
+ memory_region_init_ram(sram, NULL, "an5206.sram", 512);
vmstate_register_ram_global(sram);
memory_region_add_subregion(address_space_mem, AN5206_RAMBAR_ADDR, sram);
@@ -40,7 +40,7 @@ static void dummy_m68k_init(QEMUMachineInitArgs *args)
env->vbr = 0;
/* RAM at address zero */
- memory_region_init_ram(ram, "dummy_m68k.ram", ram_size);
+ memory_region_init_ram(ram, NULL, "dummy_m68k.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, 0, ram);
@@ -532,7 +532,7 @@ qemu_irq *mcf5206_init(MemoryRegion *sysmem, uint32_t base, M68kCPU *cpu)
s = (m5206_mbar_state *)g_malloc0(sizeof(m5206_mbar_state));
- memory_region_init_io(&s->iomem, &m5206_mbar_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &m5206_mbar_ops, s,
"mbar", 0x00001000);
memory_region_add_subregion(sysmem, base, &s->iomem);
@@ -172,14 +172,14 @@ static void mcf5208_sys_init(MemoryRegion *address_space, qemu_irq *pic)
int i;
/* SDRAMC. */
- memory_region_init_io(iomem, &m5208_sys_ops, NULL, "m5208-sys", 0x00004000);
+ memory_region_init_io(iomem, NULL, &m5208_sys_ops, NULL, "m5208-sys", 0x00004000);
memory_region_add_subregion(address_space, 0xfc0a8000, iomem);
/* Timers. */
for (i = 0; i < 2; i++) {
s = (m5208_timer_state *)g_malloc0(sizeof(m5208_timer_state));
bh = qemu_bh_new(m5208_timer_trigger, s);
s->timer = ptimer_init(bh);
- memory_region_init_io(&s->iomem, &m5208_timer_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &m5208_timer_ops, s,
"m5208-timer", 0x00004000);
memory_region_add_subregion(address_space, 0xfc080000 + 0x4000 * i,
&s->iomem);
@@ -217,12 +217,12 @@ static void mcf5208evb_init(QEMUMachineInitArgs *args)
/* TODO: Configure BARs. */
/* DRAM at 0x40000000 */
- memory_region_init_ram(ram, "mcf5208.ram", ram_size);
+ memory_region_init_ram(ram, NULL, "mcf5208.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, 0x40000000, ram);
/* Internal SRAM. */
- memory_region_init_ram(sram, "mcf5208.sram", 16384);
+ memory_region_init_ram(sram, NULL, "mcf5208.sram", 16384);
vmstate_register_ram_global(sram);
memory_region_add_subregion(address_space_mem, 0x80000000, sram);
@@ -147,7 +147,7 @@ qemu_irq *mcf_intc_init(MemoryRegion *sysmem,
s->cpu = cpu;
mcf_intc_reset(s);
- memory_region_init_io(&s->iomem, &mcf_intc_ops, s, "mcf", 0x100);
+ memory_region_init_io(&s->iomem, NULL, &mcf_intc_ops, s, "mcf", 0x100);
memory_region_add_subregion(sysmem, base, &s->iomem);
return qemu_allocate_irqs(mcf_intc_set_irq, s, 64);
@@ -98,12 +98,12 @@ petalogix_ml605_init(QEMUMachineInitArgs *args)
env = &cpu->env;
/* Attach emulated BRAM through the LMB. */
- memory_region_init_ram(phys_lmb_bram, "petalogix_ml605.lmb_bram",
+ memory_region_init_ram(phys_lmb_bram, NULL, "petalogix_ml605.lmb_bram",
LMB_BRAM_SIZE);
vmstate_register_ram_global(phys_lmb_bram);
memory_region_add_subregion(address_space_mem, 0x00000000, phys_lmb_bram);
- memory_region_init_ram(phys_ram, "petalogix_ml605.ram", ram_size);
+ memory_region_init_ram(phys_ram, NULL, "petalogix_ml605.ram", ram_size);
vmstate_register_ram_global(phys_ram);
memory_region_add_subregion(address_space_mem, ddr_base, phys_ram);
@@ -80,12 +80,12 @@ petalogix_s3adsp1800_init(QEMUMachineInitArgs *args)
env = &cpu->env;
/* Attach emulated BRAM through the LMB. */
- memory_region_init_ram(phys_lmb_bram,
+ memory_region_init_ram(phys_lmb_bram, NULL,
"petalogix_s3adsp1800.lmb_bram", LMB_BRAM_SIZE);
vmstate_register_ram_global(phys_lmb_bram);
memory_region_add_subregion(sysmem, 0x00000000, phys_lmb_bram);
- memory_region_init_ram(phys_ram, "petalogix_s3adsp1800.ram", ram_size);
+ memory_region_init_ram(phys_ram, NULL, "petalogix_s3adsp1800.ram", ram_size);
vmstate_register_ram_global(phys_ram);
memory_region_add_subregion(sysmem, ddr_base, phys_ram);
@@ -1108,7 +1108,7 @@ PCIBus *gt64120_register(qemu_irq *pic)
get_system_memory(),
get_system_io(),
PCI_DEVFN(18, 0), 4, TYPE_PCI_BUS);
- memory_region_init_io(&d->ISD_mem, &isd_mem_ops, d, "isd-mem", 0x1000);
+ memory_region_init_io(&d->ISD_mem, NULL, &isd_mem_ops, d, "isd-mem", 0x1000);
pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "gt64120_pci");
return phb->bus;
@@ -300,9 +300,9 @@ static void mips_fulong2e_init(QEMUMachineInitArgs *args)
bios_size = 1024 * 1024;
/* allocate RAM */
- memory_region_init_ram(ram, "fulong2e.ram", ram_size);
+ memory_region_init_ram(ram, NULL, "fulong2e.ram", ram_size);
vmstate_register_ram_global(ram);
- memory_region_init_ram(bios, "fulong2e.bios", bios_size);
+ memory_region_init_ram(bios, NULL, "fulong2e.bios", bios_size);
vmstate_register_ram_global(bios);
memory_region_set_readonly(bios, true);
@@ -152,14 +152,14 @@ static void mips_jazz_init(MemoryRegion *address_space,
qemu_register_reset(main_cpu_reset, cpu);
/* allocate RAM */
- memory_region_init_ram(ram, "mips_jazz.ram", ram_size);
+ memory_region_init_ram(ram, NULL, "mips_jazz.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space, 0, ram);
- memory_region_init_ram(bios, "mips_jazz.bios", MAGNUM_BIOS_SIZE);
+ memory_region_init_ram(bios, NULL, "mips_jazz.bios", MAGNUM_BIOS_SIZE);
vmstate_register_ram_global(bios);
memory_region_set_readonly(bios, true);
- memory_region_init_alias(bios2, "mips_jazz.bios", bios,
+ memory_region_init_alias(bios2, NULL, "mips_jazz.bios", bios,
0, MAGNUM_BIOS_SIZE);
memory_region_add_subregion(address_space, 0x1fc00000LL, bios);
memory_region_add_subregion(address_space, 0xfff00000LL, bios2);
@@ -188,7 +188,7 @@ static void mips_jazz_init(MemoryRegion *address_space,
/* Chipset */
rc4030_opaque = rc4030_init(env->irq[6], env->irq[3], &rc4030, &dmas,
address_space);
- memory_region_init_io(dma_dummy, &dma_dummy_ops, NULL, "dummy_dma", 0x1000);
+ memory_region_init_io(dma_dummy, NULL, &dma_dummy_ops, NULL, "dummy_dma", 0x1000);
memory_region_add_subregion(address_space, 0x8000d000, dma_dummy);
/* ISA devices */
@@ -216,7 +216,7 @@ static void mips_jazz_init(MemoryRegion *address_space,
{
/* Simple ROM, so user doesn't have to provide one */
MemoryRegion *rom_mr = g_new(MemoryRegion, 1);
- memory_region_init_ram(rom_mr, "g364fb.rom", 0x80000);
+ memory_region_init_ram(rom_mr, NULL, "g364fb.rom", 0x80000);
vmstate_register_ram_global(rom_mr);
memory_region_set_readonly(rom_mr, true);
uint8_t *rom = memory_region_get_ram_ptr(rom_mr);
@@ -266,7 +266,7 @@ static void mips_jazz_init(MemoryRegion *address_space,
/* Real time clock */
rtc_init(isa_bus, 1980, NULL);
- memory_region_init_io(rtc, &rtc_ops, NULL, "rtc", 0x1000);
+ memory_region_init_io(rtc, NULL, &rtc_ops, NULL, "rtc", 0x1000);
memory_region_add_subregion(address_space, 0x80004000, rtc);
/* Keyboard (i8042) */
@@ -446,11 +446,11 @@ static MaltaFPGAState *malta_fpga_init(MemoryRegion *address_space,
s = (MaltaFPGAState *)g_malloc0(sizeof(MaltaFPGAState));
- memory_region_init_io(&s->iomem, &malta_fpga_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &malta_fpga_ops, s,
"malta-fpga", 0x100000);
- memory_region_init_alias(&s->iomem_lo, "malta-fpga",
+ memory_region_init_alias(&s->iomem_lo, NULL, "malta-fpga",
&s->iomem, 0, 0x900);
- memory_region_init_alias(&s->iomem_hi, "malta-fpga",
+ memory_region_init_alias(&s->iomem_hi, NULL, "malta-fpga",
&s->iomem, 0xa00, 0x10000-0xa00);
memory_region_add_subregion(address_space, base, &s->iomem_lo);
@@ -853,7 +853,7 @@ void mips_malta_init(QEMUMachineInitArgs *args)
((unsigned int)ram_size / (1 << 20)));
exit(1);
}
- memory_region_init_ram(ram, "mips_malta.ram", ram_size);
+ memory_region_init_ram(ram, NULL, "mips_malta.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(system_memory, 0, ram);
@@ -927,7 +927,7 @@ void mips_malta_init(QEMUMachineInitArgs *args)
}
/* Map the BIOS at a 2nd physical location, as on the real board. */
- memory_region_init_alias(bios_alias, "bios.1fc", bios, 0, BIOS_SIZE);
+ memory_region_init_alias(bios_alias, NULL, "bios.1fc", bios, 0, BIOS_SIZE);
memory_region_add_subregion(system_memory, RESET_ADDRESS, bios_alias);
/* Board ID = 0x420 (Malta Board with CoreLV)
@@ -168,9 +168,9 @@ mips_mipssim_init(QEMUMachineInitArgs *args)
qemu_register_reset(main_cpu_reset, reset_info);
/* Allocate RAM. */
- memory_region_init_ram(ram, "mips_mipssim.ram", ram_size);
+ memory_region_init_ram(ram, NULL, "mips_mipssim.ram", ram_size);
vmstate_register_ram_global(ram);
- memory_region_init_ram(bios, "mips_mipssim.bios", BIOS_SIZE);
+ memory_region_init_ram(bios, NULL, "mips_mipssim.bios", BIOS_SIZE);
vmstate_register_ram_global(bios);
memory_region_set_readonly(bios, true);
@@ -202,12 +202,12 @@ void mips_r4k_init(QEMUMachineInitArgs *args)
((unsigned int)ram_size / (1 << 20)));
exit(1);
}
- memory_region_init_ram(ram, "mips_r4k.ram", ram_size);
+ memory_region_init_ram(ram, NULL, "mips_r4k.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, 0, ram);
- memory_region_init_io(iomem, &mips_qemu_ops, NULL, "mips-qemu", 0x10000);
+ memory_region_init_io(iomem, NULL, &mips_qemu_ops, NULL, "mips-qemu", 0x10000);
memory_region_add_subregion(address_space_mem, 0x1fbf0000, iomem);
/* Try to load a BIOS image. If this fails, we continue regardless,
@@ -229,7 +229,7 @@ void mips_r4k_init(QEMUMachineInitArgs *args)
#endif
if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
bios = g_new(MemoryRegion, 1);
- memory_region_init_ram(bios, "mips_r4k.bios", BIOS_SIZE);
+ memory_region_init_ram(bios, NULL, "mips_r4k.bios", BIOS_SIZE);
vmstate_register_ram_global(bios);
memory_region_set_readonly(bios, true);
memory_region_add_subregion(get_system_memory(), 0x1fc00000, bios);
@@ -119,7 +119,7 @@ static void a9_scu_realize(DeviceState *dev, Error ** errp)
A9SCUState *s = A9_SCU(dev);
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
- memory_region_init_io(&s->iomem, &a9_scu_ops, s, "a9-scu", 0x100);
+ memory_region_init_io(&s->iomem, NULL, &a9_scu_ops, s, "a9-scu", 0x100);
sysbus_init_mmio(sbd, &s->iomem);
}
@@ -230,12 +230,12 @@ static void applesmc_isa_realize(DeviceState *dev, Error **errp)
{
AppleSMCState *s = APPLE_SMC(dev);
- memory_region_init_io(&s->io_data, &applesmc_data_io_ops, s,
+ memory_region_init_io(&s->io_data, NULL, &applesmc_data_io_ops, s,
"applesmc-data", 4);
isa_register_ioport(&s->parent_obj, &s->io_data,
s->iobase + APPLESMC_DATA_PORT);
- memory_region_init_io(&s->io_cmd, &applesmc_cmd_io_ops, s,
+ memory_region_init_io(&s->io_cmd, NULL, &applesmc_cmd_io_ops, s,
"applesmc-cmd", 4);
isa_register_ioport(&s->parent_obj, &s->io_cmd,
s->iobase + APPLESMC_CMD_PORT);
@@ -157,7 +157,7 @@ static int l2x0_priv_init(SysBusDevice *dev)
{
l2x0_state *s = FROM_SYSBUS(l2x0_state, dev);
- memory_region_init_io(&s->iomem, &l2x0_mem_ops, s, "l2x0_cc", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &l2x0_mem_ops, s, "l2x0_cc", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
return 0;
}
@@ -589,7 +589,7 @@ static void arm_sysctl_init(Object *obj)
SysBusDevice *sd = SYS_BUS_DEVICE(obj);
arm_sysctl_state *s = FROM_SYSBUS(arm_sysctl_state, sd);
- memory_region_init_io(&s->iomem, &arm_sysctl_ops, s, "arm-sysctl", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &arm_sysctl_ops, s, "arm-sysctl", 0x1000);
sysbus_init_mmio(sd, &s->iomem);
qdev_init_gpio_in(dev, arm_sysctl_gpio_set, 2);
qdev_init_gpio_out(dev, &s->pl110_mux_ctrl, 1);
@@ -40,7 +40,7 @@ static void debug_exit_realizefn(DeviceState *d, Error **errp)
ISADevice *dev = ISA_DEVICE(d);
ISADebugExitState *isa = ISA_DEBUG_EXIT_DEVICE(d);
- memory_region_init_io(&isa->io, &debug_exit_ops, isa,
+ memory_region_init_io(&isa->io, NULL, &debug_exit_ops, isa,
TYPE_ISA_DEBUG_EXIT_DEVICE, isa->iosize);
memory_region_add_subregion(isa_address_space_io(dev),
isa->iobase, &isa->io);
@@ -296,11 +296,11 @@ static int ecc_init1(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
s->regs[0] = s->version;
- memory_region_init_io(&s->iomem, &ecc_mem_ops, s, "ecc", ECC_SIZE);
+ memory_region_init_io(&s->iomem, NULL, &ecc_mem_ops, s, "ecc", ECC_SIZE);
sysbus_init_mmio(dev, &s->iomem);
if (s->version == ECC_MCC) { // SS-600MP only
- memory_region_init_io(&s->iomem_diag, &ecc_diag_mem_ops, s,
+ memory_region_init_io(&s->iomem_diag, NULL, &ecc_diag_mem_ops, s,
"ecc.diag", ECC_DIAG_SIZE);
sysbus_init_mmio(dev, &s->iomem_diag);
}
@@ -458,7 +458,7 @@ static int exynos4210_pmu_init(SysBusDevice *dev)
Exynos4210PmuState *s = FROM_SYSBUS(Exynos4210PmuState, dev);
/* memory mapping */
- memory_region_init_io(&s->iomem, &exynos4210_pmu_ops, s, "exynos4210.pmu",
+ memory_region_init_io(&s->iomem, NULL, &exynos4210_pmu_ops, s, "exynos4210.pmu",
EXYNOS4210_PMU_REGS_MEM_SIZE);
sysbus_init_mmio(dev, &s->iomem);
return 0;
@@ -281,7 +281,7 @@ static int imx_ccm_init(SysBusDevice *dev)
{
IMXCCMState *s = FROM_SYSBUS(typeof(*s), dev);
- memory_region_init_io(&s->iomem, &imx_ccm_ops, s, "imx_ccm", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &imx_ccm_ops, s, "imx_ccm", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
return 0;
@@ -339,7 +339,7 @@ static void create_shared_memory_BAR(IVShmemState *s, int fd) {
ptr = mmap(0, s->ivshmem_size, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
- memory_region_init_ram_ptr(&s->ivshmem, "ivshmem.bar2",
+ memory_region_init_ram_ptr(&s->ivshmem, NULL, "ivshmem.bar2",
s->ivshmem_size, ptr);
vmstate_register_ram(&s->ivshmem, &s->dev.qdev);
memory_region_add_subregion(&s->bar, 0, &s->ivshmem);
@@ -467,7 +467,7 @@ static void ivshmem_read(void *opaque, const uint8_t * buf, int flags)
/* mmap the region and map into the BAR2 */
map_ptr = mmap(0, s->ivshmem_size, PROT_READ|PROT_WRITE, MAP_SHARED,
incoming_fd, 0);
- memory_region_init_ram_ptr(&s->ivshmem,
+ memory_region_init_ram_ptr(&s->ivshmem, NULL,
"ivshmem.bar2", s->ivshmem_size, map_ptr);
vmstate_register_ram(&s->ivshmem, &s->dev.qdev);
@@ -685,14 +685,14 @@ static int pci_ivshmem_init(PCIDevice *dev)
s->shm_fd = 0;
- memory_region_init_io(&s->ivshmem_mmio, &ivshmem_mmio_ops, s,
+ memory_region_init_io(&s->ivshmem_mmio, NULL, &ivshmem_mmio_ops, s,
"ivshmem-mmio", IVSHMEM_REG_BAR_SIZE);
/* region for registers*/
pci_register_bar(&s->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY,
&s->ivshmem_mmio);
- memory_region_init(&s->bar, "ivshmem-bar2-container", s->ivshmem_size);
+ memory_region_init(&s->bar, NULL, "ivshmem-bar2-container", s->ivshmem_size);
s->ivshmem_attr = PCI_BASE_ADDRESS_SPACE_MEMORY |
PCI_BASE_ADDRESS_MEM_PREFETCH;
if (s->ivshmem_64bit) {
@@ -117,7 +117,7 @@ static int lm32_sys_init(SysBusDevice *dev)
{
LM32SysState *s = FROM_SYSBUS(typeof(*s), dev);
- memory_region_init_io(&s->iomem, &sys_ops , s, "sys", R_MAX * 4);
+ memory_region_init_io(&s->iomem, NULL, &sys_ops , s, "sys", R_MAX * 4);
sysbus_init_mmio(dev, &s->iomem);
/* Note: This device is not created in the board initialization,
@@ -703,7 +703,7 @@ static void cuda_initfn(Object *obj)
CUDAState *s = CUDA(obj);
int i;
- memory_region_init_io(&s->mem, &cuda_ops, s, "cuda", 0x2000);
+ memory_region_init_io(&s->mem, NULL, &cuda_ops, s, "cuda", 0x2000);
sysbus_init_mmio(d, &s->mem);
sysbus_init_irq(d, &s->irq);
@@ -848,7 +848,7 @@ void* DBDMA_init (MemoryRegion **dbdma_mem)
s = g_malloc0(sizeof(DBDMAState));
- memory_region_init_io(&s->mem, &dbdma_ops, s, "dbdma", 0x1000);
+ memory_region_init_io(&s->mem, NULL, &dbdma_ops, s, "dbdma", 0x1000);
*dbdma_mem = &s->mem;
vmstate_register(NULL, -1, &vmstate_dbdma, s);
qemu_register_reset(dbdma_reset, s);
@@ -222,7 +222,7 @@ static void macio_instance_init(Object *obj)
MacIOState *s = MACIO(obj);
MemoryRegion *dbdma_mem;
- memory_region_init(&s->bar, "macio", 0x80000);
+ memory_region_init(&s->bar, NULL, "macio", 0x80000);
object_initialize(&s->cuda, TYPE_CUDA);
qdev_set_parent_bus(DEVICE(&s->cuda), sysbus_get_default());
@@ -127,7 +127,7 @@ static int milkymist_hpdmc_init(SysBusDevice *dev)
{
MilkymistHpdmcState *s = FROM_SYSBUS(typeof(*s), dev);
- memory_region_init_io(&s->regs_region, &hpdmc_mmio_ops, s,
+ memory_region_init_io(&s->regs_region, NULL, &hpdmc_mmio_ops, s,
"milkymist-hpdmc", R_MAX * 4);
sysbus_init_mmio(dev, &s->regs_region);
@@ -497,7 +497,7 @@ static int milkymist_pfpu_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
- memory_region_init_io(&s->regs_region, &pfpu_mmio_ops, s,
+ memory_region_init_io(&s->regs_region, NULL, &pfpu_mmio_ops, s,
"milkymist-pfpu", MICROCODE_END * 4);
sysbus_init_mmio(dev, &s->regs_region);
@@ -208,7 +208,7 @@ static int mst_fpga_init(SysBusDevice *dev)
/* alloc the external 16 irqs */
qdev_init_gpio_in(&dev->qdev, mst_fpga_set_irq, MST_NUM_IRQS);
- memory_region_init_io(&s->iomem, &mst_fpga_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &mst_fpga_ops, s,
"fpga", 0x00100000);
sysbus_init_mmio(dev, &s->iomem);
return 0;
@@ -413,7 +413,7 @@ static void omap_gpmc_cs_map(struct omap_gpmc_s *s, int cs)
* constant), the mask should cause wrapping of the address space, so
* that the same memory becomes accessible at every <i>size</i> bytes
* starting from <i>base</i>. */
- memory_region_init(&f->container, "omap-gpmc-file", size);
+ memory_region_init(&f->container, NULL, "omap-gpmc-file", size);
memory_region_add_subregion(&f->container, 0,
omap_gpmc_cs_memregion(s, cs));
memory_region_add_subregion(get_system_memory(), base,
@@ -826,7 +826,7 @@ struct omap_gpmc_s *omap_gpmc_init(struct omap_mpu_state_s *mpu,
struct omap_gpmc_s *s = (struct omap_gpmc_s *)
g_malloc0(sizeof(struct omap_gpmc_s));
- memory_region_init_io(&s->iomem, &omap_gpmc_ops, s, "omap-gpmc", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &omap_gpmc_ops, s, "omap-gpmc", 0x1000);
memory_region_add_subregion(get_system_memory(), base, &s->iomem);
s->irq = irq;
@@ -843,14 +843,14 @@ struct omap_gpmc_s *omap_gpmc_init(struct omap_mpu_state_s *mpu,
* guest-requested size.
*/
for (cs = 0; cs < 8; cs++) {
- memory_region_init_io(&s->cs_file[cs].nandiomem,
+ memory_region_init_io(&s->cs_file[cs].nandiomem, NULL,
&omap_nand_ops,
&s->cs_file[cs],
"omap-nand",
256 * 1024 * 1024);
}
- memory_region_init_io(&s->prefetch.iomem, &omap_prefetch_ops, s,
+ memory_region_init_io(&s->prefetch.iomem, NULL, &omap_prefetch_ops, s,
"omap-gpmc-prefetch", 256 * 1024 * 1024);
return s;
}
@@ -136,7 +136,7 @@ struct omap_target_agent_s *omap_l4ta_get(struct omap_l4_s *bus,
ta->status = 0x00000000;
ta->control = 0x00000200; /* XXX 01000200 for L4TAO */
- memory_region_init_io(&ta->iomem, &omap_l4ta_ops, ta, "omap.l4ta",
+ memory_region_init_io(&ta->iomem, NULL, &omap_l4ta_ops, ta, "omap.l4ta",
omap_l4_region_size(ta, info->ta_region));
omap_l4_attach(ta, info->ta_region, &ta->iomem);
@@ -161,7 +161,7 @@ struct omap_sdrc_s *omap_sdrc_init(MemoryRegion *sysmem,
omap_sdrc_reset(s);
- memory_region_init_io(&s->iomem, &omap_sdrc_ops, s, "omap.sdrc", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &omap_sdrc_ops, s, "omap.sdrc", 0x1000);
memory_region_add_subregion(sysmem, base, &s->iomem);
return s;
@@ -110,7 +110,7 @@ static const MemoryRegionOps omap_tap_ops = {
void omap_tap_init(struct omap_target_agent_s *ta,
struct omap_mpu_state_s *mpu)
{
- memory_region_init_io(&mpu->tap_iomem, &omap_tap_ops, mpu, "omap.tap",
+ memory_region_init_io(&mpu->tap_iomem, NULL, &omap_tap_ops, mpu, "omap.tap",
omap_l4_region_size(ta, 0));
omap_l4_attach(ta, 0, &mpu->tap_iomem);
}
@@ -149,13 +149,13 @@ static void testdev_realizefn(DeviceState *d, Error **errp)
MemoryRegion *mem = isa_address_space(isa);
MemoryRegion *io = isa_address_space_io(isa);
- memory_region_init_io(&dev->ioport, &test_ioport_ops, dev,
+ memory_region_init_io(&dev->ioport, NULL, &test_ioport_ops, dev,
"pc-testdev-ioport", 4);
- memory_region_init_io(&dev->flush, &test_flush_ops, dev,
+ memory_region_init_io(&dev->flush, NULL, &test_flush_ops, dev,
"pc-testdev-flush-page", 4);
- memory_region_init_io(&dev->irq, &test_irq_ops, dev,
+ memory_region_init_io(&dev->irq, NULL, &test_irq_ops, dev,
"pc-testdev-irq-line", 24);
- memory_region_init_io(&dev->iomem, &test_iomem_ops, dev,
+ memory_region_init_io(&dev->iomem, NULL, &test_iomem_ops, dev,
"pc-testdev-iomem", IOMEM_LEN);
memory_region_add_subregion(io, 0xe0, &dev->ioport);
@@ -236,9 +236,9 @@ static int pci_testdev_init(PCIDevice *pci_dev)
pci_conf[PCI_INTERRUPT_PIN] = 0; /* no interrupt pin */
- memory_region_init_io(&d->mmio, &pci_testdev_mmio_ops, d,
+ memory_region_init_io(&d->mmio, NULL, &pci_testdev_mmio_ops, d,
"pci-testdev-mmio", IOTEST_MEMSIZE * 2);
- memory_region_init_io(&d->portio, &pci_testdev_pio_ops, d,
+ memory_region_init_io(&d->portio, NULL, &pci_testdev_pio_ops, d,
"pci-testdev-portio", IOTEST_IOSIZE * 2);
pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio);
pci_register_bar(&d->dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &d->portio);
@@ -120,7 +120,7 @@ static int puv3_pm_init(SysBusDevice *dev)
s->reg_PCGR = 0x0;
- memory_region_init_io(&s->iomem, &puv3_pm_ops, s, "puv3_pm",
+ memory_region_init_io(&s->iomem, NULL, &puv3_pm_ops, s, "puv3_pm",
PUV3_REGS_OFFSET);
sysbus_init_mmio(dev, &s->iomem);
@@ -90,7 +90,7 @@ static void pvpanic_isa_initfn(Object *obj)
{
PVPanicState *s = ISA_PVPANIC_DEVICE(obj);
- memory_region_init_io(&s->io, &pvpanic_ops, s, "pvpanic", 1);
+ memory_region_init_io(&s->io, NULL, &pvpanic_ops, s, "pvpanic", 1);
}
static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
@@ -128,7 +128,7 @@ PXA2xxPCMCIAState *pxa2xx_pcmcia_init(MemoryRegion *sysmem,
g_malloc0(sizeof(PXA2xxPCMCIAState));
/* Socket I/O Memory Space */
- memory_region_init_io(&s->iomem, &pxa2xx_pcmcia_io_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &pxa2xx_pcmcia_io_ops, s,
"pxa2xx-pcmcia-io", 0x04000000);
memory_region_add_subregion(sysmem, base | 0x00000000,
&s->iomem);
@@ -136,13 +136,13 @@ PXA2xxPCMCIAState *pxa2xx_pcmcia_init(MemoryRegion *sysmem,
/* Then next 64 MB is reserved */
/* Socket Attribute Memory Space */
- memory_region_init_io(&s->attr_iomem, &pxa2xx_pcmcia_attr_ops, s,
+ memory_region_init_io(&s->attr_iomem, NULL, &pxa2xx_pcmcia_attr_ops, s,
"pxa2xx-pcmcia-attribute", 0x04000000);
memory_region_add_subregion(sysmem, base | 0x08000000,
&s->attr_iomem);
/* Socket Common Memory Space */
- memory_region_init_io(&s->common_iomem, &pxa2xx_pcmcia_common_ops, s,
+ memory_region_init_io(&s->common_iomem, NULL, &pxa2xx_pcmcia_common_ops, s,
"pxa2xx-pcmcia-common", 0x04000000);
memory_region_add_subregion(sysmem, base | 0x0c000000,
&s->common_iomem);
@@ -412,7 +412,7 @@ static int apc_init1(SysBusDevice *dev)
sysbus_init_irq(dev, &s->cpu_halt);
/* Power management (APC) XXX: not a Slavio device */
- memory_region_init_io(&s->iomem, &apc_mem_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &apc_mem_ops, s,
"apc", MISC_SIZE);
sysbus_init_mmio(dev, &s->iomem);
return 0;
@@ -427,39 +427,39 @@ static int slavio_misc_init1(SysBusDevice *dev)
/* 8 bit registers */
/* Slavio control */
- memory_region_init_io(&s->cfg_iomem, &slavio_cfg_mem_ops, s,
+ memory_region_init_io(&s->cfg_iomem, NULL, &slavio_cfg_mem_ops, s,
"configuration", MISC_SIZE);
sysbus_init_mmio(dev, &s->cfg_iomem);
/* Diagnostics */
- memory_region_init_io(&s->diag_iomem, &slavio_diag_mem_ops, s,
+ memory_region_init_io(&s->diag_iomem, NULL, &slavio_diag_mem_ops, s,
"diagnostic", MISC_SIZE);
sysbus_init_mmio(dev, &s->diag_iomem);
/* Modem control */
- memory_region_init_io(&s->mdm_iomem, &slavio_mdm_mem_ops, s,
+ memory_region_init_io(&s->mdm_iomem, NULL, &slavio_mdm_mem_ops, s,
"modem", MISC_SIZE);
sysbus_init_mmio(dev, &s->mdm_iomem);
/* 16 bit registers */
/* ss600mp diag LEDs */
- memory_region_init_io(&s->led_iomem, &slavio_led_mem_ops, s,
+ memory_region_init_io(&s->led_iomem, NULL, &slavio_led_mem_ops, s,
"leds", MISC_SIZE);
sysbus_init_mmio(dev, &s->led_iomem);
/* 32 bit registers */
/* System control */
- memory_region_init_io(&s->sysctrl_iomem, &slavio_sysctrl_mem_ops, s,
+ memory_region_init_io(&s->sysctrl_iomem, NULL, &slavio_sysctrl_mem_ops, s,
"system-control", MISC_SIZE);
sysbus_init_mmio(dev, &s->sysctrl_iomem);
/* AUX 1 (Misc System Functions) */
- memory_region_init_io(&s->aux1_iomem, &slavio_aux1_mem_ops, s,
+ memory_region_init_io(&s->aux1_iomem, NULL, &slavio_aux1_mem_ops, s,
"misc-system-functions", MISC_SIZE);
sysbus_init_mmio(dev, &s->aux1_iomem);
/* AUX 2 (Software Powerdown Control) */
- memory_region_init_io(&s->aux2_iomem, &slavio_aux2_mem_ops, s,
+ memory_region_init_io(&s->aux2_iomem, NULL, &slavio_aux2_mem_ops, s,
"software-powerdown-control", MISC_SIZE);
sysbus_init_mmio(dev, &s->aux2_iomem);
@@ -1154,7 +1154,7 @@ static void vfio_vga_probe_ati_3c3_quirk(VFIODevice *vdev)
quirk->vdev = vdev;
quirk->data = (physbar >> 8) & 0xff;
- memory_region_init_io(&quirk->mem, &vfio_ati_3c3_quirk, quirk,
+ memory_region_init_io(&quirk->mem, NULL, &vfio_ati_3c3_quirk, quirk,
"vfio-ati-3c3-quirk", 1);
memory_region_add_subregion(&vdev->vga.region[QEMU_PCI_VGA_IO_HI].mem, 3,
&quirk->mem);
@@ -1245,7 +1245,7 @@ static void vfio_probe_ati_4010_quirk(VFIODevice *vdev, int nr)
quirk = g_malloc0(sizeof(*quirk));
quirk->vdev = vdev;
- memory_region_init_io(&quirk->mem, &vfio_ati_4010_quirk, quirk,
+ memory_region_init_io(&quirk->mem, NULL, &vfio_ati_4010_quirk, quirk,
"vfio-ati-4010-quirk", 8);
memory_region_add_subregion_overlap(&vdev->bars[nr].mem, 0, &quirk->mem, 1);
@@ -1331,7 +1331,7 @@ static void vfio_probe_ati_f10_quirk(VFIODevice *vdev, int nr)
quirk = g_malloc0(sizeof(*quirk));
quirk->vdev = vdev;
- memory_region_init_io(&quirk->mem, &vfio_ati_f10_quirk, quirk,
+ memory_region_init_io(&quirk->mem, NULL, &vfio_ati_f10_quirk, quirk,
"vfio-ati-f10-quirk", 8);
memory_region_add_subregion_overlap(&vdev->bars[nr].mem, 0, &quirk->mem, 1);
@@ -1451,7 +1451,7 @@ static void vfio_vga_probe_nvidia_3d0_quirk(VFIODevice *vdev)
quirk = g_malloc0(sizeof(*quirk));
quirk->vdev = vdev;
- memory_region_init_io(&quirk->mem, &vfio_nvidia_3d0_quirk, quirk,
+ memory_region_init_io(&quirk->mem, NULL, &vfio_nvidia_3d0_quirk, quirk,
"vfio-nvidia-3d0-quirk", 6);
memory_region_add_subregion(&vdev->vga.region[QEMU_PCI_VGA_IO_HI].mem,
0x10, &quirk->mem);
@@ -1566,7 +1566,7 @@ static void vfio_probe_nvidia_bar5_window_quirk(VFIODevice *vdev, int nr)
quirk = g_malloc0(sizeof(*quirk));
quirk->vdev = vdev;
- memory_region_init_io(&quirk->mem, &vfio_nvidia_bar5_window_quirk, quirk,
+ memory_region_init_io(&quirk->mem, NULL, &vfio_nvidia_bar5_window_quirk, quirk,
"vfio-nvidia-bar5-window-quirk", 16);
memory_region_add_subregion_overlap(&vdev->bars[nr].mem, 0, &quirk->mem, 1);
@@ -1644,7 +1644,7 @@ static void vfio_probe_nvidia_bar0_88000_quirk(VFIODevice *vdev, int nr)
quirk = g_malloc0(sizeof(*quirk));
quirk->vdev = vdev;
- memory_region_init_io(&quirk->mem, &vfio_nvidia_bar0_88000_quirk, quirk,
+ memory_region_init_io(&quirk->mem, NULL, &vfio_nvidia_bar0_88000_quirk, quirk,
"vfio-nvidia-bar0-88000-quirk",
TARGET_PAGE_ALIGN(PCIE_CONFIG_SPACE_SIZE));
memory_region_add_subregion_overlap(&vdev->bars[nr].mem,
@@ -1723,7 +1723,7 @@ static void vfio_probe_nvidia_bar0_1800_quirk(VFIODevice *vdev, int nr)
quirk = g_malloc0(sizeof(*quirk));
quirk->vdev = vdev;
- memory_region_init_io(&quirk->mem, &vfio_nvidia_bar0_1800_quirk, quirk,
+ memory_region_init_io(&quirk->mem, NULL, &vfio_nvidia_bar0_1800_quirk, quirk,
"vfio-nvidia-bar0-1800-quirk",
TARGET_PAGE_ALIGN(PCI_CONFIG_SPACE_SIZE));
memory_region_add_subregion_overlap(&vdev->bars[nr].mem,
@@ -2228,11 +2228,11 @@ static int vfio_mmap_bar(VFIOBAR *bar, MemoryRegion *mem, MemoryRegion *submem,
goto empty_region;
}
- memory_region_init_ram_ptr(submem, name, size, *map);
+ memory_region_init_ram_ptr(submem, NULL, name, size, *map);
} else {
empty_region:
/* Create a zero sized sub-region to make cleanup easy. */
- memory_region_init(submem, name, 0);
+ memory_region_init(submem, NULL, name, 0);
}
memory_region_add_subregion(mem, offset, submem);
@@ -2271,7 +2271,7 @@ static void vfio_map_bar(VFIODevice *vdev, int nr)
~PCI_BASE_ADDRESS_IO_MASK : ~PCI_BASE_ADDRESS_MEM_MASK);
/* A "slow" read/write mapping underlies all BARs */
- memory_region_init_io(&bar->mem, &vfio_bar_ops, bar, name, size);
+ memory_region_init_io(&bar->mem, NULL, &vfio_bar_ops, bar, name, size);
pci_register_bar(&vdev->pdev, nr, type, &bar->mem);
/*
@@ -2315,17 +2315,17 @@ static void vfio_map_bars(VFIODevice *vdev)
}
if (vdev->has_vga) {
- memory_region_init_io(&vdev->vga.region[QEMU_PCI_VGA_MEM].mem,
+ memory_region_init_io(&vdev->vga.region[QEMU_PCI_VGA_MEM].mem, NULL,
&vfio_vga_ops,
&vdev->vga.region[QEMU_PCI_VGA_MEM],
"vfio-vga-mmio@0xa0000",
QEMU_PCI_VGA_MEM_SIZE);
- memory_region_init_io(&vdev->vga.region[QEMU_PCI_VGA_IO_LO].mem,
+ memory_region_init_io(&vdev->vga.region[QEMU_PCI_VGA_IO_LO].mem, NULL,
&vfio_vga_ops,
&vdev->vga.region[QEMU_PCI_VGA_IO_LO],
"vfio-vga-io@0x3b0",
QEMU_PCI_VGA_IO_LO_SIZE);
- memory_region_init_io(&vdev->vga.region[QEMU_PCI_VGA_IO_HI].mem,
+ memory_region_init_io(&vdev->vga.region[QEMU_PCI_VGA_IO_HI].mem, NULL,
&vfio_vga_ops,
&vdev->vga.region[QEMU_PCI_VGA_IO_HI],
"vfio-vga-io@0x3c0",
@@ -2588,7 +2588,7 @@ static int vfio_load_rom(VFIODevice *vdev)
snprintf(name, sizeof(name), "vfio[%04x:%02x:%02x.%x].rom",
vdev->host.domain, vdev->host.bus, vdev->host.slot,
vdev->host.function);
- memory_region_init_ram(&vdev->pdev.rom, name, size);
+ memory_region_init_ram(&vdev->pdev.rom, NULL, name, size);
ptr = memory_region_get_ram_ptr(&vdev->pdev.rom);
memset(ptr, 0xff, size);
@@ -142,7 +142,7 @@ static void vmport_realizefn(DeviceState *dev, Error **errp)
ISADevice *isadev = ISA_DEVICE(dev);
VMPortState *s = VMPORT(dev);
- memory_region_init_io(&s->io, &vmport_ops, s, "vmport", 1);
+ memory_region_init_io(&s->io, NULL, &vmport_ops, s, "vmport", 1);
isa_register_ioport(isadev, &s->io, 0x5658);
port_state = s;
@@ -494,7 +494,7 @@ static int zynq_slcr_init(SysBusDevice *dev)
{
ZynqSLCRState *s = FROM_SYSBUS(ZynqSLCRState, dev);
- memory_region_init_io(&s->iomem, &slcr_ops, s, "slcr", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &slcr_ops, s, "slcr", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
return 0;
@@ -136,11 +136,11 @@ static void moxiesim_init(QEMUMachineInitArgs *args)
qemu_register_reset(main_cpu_reset, cpu);
/* Allocate RAM. */
- memory_region_init_ram(ram, "moxiesim.ram", ram_size);
+ memory_region_init_ram(ram, NULL, "moxiesim.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, ram_base, ram);
- memory_region_init_ram(rom, "moxie.rom", 128*0x1000);
+ memory_region_init_ram(rom, NULL, "moxie.rom", 128*0x1000);
vmstate_register_ram_global(rom);
memory_region_add_subregion(get_system_memory(), 0x1000, rom);
@@ -1163,7 +1163,7 @@ static int gem_init(SysBusDevice *dev)
s = FROM_SYSBUS(GemState, dev);
gem_init_register_masks(s);
- memory_region_init_io(&s->iomem, &gem_ops, s, "enet", sizeof(s->regs));
+ memory_region_init_io(&s->iomem, NULL, &gem_ops, s, "enet", sizeof(s->regs));
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
qemu_macaddr_default_if_unset(&s->conf.macaddr);
@@ -908,7 +908,7 @@ void dp83932_init(NICInfo *nd, hwaddr base, int it_shift,
qemu_register_reset(nic_reset, s);
nic_reset(s);
- memory_region_init_io(&s->mmio, &dp8393x_ops, s,
+ memory_region_init_io(&s->mmio, NULL, &dp8393x_ops, s,
"dp8393x", 0x40 << it_shift);
memory_region_add_subregion(address_space, base, &s->mmio);
}
@@ -1276,13 +1276,13 @@ e1000_mmio_setup(E1000State *d)
E1000_IMC, E1000_TCTL, E1000_TDT, PNPMMIO_SIZE
};
- memory_region_init_io(&d->mmio, &e1000_mmio_ops, d, "e1000-mmio",
+ memory_region_init_io(&d->mmio, NULL, &e1000_mmio_ops, d, "e1000-mmio",
PNPMMIO_SIZE);
memory_region_add_coalescing(&d->mmio, 0, excluded_regs[0]);
for (i = 0; excluded_regs[i] != PNPMMIO_SIZE; i++)
memory_region_add_coalescing(&d->mmio, excluded_regs[i] + 4,
excluded_regs[i+1] - excluded_regs[i] - 4);
- memory_region_init_io(&d->io, &e1000_io_ops, d, "e1000-io", IOPORT_SIZE);
+ memory_region_init_io(&d->io, NULL, &e1000_io_ops, d, "e1000-io", IOPORT_SIZE);
}
static void
@@ -1876,14 +1876,14 @@ static int e100_nic_init(PCIDevice *pci_dev)
s->eeprom = eeprom93xx_new(&pci_dev->qdev, EEPROM_SIZE);
/* Handler for memory-mapped I/O */
- memory_region_init_io(&s->mmio_bar, &eepro100_ops, s, "eepro100-mmio",
+ memory_region_init_io(&s->mmio_bar, NULL, &eepro100_ops, s, "eepro100-mmio",
PCI_MEM_SIZE);
pci_register_bar(&s->dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &s->mmio_bar);
- memory_region_init_io(&s->io_bar, &eepro100_ops, s, "eepro100-io",
+ memory_region_init_io(&s->io_bar, NULL, &eepro100_ops, s, "eepro100-io",
PCI_IO_SIZE);
pci_register_bar(&s->dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &s->io_bar);
/* FIXME: flash aliases to mmio?! */
- memory_region_init_io(&s->flash_bar, &eepro100_ops, s, "eepro100-flash",
+ memory_region_init_io(&s->flash_bar, NULL, &eepro100_ops, s, "eepro100-flash",
PCI_FLASH_SIZE);
pci_register_bar(&s->dev, 2, 0, &s->flash_bar);
@@ -610,7 +610,7 @@ static int fs_eth_init(SysBusDevice *dev)
s->dma_in->client.opaque = s;
s->dma_in->client.pull = NULL;
- memory_region_init_io(&s->mmio, ð_ops, s, "etraxfs-eth", 0x5c);
+ memory_region_init_io(&s->mmio, NULL, ð_ops, s, "etraxfs-eth", 0x5c);
sysbus_init_mmio(dev, &s->mmio);
qemu_macaddr_default_if_unset(&s->conf.macaddr);
@@ -1328,7 +1328,7 @@ static int lan9118_init1(SysBusDevice *dev)
const MemoryRegionOps *mem_ops =
s->mode_16bit ? &lan9118_16bit_mem_ops : &lan9118_mem_ops;
- memory_region_init_io(&s->mmio, mem_ops, s, "lan9118-mmio", 0x100);
+ memory_region_init_io(&s->mmio, NULL, mem_ops, s, "lan9118-mmio", 0x100);
sysbus_init_mmio(dev, &s->mmio);
sysbus_init_irq(dev, &s->irq);
qemu_macaddr_default_if_unset(&s->conf.macaddr);
@@ -117,7 +117,7 @@ static int lance_init(SysBusDevice *dev)
SysBusPCNetState *d = FROM_SYSBUS(SysBusPCNetState, dev);
PCNetState *s = &d->state;
- memory_region_init_io(&s->mmio, &lance_mem_ops, d, "lance-mmio", 4);
+ memory_region_init_io(&s->mmio, NULL, &lance_mem_ops, d, "lance-mmio", 4);
qdev_init_gpio_in(&dev->qdev, parent_lance_reset, 1);
@@ -468,7 +468,7 @@ void mcf_fec_init(MemoryRegion *sysmem, NICInfo *nd,
s->sysmem = sysmem;
s->irq = irq;
- memory_region_init_io(&s->iomem, &mcf_fec_ops, s, "fec", 0x400);
+ memory_region_init_io(&s->iomem, NULL, &mcf_fec_ops, s, "fec", 0x400);
memory_region_add_subregion(sysmem, base, &s->iomem);
s->conf.macaddr = nd->macaddr;
@@ -461,12 +461,12 @@ static int milkymist_minimac2_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->rx_irq);
sysbus_init_irq(dev, &s->tx_irq);
- memory_region_init_io(&s->regs_region, &minimac2_ops, s,
+ memory_region_init_io(&s->regs_region, NULL, &minimac2_ops, s,
"milkymist-minimac2", R_MAX * 4);
sysbus_init_mmio(dev, &s->regs_region);
/* register buffers memory */
- memory_region_init_ram(&s->buffers, "milkymist-minimac2.buffers",
+ memory_region_init_ram(&s->buffers, NULL, "milkymist-minimac2.buffers",
buffers_size);
vmstate_register_ram_global(&s->buffers);
s->rx0_buf = memory_region_get_ram_ptr(&s->buffers);
@@ -235,7 +235,7 @@ static int mipsnet_sysbus_init(SysBusDevice *dev)
{
MIPSnetState *s = DO_UPCAST(MIPSnetState, busdev, dev);
- memory_region_init_io(&s->io, &mipsnet_ioport_ops, s, "mipsnet-io", 36);
+ memory_region_init_io(&s->io, NULL, &mipsnet_ioport_ops, s, "mipsnet-io", 36);
sysbus_init_mmio(dev, &s->io);
sysbus_init_irq(dev, &s->irq);
@@ -701,7 +701,7 @@ static const MemoryRegionOps ne2000_ops = {
void ne2000_setup_io(NE2000State *s, unsigned size)
{
- memory_region_init_io(&s->io, &ne2000_ops, s, "ne2000", size);
+ memory_region_init_io(&s->io, NULL, &ne2000_ops, s, "ne2000", size);
}
static void ne2000_cleanup(NetClientState *nc)
@@ -681,11 +681,11 @@ static int sysbus_open_eth_init(SysBusDevice *dev)
{
OpenEthState *s = DO_UPCAST(OpenEthState, dev, dev);
- memory_region_init_io(&s->reg_io, &open_eth_reg_ops, s,
+ memory_region_init_io(&s->reg_io, NULL, &open_eth_reg_ops, s,
"open_eth.regs", 0x54);
sysbus_init_mmio(dev, &s->reg_io);
- memory_region_init_io(&s->desc_io, &open_eth_desc_ops, s,
+ memory_region_init_io(&s->desc_io, NULL, &open_eth_desc_ops, s,
"open_eth.desc", 0x400);
sysbus_init_mmio(dev, &s->desc_io);
@@ -315,10 +315,10 @@ static int pci_pcnet_init(PCIDevice *pci_dev)
pci_conf[PCI_MAX_LAT] = 0xff;
/* Handler for memory-mapped I/O */
- memory_region_init_io(&d->state.mmio, &pcnet_mmio_ops, s, "pcnet-mmio",
+ memory_region_init_io(&d->state.mmio, NULL, &pcnet_mmio_ops, s, "pcnet-mmio",
PCNET_PNPMMIO_SIZE);
- memory_region_init_io(&d->io_bar, &pcnet_io_ops, s, "pcnet-io",
+ memory_region_init_io(&d->io_bar, NULL, &pcnet_io_ops, s, "pcnet-io",
PCNET_IOPORT_SIZE);
pci_register_bar(pci_dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->io_bar);
@@ -3486,8 +3486,8 @@ static int pci_rtl8139_init(PCIDevice *dev)
* list bit in status register, and offset 0xdc seems unused. */
pci_conf[PCI_CAPABILITY_LIST] = 0xdc;
- memory_region_init_io(&s->bar_io, &rtl8139_io_ops, s, "rtl8139", 0x100);
- memory_region_init_io(&s->bar_mem, &rtl8139_mmio_ops, s, "rtl8139", 0x100);
+ memory_region_init_io(&s->bar_io, NULL, &rtl8139_io_ops, s, "rtl8139", 0x100);
+ memory_region_init_io(&s->bar_mem, NULL, &rtl8139_mmio_ops, s, "rtl8139", 0x100);
pci_register_bar(&s->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->bar_io);
pci_register_bar(&s->dev, 1, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar_mem);
@@ -747,7 +747,7 @@ static NetClientInfo net_smc91c111_info = {
static int smc91c111_init1(SysBusDevice *dev)
{
smc91c111_state *s = FROM_SYSBUS(smc91c111_state, dev);
- memory_region_init_io(&s->mmio, &smc91c111_mem_ops, s,
+ memory_region_init_io(&s->mmio, NULL, &smc91c111_mem_ops, s,
"smc91c111-mmio", 16);
sysbus_init_mmio(dev, &s->mmio);
sysbus_init_irq(dev, &s->irq);
@@ -405,7 +405,7 @@ static int stellaris_enet_init(SysBusDevice *dev)
{
stellaris_enet_state *s = FROM_SYSBUS(stellaris_enet_state, dev);
- memory_region_init_io(&s->mmio, &stellaris_enet_ops, s, "stellaris_enet",
+ memory_region_init_io(&s->mmio, NULL, &stellaris_enet_ops, s, "stellaris_enet",
0x1000);
sysbus_init_mmio(dev, &s->mmio);
sysbus_init_irq(dev, &s->irq);
@@ -2073,17 +2073,17 @@ static int vmxnet3_pci_init(PCIDevice *pci_dev)
VMW_CBPRN("Starting init...");
- memory_region_init_io(&s->bar0, &b0_ops, s,
+ memory_region_init_io(&s->bar0, NULL, &b0_ops, s,
"vmxnet3-b0", VMXNET3_PT_REG_SIZE);
pci_register_bar(pci_dev, VMXNET3_BAR0_IDX,
PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar0);
- memory_region_init_io(&s->bar1, &b1_ops, s,
+ memory_region_init_io(&s->bar1, NULL, &b1_ops, s,
"vmxnet3-b1", VMXNET3_VD_REG_SIZE);
pci_register_bar(pci_dev, VMXNET3_BAR1_IDX,
PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar1);
- memory_region_init(&s->msix_bar, "vmxnet3-msix-bar",
+ memory_region_init(&s->msix_bar, NULL, "vmxnet3-msix-bar",
VMXNET3_MSIX_BAR_SIZE);
pci_register_bar(pci_dev, VMXNET3_MSIX_BAR_IDX,
PCI_BASE_ADDRESS_SPACE_MEMORY, &s->msix_bar);
@@ -382,7 +382,7 @@ static int xgmac_enet_init(SysBusDevice *dev)
{
struct XgmacState *s = FROM_SYSBUS(typeof(*s), dev);
- memory_region_init_io(&s->iomem, &enet_mem_ops, s, "xgmac", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &enet_mem_ops, s, "xgmac", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->sbd_irq);
sysbus_init_irq(dev, &s->pmt_irq);
@@ -1001,7 +1001,7 @@ static void xilinx_enet_init(Object *obj)
sysbus_init_irq(sbd, &s->irq);
- memory_region_init_io(&s->iomem, &enet_ops, s, "enet", 0x40000);
+ memory_region_init_io(&s->iomem, NULL, &enet_ops, s, "enet", 0x40000);
sysbus_init_mmio(sbd, &s->iomem);
}
@@ -221,7 +221,7 @@ static int xilinx_ethlite_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
s->rxbuf = 0;
- memory_region_init_io(&s->mmio, ð_ops, s, "xlnx.xps-ethernetlite",
+ memory_region_init_io(&s->mmio, NULL, ð_ops, s, "xlnx.xps-ethernetlite",
R_MAX * 4);
sysbus_init_mmio(dev, &s->mmio);
@@ -117,7 +117,7 @@ static int nvram_sysbus_initfn(SysBusDevice *dev)
s->contents = g_malloc0(s->chip_size);
- memory_region_init_io(&s->iomem, &nvram_ops, s, "nvram", s->chip_size);
+ memory_region_init_io(&s->iomem, NULL, &nvram_ops, s, "nvram", s->chip_size);
sysbus_init_mmio(dev, &s->iomem);
/* Read current file */
@@ -526,14 +526,14 @@ static int fw_cfg_init1(SysBusDevice *dev)
{
FWCfgState *s = FROM_SYSBUS(FWCfgState, dev);
- memory_region_init_io(&s->ctl_iomem, &fw_cfg_ctl_mem_ops, s,
+ memory_region_init_io(&s->ctl_iomem, NULL, &fw_cfg_ctl_mem_ops, s,
"fwcfg.ctl", FW_CFG_SIZE);
sysbus_init_mmio(dev, &s->ctl_iomem);
- memory_region_init_io(&s->data_iomem, &fw_cfg_data_mem_ops, s,
+ memory_region_init_io(&s->data_iomem, NULL, &fw_cfg_data_mem_ops, s,
"fwcfg.data", FW_CFG_DATA_SIZE);
sysbus_init_mmio(dev, &s->data_iomem);
/* In case ctl and data overlap: */
- memory_region_init_io(&s->comb_iomem, &fw_cfg_comb_mem_ops, s,
+ memory_region_init_io(&s->comb_iomem, NULL, &fw_cfg_comb_mem_ops, s,
"fwcfg", FW_CFG_SIZE);
if (s->ctl_iobase + 1 == s->data_iobase) {
@@ -115,7 +115,7 @@ static void macio_nvram_realizefn(DeviceState *dev, Error **errp)
s->data = g_malloc0(s->size);
- memory_region_init_io(&s->mem, &macio_nvram_ops, s, "macio-nvram",
+ memory_region_init_io(&s->mem, NULL, &macio_nvram_ops, s, "macio-nvram",
s->size << s->it_shift);
sysbus_init_mmio(d, &s->mem);
}
@@ -115,7 +115,7 @@ static void openrisc_sim_init(QEMUMachineInitArgs *args)
}
ram = g_malloc(sizeof(*ram));
- memory_region_init_ram(ram, "openrisc.ram", ram_size);
+ memory_region_init_ram(ram, NULL, "openrisc.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(get_system_memory(), 0, ram);
@@ -98,9 +98,9 @@ static int pci_dec_21154_device_init(SysBusDevice *dev)
phb = PCI_HOST_BRIDGE(dev);
- memory_region_init_io(&phb->conf_mem, &pci_host_conf_le_ops,
+ memory_region_init_io(&phb->conf_mem, NULL, &pci_host_conf_le_ops,
dev, "pci-conf-idx", 0x1000);
- memory_region_init_io(&phb->data_mem, &pci_host_data_le_ops,
+ memory_region_init_io(&phb->data_mem, NULL, &pci_host_data_le_ops,
dev, "pci-data-idx", 0x1000);
sysbus_init_mmio(dev, &phb->conf_mem);
sysbus_init_mmio(dev, &phb->data_mem);
@@ -46,7 +46,7 @@ static int pci_bridge_dev_initfn(PCIDevice *dev)
if (err) {
goto bridge_error;
}
- memory_region_init(&bridge_dev->bar, "shpc-bar", shpc_bar_size(dev));
+ memory_region_init(&bridge_dev->bar, NULL, "shpc-bar", shpc_bar_size(dev));
err = shpc_init(dev, &br->sec_bus, &bridge_dev->bar, 0);
if (err) {
goto shpc_error;
@@ -447,7 +447,7 @@ PCIBus *pci_apb_init(hwaddr special_base,
sysbus_mmio_map(s, 2, special_base + 0x2000000ULL);
d = FROM_SYSBUS(APBState, s);
- memory_region_init(&d->pci_mmio, "pci-mmio", 0x100000000ULL);
+ memory_region_init(&d->pci_mmio, NULL, "pci-mmio", 0x100000000ULL);
memory_region_add_subregion(get_system_memory(), mem_base, &d->pci_mmio);
d->bus = pci_register_bus(&d->busdev.qdev, "pci",
@@ -525,18 +525,18 @@ static int pci_pbm_init_device(SysBusDevice *dev)
s->pci_irq_in = 0ULL;
/* apb_config */
- memory_region_init_io(&s->apb_config, &apb_config_ops, s, "apb-config",
+ memory_region_init_io(&s->apb_config, NULL, &apb_config_ops, s, "apb-config",
0x10000);
/* at region 0 */
sysbus_init_mmio(dev, &s->apb_config);
- memory_region_init_io(&s->pci_config, &pci_config_ops, s, "apb-pci-config",
+ memory_region_init_io(&s->pci_config, NULL, &pci_config_ops, s, "apb-pci-config",
0x1000000);
/* at region 1 */
sysbus_init_mmio(dev, &s->pci_config);
/* pci_ioport */
- memory_region_init_io(&s->pci_ioport, &pci_ioport_ops, s,
+ memory_region_init_io(&s->pci_ioport, NULL, &pci_ioport_ops, s,
"apb-pci-ioport", 0x10000);
/* at region 2 */
sysbus_init_mmio(dev, &s->pci_ioport);
@@ -722,29 +722,29 @@ static int bonito_initfn(PCIDevice *dev)
pci_config_set_prog_interface(dev->config, 0x00);
/* set the north bridge register mapping */
- memory_region_init_io(&s->iomem, &bonito_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &bonito_ops, s,
"north-bridge-register", BONITO_INTERNAL_REG_SIZE);
sysbus_init_mmio(sysbus, &s->iomem);
sysbus_mmio_map(sysbus, 0, BONITO_INTERNAL_REG_BASE);
/* set the north bridge pci configure mapping */
- memory_region_init_io(&phb->conf_mem, &bonito_pciconf_ops, s,
+ memory_region_init_io(&phb->conf_mem, NULL, &bonito_pciconf_ops, s,
"north-bridge-pci-config", BONITO_PCICONFIG_SIZE);
sysbus_init_mmio(sysbus, &phb->conf_mem);
sysbus_mmio_map(sysbus, 1, BONITO_PCICONFIG_BASE);
/* set the south bridge pci configure mapping */
- memory_region_init_io(&phb->data_mem, &bonito_spciconf_ops, s,
+ memory_region_init_io(&phb->data_mem, NULL, &bonito_spciconf_ops, s,
"south-bridge-pci-config", BONITO_SPCICONFIG_SIZE);
sysbus_init_mmio(sysbus, &phb->data_mem);
sysbus_mmio_map(sysbus, 2, BONITO_SPCICONFIG_BASE);
- memory_region_init_io(&s->iomem_ldma, &bonito_ldma_ops, s,
+ memory_region_init_io(&s->iomem_ldma, NULL, &bonito_ldma_ops, s,
"ldma", 0x100);
sysbus_init_mmio(sysbus, &s->iomem_ldma);
sysbus_mmio_map(sysbus, 3, 0xbfe00200);
- memory_region_init_io(&s->iomem_cop, &bonito_cop_ops, s,
+ memory_region_init_io(&s->iomem_cop, NULL, &bonito_cop_ops, s,
"cop", 0x100);
sysbus_init_mmio(sysbus, &s->iomem_cop);
sysbus_mmio_map(sysbus, 4, 0xbfe00300);
@@ -76,8 +76,8 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
phb = PCI_HOST_BRIDGE(dev);
d = GRACKLE_PCI_HOST_BRIDGE(dev);
- memory_region_init(&d->pci_mmio, "pci-mmio", 0x100000000ULL);
- memory_region_init_alias(&d->pci_hole, "pci-hole", &d->pci_mmio,
+ memory_region_init(&d->pci_mmio, NULL, "pci-mmio", 0x100000000ULL);
+ memory_region_init_alias(&d->pci_hole, NULL, "pci-hole", &d->pci_mmio,
0x80000000ULL, 0x7e000000ULL);
memory_region_add_subregion(address_space_mem, 0x80000000ULL,
&d->pci_hole);
@@ -104,9 +104,9 @@ static int pci_grackle_init_device(SysBusDevice *dev)
phb = PCI_HOST_BRIDGE(dev);
- memory_region_init_io(&phb->conf_mem, &pci_host_conf_le_ops,
+ memory_region_init_io(&phb->conf_mem, NULL, &pci_host_conf_le_ops,
dev, "pci-conf-idx", 0x1000);
- memory_region_init_io(&phb->data_mem, &pci_host_data_le_ops,
+ memory_region_init_io(&phb->data_mem, NULL, &pci_host_data_le_ops,
dev, "pci-data-idx", 0x1000);
sysbus_init_mmio(dev, &phb->conf_mem);
sysbus_init_mmio(dev, &phb->data_mem);
@@ -56,17 +56,17 @@ void init_pam(MemoryRegion *ram_memory, MemoryRegion *system_memory,
int i;
/* RAM */
- memory_region_init_alias(&mem->alias[3], "pam-ram", ram_memory,
+ memory_region_init_alias(&mem->alias[3], NULL, "pam-ram", ram_memory,
start, size);
/* ROM (XXX: not quite correct) */
- memory_region_init_alias(&mem->alias[1], "pam-rom", ram_memory,
+ memory_region_init_alias(&mem->alias[1], NULL, "pam-rom", ram_memory,
start, size);
memory_region_set_readonly(&mem->alias[1], true);
/* XXX: should distinguish read/write cases */
- memory_region_init_alias(&mem->alias[0], "pam-pci", pci_address_space,
+ memory_region_init_alias(&mem->alias[0], NULL, "pam-pci", pci_address_space,
start, size);
- memory_region_init_alias(&mem->alias[2], "pam-pci", pci_address_space,
+ memory_region_init_alias(&mem->alias[2], NULL, "pam-pci", pci_address_space,
start, size);
for (i = 0; i < 4; ++i) {
@@ -201,12 +201,12 @@ static int i440fx_pcihost_initfn(SysBusDevice *dev)
{
PCIHostState *s = PCI_HOST_BRIDGE(dev);
- memory_region_init_io(&s->conf_mem, &pci_host_conf_le_ops, s,
+ memory_region_init_io(&s->conf_mem, NULL, &pci_host_conf_le_ops, s,
"pci-conf-idx", 4);
sysbus_add_io(dev, 0xcf8, &s->conf_mem);
sysbus_init_ioports(&s->busdev, 0xcf8, 4);
- memory_region_init_io(&s->data_mem, &pci_host_data_le_ops, s,
+ memory_region_init_io(&s->data_mem, NULL, &pci_host_data_le_ops, s,
"pci-conf-data", 4);
sysbus_add_io(dev, 0xcfc, &s->data_mem);
sysbus_init_ioports(&s->busdev, 0xcfc, 4);
@@ -260,17 +260,17 @@ static PCIBus *i440fx_common_init(const char *device_name,
f->system_memory = address_space_mem;
f->pci_address_space = pci_address_space;
f->ram_memory = ram_memory;
- memory_region_init_alias(&f->pci_hole, "pci-hole", f->pci_address_space,
+ memory_region_init_alias(&f->pci_hole, NULL, "pci-hole", f->pci_address_space,
pci_hole_start, pci_hole_size);
memory_region_add_subregion(f->system_memory, pci_hole_start, &f->pci_hole);
- memory_region_init_alias(&f->pci_hole_64bit, "pci-hole64",
+ memory_region_init_alias(&f->pci_hole_64bit, NULL, "pci-hole64",
f->pci_address_space,
pci_hole64_start, pci_hole64_size);
if (pci_hole64_size) {
memory_region_add_subregion(f->system_memory, pci_hole64_start,
&f->pci_hole_64bit);
}
- memory_region_init_alias(&f->smram_region, "smram-region",
+ memory_region_init_alias(&f->smram_region, NULL, "smram-region",
f->pci_address_space, 0xa0000, 0x20000);
memory_region_add_subregion_overlap(f->system_memory, 0xa0000,
&f->smram_region, 1);
@@ -549,7 +549,7 @@ static int piix3_initfn(PCIDevice *dev)
isa_bus_new(DEVICE(d), pci_address_space_io(dev));
- memory_region_init_io(&d->rcr_mem, &rcr_ops, d, "piix3-reset-control", 1);
+ memory_region_init_io(&d->rcr_mem, NULL, &rcr_ops, d, "piix3-reset-control", 1);
memory_region_add_subregion_overlap(pci_address_space_io(dev), RCR_IOPORT,
&d->rcr_mem, 1);
@@ -330,7 +330,7 @@ static int e500_pcihost_bridge_initfn(PCIDevice *d)
(d->config[PCI_HEADER_TYPE] & PCI_HEADER_TYPE_MULTI_FUNCTION) |
PCI_HEADER_TYPE_BRIDGE;
- memory_region_init_alias(&b->bar0, "e500-pci-bar0", &ccsr->ccsr_space,
+ memory_region_init_alias(&b->bar0, NULL, "e500-pci-bar0", &ccsr->ccsr_space,
0, int128_get64(ccsr->ccsr_space.size));
pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &b->bar0);
@@ -352,7 +352,7 @@ static int e500_pcihost_initfn(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq[i]);
}
- memory_region_init(&s->pio, "pci-pio", PCIE500_PCI_IOLEN);
+ memory_region_init(&s->pio, NULL, "pci-pio", PCIE500_PCI_IOLEN);
b = pci_register_bus(DEVICE(dev), NULL, mpc85xx_pci_set_irq,
mpc85xx_pci_map_irq, s->irq, address_space_mem,
@@ -361,12 +361,12 @@ static int e500_pcihost_initfn(SysBusDevice *dev)
pci_create_simple(b, 0, "e500-host-bridge");
- memory_region_init(&s->container, "pci-container", PCIE500_ALL_SIZE);
- memory_region_init_io(&h->conf_mem, &pci_host_conf_be_ops, h,
+ memory_region_init(&s->container, NULL, "pci-container", PCIE500_ALL_SIZE);
+ memory_region_init_io(&h->conf_mem, NULL, &pci_host_conf_be_ops, h,
"pci-conf-idx", 4);
- memory_region_init_io(&h->data_mem, &pci_host_data_le_ops, h,
+ memory_region_init_io(&h->data_mem, NULL, &pci_host_data_le_ops, h,
"pci-conf-data", 4);
- memory_region_init_io(&s->iomem, &e500_pci_reg_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &e500_pci_reg_ops, s,
"pci.reg", PCIE500_REG_SIZE);
memory_region_add_subregion(&s->container, PCIE500_CFGADDR, &h->conf_mem);
memory_region_add_subregion(&s->container, PCIE500_CFGDATA, &h->data_mem);
@@ -125,20 +125,20 @@ static void raven_pcihost_realizefn(DeviceState *d, Error **errp)
pci_bus_irqs(&s->pci_bus, prep_set_irq, prep_map_irq, s->irq, 4);
- memory_region_init_io(&h->conf_mem, &pci_host_conf_be_ops, s,
+ memory_region_init_io(&h->conf_mem, NULL, &pci_host_conf_be_ops, s,
"pci-conf-idx", 1);
sysbus_add_io(dev, 0xcf8, &h->conf_mem);
sysbus_init_ioports(&h->busdev, 0xcf8, 1);
- memory_region_init_io(&h->data_mem, &pci_host_data_be_ops, s,
+ memory_region_init_io(&h->data_mem, NULL, &pci_host_data_be_ops, s,
"pci-conf-data", 1);
sysbus_add_io(dev, 0xcfc, &h->data_mem);
sysbus_init_ioports(&h->busdev, 0xcfc, 1);
- memory_region_init_io(&h->mmcfg, &PPC_PCIIO_ops, s, "pciio", 0x00400000);
+ memory_region_init_io(&h->mmcfg, NULL, &PPC_PCIIO_ops, s, "pciio", 0x00400000);
memory_region_add_subregion(address_space_mem, 0x80800000, &h->mmcfg);
- memory_region_init_io(&s->intack, &PPC_intack_ops, s, "pci-intack", 1);
+ memory_region_init_io(&s->intack, NULL, &PPC_intack_ops, s, "pci-intack", 1);
memory_region_add_subregion(address_space_mem, 0xbffffff0, &s->intack);
/* TODO Remove once realize propagates to child devices. */
@@ -40,12 +40,12 @@ static int q35_host_init(SysBusDevice *dev)
PCIHostState *pci = FROM_SYSBUS(PCIHostState, dev);
Q35PCIHost *s = Q35_HOST_DEVICE(&dev->qdev);
- memory_region_init_io(&pci->conf_mem, &pci_host_conf_le_ops, pci,
+ memory_region_init_io(&pci->conf_mem, NULL, &pci_host_conf_le_ops, pci,
"pci-conf-idx", 4);
sysbus_add_io(dev, MCH_HOST_BRIDGE_CONFIG_ADDR, &pci->conf_mem);
sysbus_init_ioports(&pci->busdev, MCH_HOST_BRIDGE_CONFIG_ADDR, 4);
- memory_region_init_io(&pci->data_mem, &pci_host_data_le_ops, pci,
+ memory_region_init_io(&pci->data_mem, NULL, &pci_host_data_le_ops, pci,
"pci-conf-data", 4);
sysbus_add_io(dev, MCH_HOST_BRIDGE_CONFIG_DATA, &pci->data_mem);
sysbus_init_ioports(&pci->busdev, MCH_HOST_BRIDGE_CONFIG_DATA, 4);
@@ -245,7 +245,7 @@ static int mch_init(PCIDevice *d)
MCHPCIState *mch = MCH_PCI_DEVICE(d);
/* setup pci memory regions */
- memory_region_init_alias(&mch->pci_hole, "pci-hole",
+ memory_region_init_alias(&mch->pci_hole, NULL, "pci-hole",
mch->pci_address_space,
mch->below_4g_mem_size,
0x100000000ULL - mch->below_4g_mem_size);
@@ -253,7 +253,7 @@ static int mch_init(PCIDevice *d)
&mch->pci_hole);
pci_hole64_size = (sizeof(hwaddr) == 4 ? 0 :
((uint64_t)1 << 62));
- memory_region_init_alias(&mch->pci_hole_64bit, "pci-hole64",
+ memory_region_init_alias(&mch->pci_hole_64bit, NULL, "pci-hole64",
mch->pci_address_space,
0x100000000ULL + mch->above_4g_mem_size,
pci_hole64_size);
@@ -264,7 +264,7 @@ static int mch_init(PCIDevice *d)
}
/* smram */
cpu_smm_register(&mch_set_smm, mch);
- memory_region_init_alias(&mch->smram_region, "smram-region",
+ memory_region_init_alias(&mch->smram_region, NULL, "smram-region",
mch->pci_address_space, 0xa0000, 0x20000);
memory_region_add_subregion_overlap(mch->system_memory, 0xa0000,
&mch->smram_region, 1);
@@ -152,9 +152,9 @@ static int pci_unin_main_init_device(SysBusDevice *dev)
/* Uninorth main bus */
h = PCI_HOST_BRIDGE(dev);
- memory_region_init_io(&h->conf_mem, &pci_host_conf_le_ops,
+ memory_region_init_io(&h->conf_mem, NULL, &pci_host_conf_le_ops,
dev, "pci-conf-idx", 0x1000);
- memory_region_init_io(&h->data_mem, &unin_data_ops, dev,
+ memory_region_init_io(&h->data_mem, NULL, &unin_data_ops, dev,
"pci-conf-data", 0x1000);
sysbus_init_mmio(dev, &h->conf_mem);
sysbus_init_mmio(dev, &h->data_mem);
@@ -170,9 +170,9 @@ static int pci_u3_agp_init_device(SysBusDevice *dev)
/* Uninorth U3 AGP bus */
h = PCI_HOST_BRIDGE(dev);
- memory_region_init_io(&h->conf_mem, &pci_host_conf_le_ops,
+ memory_region_init_io(&h->conf_mem, NULL, &pci_host_conf_le_ops,
dev, "pci-conf-idx", 0x1000);
- memory_region_init_io(&h->data_mem, &unin_data_ops, dev,
+ memory_region_init_io(&h->data_mem, NULL, &unin_data_ops, dev,
"pci-conf-data", 0x1000);
sysbus_init_mmio(dev, &h->conf_mem);
sysbus_init_mmio(dev, &h->data_mem);
@@ -187,9 +187,9 @@ static int pci_unin_agp_init_device(SysBusDevice *dev)
/* Uninorth AGP bus */
h = PCI_HOST_BRIDGE(dev);
- memory_region_init_io(&h->conf_mem, &pci_host_conf_le_ops,
+ memory_region_init_io(&h->conf_mem, NULL, &pci_host_conf_le_ops,
dev, "pci-conf-idx", 0x1000);
- memory_region_init_io(&h->data_mem, &pci_host_data_le_ops,
+ memory_region_init_io(&h->data_mem, NULL, &pci_host_data_le_ops,
dev, "pci-conf-data", 0x1000);
sysbus_init_mmio(dev, &h->conf_mem);
sysbus_init_mmio(dev, &h->data_mem);
@@ -203,9 +203,9 @@ static int pci_unin_internal_init_device(SysBusDevice *dev)
/* Uninorth internal bus */
h = PCI_HOST_BRIDGE(dev);
- memory_region_init_io(&h->conf_mem, &pci_host_conf_le_ops,
+ memory_region_init_io(&h->conf_mem, NULL, &pci_host_conf_le_ops,
dev, "pci-conf-idx", 0x1000);
- memory_region_init_io(&h->data_mem, &pci_host_data_le_ops,
+ memory_region_init_io(&h->data_mem, NULL, &pci_host_data_le_ops,
dev, "pci-conf-data", 0x1000);
sysbus_init_mmio(dev, &h->conf_mem);
sysbus_init_mmio(dev, &h->data_mem);
@@ -228,8 +228,8 @@ PCIBus *pci_pmac_init(qemu_irq *pic,
s = SYS_BUS_DEVICE(dev);
h = PCI_HOST_BRIDGE(s);
d = UNI_NORTH_PCI_HOST_BRIDGE(dev);
- memory_region_init(&d->pci_mmio, "pci-mmio", 0x100000000ULL);
- memory_region_init_alias(&d->pci_hole, "pci-hole", &d->pci_mmio,
+ memory_region_init(&d->pci_mmio, NULL, "pci-mmio", 0x100000000ULL);
+ memory_region_init_alias(&d->pci_hole, NULL, "pci-hole", &d->pci_mmio,
0x80000000ULL, 0x70000000ULL);
memory_region_add_subregion(address_space_mem, 0x80000000ULL,
&d->pci_hole);
@@ -294,8 +294,8 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic,
h = PCI_HOST_BRIDGE(dev);
d = U3_AGP_HOST_BRIDGE(dev);
- memory_region_init(&d->pci_mmio, "pci-mmio", 0x100000000ULL);
- memory_region_init_alias(&d->pci_hole, "pci-hole", &d->pci_mmio,
+ memory_region_init(&d->pci_mmio, NULL, "pci-mmio", 0x100000000ULL);
+ memory_region_init_alias(&d->pci_hole, NULL, "pci-hole", &d->pci_mmio,
0x80000000ULL, 0x70000000ULL);
memory_region_add_subregion(address_space_mem, 0x80000000ULL,
&d->pci_hole);
@@ -381,8 +381,8 @@ static void pci_vpb_init(Object *obj)
PCIHostState *h = PCI_HOST_BRIDGE(obj);
PCIVPBState *s = PCI_VPB(obj);
- memory_region_init(&s->pci_io_space, "pci_io", 1ULL << 32);
- memory_region_init(&s->pci_mem_space, "pci_mem", 1ULL << 32);
+ memory_region_init(&s->pci_io_space, NULL, "pci_io", 1ULL << 32);
+ memory_region_init(&s->pci_mem_space, NULL, "pci_mem", 1ULL << 32);
pci_bus_new_inplace(&s->pci_bus, DEVICE(obj), "pci",
&s->pci_mem_space, &s->pci_io_space,
@@ -424,20 +424,20 @@ static void pci_vpb_realize(DeviceState *dev, Error **errp)
* 3 : PCI IO window
* 4..6 : PCI memory windows
*/
- memory_region_init_io(&s->controlregs, &pci_vpb_reg_ops, s, "pci-vpb-regs",
+ memory_region_init_io(&s->controlregs, NULL, &pci_vpb_reg_ops, s, "pci-vpb-regs",
0x1000);
sysbus_init_mmio(sbd, &s->controlregs);
- memory_region_init_io(&s->mem_config, &pci_vpb_config_ops, s,
+ memory_region_init_io(&s->mem_config, NULL, &pci_vpb_config_ops, s,
"pci-vpb-selfconfig", 0x1000000);
sysbus_init_mmio(sbd, &s->mem_config);
- memory_region_init_io(&s->mem_config2, &pci_vpb_config_ops, s,
+ memory_region_init_io(&s->mem_config2, NULL, &pci_vpb_config_ops, s,
"pci-vpb-config", 0x1000000);
sysbus_init_mmio(sbd, &s->mem_config2);
/* The window into I/O space is always into a fixed base address;
* its size is the same for both realview and versatile.
*/
- memory_region_init_alias(&s->pci_io_window, "pci-vbp-io-window",
+ memory_region_init_alias(&s->pci_io_window, NULL, "pci-vbp-io-window",
&s->pci_io_space, 0, 0x100000);
sysbus_init_mmio(sbd, &s->pci_io_space);
@@ -447,7 +447,7 @@ static void pci_vpb_realize(DeviceState *dev, Error **errp)
* offsets are guest controllable via the IMAP registers.
*/
for (i = 0; i < 3; i++) {
- memory_region_init_alias(&s->pci_mem_window[i], "pci-vbp-window",
+ memory_region_init_alias(&s->pci_mem_window[i], NULL, "pci-vbp-window",
&s->pci_mem_space, 0, s->mem_win_size[i]);
sysbus_init_mmio(sbd, &s->pci_mem_window[i]);
}
@@ -280,10 +280,10 @@ int msix_init(struct PCIDevice *dev, unsigned short nentries,
msix_mask_all(dev, nentries);
- memory_region_init_io(&dev->msix_table_mmio, &msix_table_mmio_ops, dev,
+ memory_region_init_io(&dev->msix_table_mmio, NULL, &msix_table_mmio_ops, dev,
"msix-table", table_size);
memory_region_add_subregion(table_bar, table_offset, &dev->msix_table_mmio);
- memory_region_init_io(&dev->msix_pba_mmio, &msix_pba_mmio_ops, dev,
+ memory_region_init_io(&dev->msix_pba_mmio, NULL, &msix_pba_mmio_ops, dev,
"msix-pba", pba_size);
memory_region_add_subregion(pba_bar, pba_offset, &dev->msix_pba_mmio);
@@ -311,7 +311,7 @@ int msix_init_exclusive_bar(PCIDevice *dev, unsigned short nentries,
}
name = g_strdup_printf("%s-msix", dev->name);
- memory_region_init(&dev->msix_exclusive_bar, name, MSIX_EXCLUSIVE_BAR_SIZE);
+ memory_region_init(&dev->msix_exclusive_bar, NULL, name, MSIX_EXCLUSIVE_BAR_SIZE);
g_free(name);
ret = msix_init(dev, nentries, &dev->msix_exclusive_bar, bar_nr,
@@ -811,7 +811,7 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, PCIBus *bus,
dma_as = &address_space_memory;
}
- memory_region_init_alias(&pci_dev->bus_master_enable_region, "bus master",
+ memory_region_init_alias(&pci_dev->bus_master_enable_region, NULL, "bus master",
dma_as->root, 0, memory_region_size(dma_as->root));
memory_region_set_enabled(&pci_dev->bus_master_enable_region, false);
address_space_init(&pci_dev->bus_master_as, &pci_dev->bus_master_enable_region,
@@ -1945,7 +1945,7 @@ static int pci_add_option_rom(PCIDevice *pdev, bool is_default_rom)
snprintf(name, sizeof(name), "%s.rom", object_get_typename(OBJECT(pdev)));
}
pdev->has_rom = true;
- memory_region_init_ram(&pdev->rom, name, size);
+ memory_region_init_ram(&pdev->rom, NULL, name, size);
vmstate_register_ram(&pdev->rom, &pdev->qdev);
ptr = memory_region_get_ram_ptr(&pdev->rom);
load_image(path, ptr);
@@ -147,7 +147,7 @@ static void pci_bridge_init_alias(PCIBridge *bridge, MemoryRegion *alias,
* Apparently no way to do this with existing memory APIs. */
pcibus_t size = enabled && limit >= base ? limit + 1 - base : 0;
- memory_region_init_alias(alias, name, space, base, size);
+ memory_region_init_alias(alias, NULL, name, space, base, size);
memory_region_add_subregion_overlap(parent_space, base, alias, 1);
}
@@ -156,13 +156,13 @@ static void pci_bridge_init_vga_aliases(PCIBridge *br, PCIBus *parent,
{
uint16_t brctl = pci_get_word(br->dev.config + PCI_BRIDGE_CONTROL);
- memory_region_init_alias(&alias_vga[QEMU_PCI_VGA_IO_LO],
+ memory_region_init_alias(&alias_vga[QEMU_PCI_VGA_IO_LO], NULL,
"pci_bridge_vga_io_lo", &br->address_space_io,
QEMU_PCI_VGA_IO_LO_BASE, QEMU_PCI_VGA_IO_LO_SIZE);
- memory_region_init_alias(&alias_vga[QEMU_PCI_VGA_IO_HI],
+ memory_region_init_alias(&alias_vga[QEMU_PCI_VGA_IO_HI], NULL,
"pci_bridge_vga_io_hi", &br->address_space_io,
QEMU_PCI_VGA_IO_HI_BASE, QEMU_PCI_VGA_IO_HI_SIZE);
- memory_region_init_alias(&alias_vga[QEMU_PCI_VGA_MEM],
+ memory_region_init_alias(&alias_vga[QEMU_PCI_VGA_MEM], NULL,
"pci_bridge_vga_mem", &br->address_space_mem,
QEMU_PCI_VGA_MEM_BASE, QEMU_PCI_VGA_MEM_SIZE);
@@ -367,9 +367,9 @@ int pci_bridge_initfn(PCIDevice *dev, const char *typename)
sec_bus->parent_dev = dev;
sec_bus->map_irq = br->map_irq ? br->map_irq : pci_swizzle_map_irq_fn;
sec_bus->address_space_mem = &br->address_space_mem;
- memory_region_init(&br->address_space_mem, "pci_bridge_pci", INT64_MAX);
+ memory_region_init(&br->address_space_mem, NULL, "pci_bridge_pci", INT64_MAX);
sec_bus->address_space_io = &br->address_space_io;
- memory_region_init(&br->address_space_io, "pci_bridge_io", 65536);
+ memory_region_init(&br->address_space_io, NULL, "pci_bridge_io", 65536);
br->windows = pci_bridge_region_init(br);
QLIST_INIT(&sec_bus->child);
QLIST_INSERT_HEAD(&parent->child, sec_bus, sibling);
@@ -130,7 +130,7 @@ void pcie_host_mmcfg_map(PCIExpressHost *e, hwaddr addr,
assert(size >= PCIE_MMCFG_SIZE_MIN);
assert(size <= PCIE_MMCFG_SIZE_MAX);
e->size = size;
- memory_region_init_io(&e->mmio, &pcie_mmcfg_ops, e, "pcie-mmcfg", e->size);
+ memory_region_init_io(&e->mmio, NULL, &pcie_mmcfg_ops, e, "pcie-mmcfg", e->size);
e->base_addr = addr;
memory_region_add_subregion(get_system_memory(), e->base_addr, &e->mmio);
}
@@ -612,7 +612,7 @@ int shpc_init(PCIDevice *d, PCIBus *sec_bus, MemoryRegion *bar, unsigned offset)
}
/* TODO: init cmask */
- memory_region_init_io(&shpc->mmio, &shpc_mmio_ops, d, "shpc-mmio",
+ memory_region_init_io(&shpc->mmio, NULL, &shpc_mmio_ops, d, "shpc-mmio",
SHPC_SIZEOF(d));
shpc_cap_update_dword(d);
memory_region_add_subregion(bar, offset, &shpc->mmio);
@@ -550,7 +550,7 @@ void ppce500_init(PPCE500Params *params)
params->ram_size = ram_size;
/* Register Memory */
- memory_region_init_ram(ram, "mpc8544ds.ram", ram_size);
+ memory_region_init_ram(ram, NULL, "mpc8544ds.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, 0, ram);
@@ -702,7 +702,7 @@ static int e500_ccsr_initfn(SysBusDevice *dev)
PPCE500CCSRState *ccsr;
ccsr = CCSR(dev);
- memory_region_init(&ccsr->ccsr_space, "e500-ccsr",
+ memory_region_init(&ccsr->ccsr_space, NULL, "e500-ccsr",
MPC8544_CCSRBAR_SIZE);
return 0;
}
@@ -186,12 +186,12 @@ static void ppc_core99_init(QEMUMachineInitArgs *args)
}
/* allocate RAM */
- memory_region_init_ram(ram, "ppc_core99.ram", ram_size);
+ memory_region_init_ram(ram, NULL, "ppc_core99.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(get_system_memory(), 0, ram);
/* allocate and load BIOS */
- memory_region_init_ram(bios, "ppc_core99.bios", BIOS_SIZE);
+ memory_region_init_ram(bios, NULL, "ppc_core99.bios", BIOS_SIZE);
vmstate_register_ram_global(bios);
if (bios_name == NULL)
bios_name = PROM_FILENAME;
@@ -280,7 +280,7 @@ static void ppc_core99_init(QEMUMachineInitArgs *args)
isa_mmio_init(0xf2000000, 0x00800000);
/* UniN init */
- memory_region_init_io(unin_memory, &unin_ops, NULL, "unin", 0x1000);
+ memory_region_init_io(unin_memory, NULL, &unin_ops, NULL, "unin", 0x1000);
memory_region_add_subregion(get_system_memory(), 0xf8000000, unin_memory);
openpic_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
@@ -358,7 +358,7 @@ static void ppc_core99_init(QEMUMachineInitArgs *args)
escc_mem = escc_init(0, pic[0x25], pic[0x24],
serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
- memory_region_init_alias(escc_bar, "escc-bar",
+ memory_region_init_alias(escc_bar, NULL, "escc-bar",
escc_mem, 0, memory_region_size(escc_mem));
for(i = 0; i < nb_nics; i++)
@@ -126,12 +126,12 @@ static void ppc_heathrow_init(QEMUMachineInitArgs *args)
exit(1);
}
- memory_region_init_ram(ram, "ppc_heathrow.ram", ram_size);
+ memory_region_init_ram(ram, NULL, "ppc_heathrow.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(sysmem, 0, ram);
/* allocate and load BIOS */
- memory_region_init_ram(bios, "ppc_heathrow.bios", BIOS_SIZE);
+ memory_region_init_ram(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE);
vmstate_register_ram_global(bios);
if (bios_name == NULL)
bios_name = PROM_FILENAME;
@@ -255,7 +255,7 @@ static void ppc_heathrow_init(QEMUMachineInitArgs *args)
escc_mem = escc_init(0, pic[0x0f], pic[0x10], serial_hds[0],
serial_hds[1], ESCC_CLOCK, 4);
- memory_region_init_alias(escc_bar, "escc-bar",
+ memory_region_init_alias(escc_bar, NULL, "escc-bar",
escc_mem, 0, memory_region_size(escc_mem));
for(i = 0; i < nb_nics; i++)
@@ -114,7 +114,7 @@ static int mpc8544_guts_initfn(SysBusDevice *dev)
s = FROM_SYSBUS(GutsState, SYS_BUS_DEVICE(dev));
- memory_region_init_io(&s->iomem, &mpc8544_guts_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &mpc8544_guts_ops, s,
"mpc6544.guts", MPC8544_GUTS_MMIO_SIZE);
sysbus_init_mmio(dev, &s->iomem);
@@ -164,7 +164,7 @@ static void ref405ep_fpga_init(MemoryRegion *sysmem, uint32_t base)
MemoryRegion *fpga_memory = g_new(MemoryRegion, 1);
fpga = g_malloc0(sizeof(ref405ep_fpga_t));
- memory_region_init_io(fpga_memory, &ref405ep_fpga_ops, fpga,
+ memory_region_init_io(fpga_memory, NULL, &ref405ep_fpga_ops, fpga,
"fpga", 0x00000100);
memory_region_add_subregion(sysmem, base, fpga_memory);
qemu_register_reset(&ref405ep_fpga_reset, fpga);
@@ -197,11 +197,11 @@ static void ref405ep_init(QEMUMachineInitArgs *args)
MemoryRegion *sysmem = get_system_memory();
/* XXX: fix this */
- memory_region_init_ram(&ram_memories[0], "ef405ep.ram", 0x08000000);
+ memory_region_init_ram(&ram_memories[0], NULL, "ef405ep.ram", 0x08000000);
vmstate_register_ram_global(&ram_memories[0]);
ram_bases[0] = 0;
ram_sizes[0] = 0x08000000;
- memory_region_init(&ram_memories[1], "ef405ep.ram1", 0);
+ memory_region_init(&ram_memories[1], NULL, "ef405ep.ram1", 0);
ram_bases[1] = 0x00000000;
ram_sizes[1] = 0x00000000;
ram_size = 128 * 1024 * 1024;
@@ -212,7 +212,7 @@ static void ref405ep_init(QEMUMachineInitArgs *args)
33333333, &pic, kernel_filename == NULL ? 0 : 1);
/* allocate SRAM */
sram_size = 512 * 1024;
- memory_region_init_ram(sram, "ef405ep.sram", sram_size);
+ memory_region_init_ram(sram, NULL, "ef405ep.sram", sram_size);
vmstate_register_ram_global(sram);
memory_region_add_subregion(sysmem, 0xFFF00000, sram);
/* allocate and load BIOS */
@@ -244,7 +244,7 @@ static void ref405ep_init(QEMUMachineInitArgs *args)
printf("Load BIOS from file\n");
#endif
bios = g_new(MemoryRegion, 1);
- memory_region_init_ram(bios, "ef405ep.bios", BIOS_SIZE);
+ memory_region_init_ram(bios, NULL, "ef405ep.bios", BIOS_SIZE);
vmstate_register_ram_global(bios);
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
@@ -490,7 +490,7 @@ static void taihu_cpld_init(MemoryRegion *sysmem, uint32_t base)
MemoryRegion *cpld_memory = g_new(MemoryRegion, 1);
cpld = g_malloc0(sizeof(taihu_cpld_t));
- memory_region_init_io(cpld_memory, &taihu_cpld_ops, cpld, "cpld", 0x100);
+ memory_region_init_io(cpld_memory, NULL, &taihu_cpld_ops, cpld, "cpld", 0x100);
memory_region_add_subregion(sysmem, base, cpld_memory);
qemu_register_reset(&taihu_cpld_reset, cpld);
}
@@ -514,12 +514,12 @@ static void taihu_405ep_init(QEMUMachineInitArgs *args)
DriveInfo *dinfo;
/* RAM is soldered to the board so the size cannot be changed */
- memory_region_init_ram(&ram_memories[0],
+ memory_region_init_ram(&ram_memories[0], NULL,
"taihu_405ep.ram-0", 0x04000000);
vmstate_register_ram_global(&ram_memories[0]);
ram_bases[0] = 0;
ram_sizes[0] = 0x04000000;
- memory_region_init_ram(&ram_memories[1],
+ memory_region_init_ram(&ram_memories[1], NULL,
"taihu_405ep.ram-1", 0x04000000);
vmstate_register_ram_global(&ram_memories[1]);
ram_bases[1] = 0x04000000;
@@ -563,7 +563,7 @@ static void taihu_405ep_init(QEMUMachineInitArgs *args)
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
bios = g_new(MemoryRegion, 1);
- memory_region_init_ram(bios, "taihu_405ep.bios", BIOS_SIZE);
+ memory_region_init_ram(bios, NULL, "taihu_405ep.bios", BIOS_SIZE);
vmstate_register_ram_global(bios);
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
if (filename) {
@@ -390,7 +390,7 @@ static void ppc4xx_opba_init(hwaddr base)
#ifdef DEBUG_OPBA
printf("%s: offset " TARGET_FMT_plx "\n", __func__, base);
#endif
- memory_region_init_io(&opba->io, &opba_ops, opba, "opba", 0x002);
+ memory_region_init_io(&opba->io, NULL, &opba_ops, opba, "opba", 0x002);
memory_region_add_subregion(get_system_memory(), base, &opba->io);
qemu_register_reset(ppc4xx_opba_reset, opba);
}
@@ -812,7 +812,7 @@ static void ppc405_gpio_init(hwaddr base)
#ifdef DEBUG_GPIO
printf("%s: offset " TARGET_FMT_plx "\n", __func__, base);
#endif
- memory_region_init_io(&gpio->io, &ppc405_gpio_ops, gpio, "pgio", 0x038);
+ memory_region_init_io(&gpio->io, NULL, &ppc405_gpio_ops, gpio, "pgio", 0x038);
memory_region_add_subregion(get_system_memory(), base, &gpio->io);
qemu_register_reset(&ppc405_gpio_reset, gpio);
}
@@ -972,9 +972,9 @@ static void ppc405_ocm_init(CPUPPCState *env)
ocm = g_malloc0(sizeof(ppc405_ocm_t));
/* XXX: Size is 4096 or 0x04000000 */
- memory_region_init_ram(&ocm->isarc_ram, "ppc405.ocm", 4096);
+ memory_region_init_ram(&ocm->isarc_ram, NULL, "ppc405.ocm", 4096);
vmstate_register_ram_global(&ocm->isarc_ram);
- memory_region_init_alias(&ocm->dsarc_ram, "ppc405.dsarc", &ocm->isarc_ram,
+ memory_region_init_alias(&ocm->dsarc_ram, NULL, "ppc405.dsarc", &ocm->isarc_ram,
0, 4096);
qemu_register_reset(&ocm_reset, ocm);
ppc_dcr_register(env, OCM0_ISARC,
@@ -1222,7 +1222,7 @@ static void ppc405_i2c_init(hwaddr base, qemu_irq irq)
#ifdef DEBUG_I2C
printf("%s: offset " TARGET_FMT_plx "\n", __func__, base);
#endif
- memory_region_init_io(&i2c->iomem, &i2c_ops, i2c, "i2c", 0x011);
+ memory_region_init_io(&i2c->iomem, NULL, &i2c_ops, i2c, "i2c", 0x011);
memory_region_add_subregion(get_system_memory(), base, &i2c->iomem);
qemu_register_reset(ppc4xx_i2c_reset, i2c);
}
@@ -1501,7 +1501,7 @@ static void ppc4xx_gpt_init(hwaddr base, qemu_irq irqs[5])
#ifdef DEBUG_GPT
printf("%s: offset " TARGET_FMT_plx "\n", __func__, base);
#endif
- memory_region_init_io(&gpt->iomem, &gpt_ops, gpt, "gpt", 0x0d4);
+ memory_region_init_io(&gpt->iomem, NULL, &gpt_ops, gpt, "gpt", 0x0d4);
memory_region_add_subregion(get_system_memory(), base, &gpt->iomem);
qemu_register_reset(ppc4xx_gpt_reset, gpt);
}
@@ -431,7 +431,7 @@ static void sdram_set_bcr(ppc4xx_sdram_t *sdram,
printf("%s: Map RAM area " TARGET_FMT_plx " " TARGET_FMT_lx "\n",
__func__, sdram_base(bcr), sdram_size(bcr));
#endif
- memory_region_init(&sdram->containers[n], "sdram-containers",
+ memory_region_init(&sdram->containers[n], NULL, "sdram-containers",
sdram_size(bcr));
memory_region_add_subregion(&sdram->containers[n], 0,
&sdram->ram_memories[n]);
@@ -696,7 +696,7 @@ ram_addr_t ppc4xx_sdram_adjust(ram_addr_t ram_size, int nr_banks,
if (bank_size <= size_left) {
char name[32];
snprintf(name, sizeof(name), "ppc4xx.sdram%d", i);
- memory_region_init_ram(&ram_memories[i], name, bank_size);
+ memory_region_init_ram(&ram_memories[i], NULL, name, bank_size);
vmstate_register_ram_global(&ram_memories[i]);
ram_bases[i] = base;
ram_sizes[i] = bank_size;
@@ -355,12 +355,12 @@ static int ppc4xx_pcihost_initfn(SysBusDevice *dev)
pci_create_simple(b, 0, "ppc4xx-host-bridge");
/* XXX split into 2 memory regions, one for config space, one for regs */
- memory_region_init(&s->container, "pci-container", PCI_ALL_SIZE);
- memory_region_init_io(&h->conf_mem, &pci_host_conf_le_ops, h,
+ memory_region_init(&s->container, NULL, "pci-container", PCI_ALL_SIZE);
+ memory_region_init_io(&h->conf_mem, NULL, &pci_host_conf_le_ops, h,
"pci-conf-idx", 4);
- memory_region_init_io(&h->data_mem, &pci_host_data_le_ops, h,
+ memory_region_init_io(&h->data_mem, NULL, &pci_host_data_le_ops, h,
"pci-conf-data", 4);
- memory_region_init_io(&s->iomem, &pci_reg_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &pci_reg_ops, s,
"pci.reg", PCI_REG_SIZE);
memory_region_add_subregion(&s->container, PCIC0_CFGADDR, &h->conf_mem);
memory_region_add_subregion(&s->container, PCIC0_CFGDATA, &h->data_mem);
@@ -191,7 +191,7 @@ static int ppce500_spin_initfn(SysBusDevice *dev)
s = FROM_SYSBUS(SpinState, SYS_BUS_DEVICE(dev));
- memory_region_init_io(&s->iomem, &spin_rw_ops, s, "e500 spin pv device",
+ memory_region_init_io(&s->iomem, NULL, &spin_rw_ops, s, "e500 spin pv device",
sizeof(SpinInfo) * MAX_CPUS);
sysbus_init_mmio(dev, &s->iomem);
@@ -505,12 +505,12 @@ static void ppc_prep_init(QEMUMachineInitArgs *args)
}
/* allocate RAM */
- memory_region_init_ram(ram, "ppc_prep.ram", ram_size);
+ memory_region_init_ram(ram, NULL, "ppc_prep.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(sysmem, 0, ram);
/* allocate and load BIOS */
- memory_region_init_ram(bios, "ppc_prep.bios", BIOS_SIZE);
+ memory_region_init_ram(bios, NULL, "ppc_prep.bios", BIOS_SIZE);
memory_region_set_readonly(bios, true);
memory_region_add_subregion(sysmem, (uint32_t)(-BIOS_SIZE), bios);
vmstate_register_ram_global(bios);
@@ -621,7 +621,7 @@ static void ppc_prep_init(QEMUMachineInitArgs *args)
qdev_init_nofail(dev);
/* Register 8 MB of ISA IO space (needed for non-contiguous map) */
- memory_region_init_io(PPC_io_memory, &PPC_prep_io_ops, sysctrl,
+ memory_region_init_io(PPC_io_memory, NULL, &PPC_prep_io_ops, sysctrl,
"ppc-io", 0x00800000);
memory_region_add_subregion(sysmem, 0x80000000, PPC_io_memory);
@@ -658,7 +658,7 @@ static void ppc_prep_init(QEMUMachineInitArgs *args)
/* PowerPC control and status register group */
#if 0
- memory_region_init_io(xcsr, &PPC_XCSR_ops, NULL, "ppc-xcsr", 0x1000);
+ memory_region_init_io(xcsr, NULL, &PPC_XCSR_ops, NULL, "ppc-xcsr", 0x1000);
memory_region_add_subregion(sysmem, 0xFEFF0000, xcsr);
#endif
@@ -835,7 +835,7 @@ static void ppc_spapr_init(QEMUMachineInitArgs *args)
ram_addr_t nonrma_base = rma_alloc_size;
ram_addr_t nonrma_size = spapr->ram_limit - rma_alloc_size;
- memory_region_init_ram(ram, "ppc_spapr.ram", nonrma_size);
+ memory_region_init_ram(ram, NULL, "ppc_spapr.ram", nonrma_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(sysmem, nonrma_base, ram);
}
@@ -151,7 +151,7 @@ sPAPRTCETable *spapr_tce_new_table(uint32_t liobn, size_t window_size)
"table @ %p, fd=%d\n", tcet, liobn, tcet->table, tcet->fd);
#endif
- memory_region_init_iommu(&tcet->iommu, &spapr_iommu_ops,
+ memory_region_init_iommu(&tcet->iommu, NULL, &spapr_iommu_ops,
"iommu-spapr", UINT64_MAX);
QLIST_INSERT_HEAD(&spapr_tce_tables, tcet, list);
@@ -580,10 +580,10 @@ static int spapr_phb_init(SysBusDevice *s)
/* Initialize memory regions */
sprintf(namebuf, "%s.mmio", sphb->dtbusname);
- memory_region_init(&sphb->memspace, namebuf, INT64_MAX);
+ memory_region_init(&sphb->memspace, NULL, namebuf, INT64_MAX);
sprintf(namebuf, "%s.mmio-alias", sphb->dtbusname);
- memory_region_init_alias(&sphb->memwindow, namebuf, &sphb->memspace,
+ memory_region_init_alias(&sphb->memwindow, NULL, namebuf, &sphb->memspace,
SPAPR_PCI_MEM_WIN_BUS_OFFSET, sphb->mem_win_size);
memory_region_add_subregion(get_system_memory(), sphb->mem_win_addr,
&sphb->memwindow);
@@ -597,12 +597,12 @@ static int spapr_phb_init(SysBusDevice *s)
* system_io works around the problem until all the users of
* old_portion are updated */
sprintf(namebuf, "%s.io", sphb->dtbusname);
- memory_region_init(&sphb->iospace, namebuf, SPAPR_PCI_IO_WIN_SIZE);
+ memory_region_init(&sphb->iospace, NULL, namebuf, SPAPR_PCI_IO_WIN_SIZE);
/* FIXME: fix to support multiple PHBs */
memory_region_add_subregion(get_system_io(), 0, &sphb->iospace);
sprintf(namebuf, "%s.io-alias", sphb->dtbusname);
- memory_region_init_io(&sphb->iowindow, &spapr_io_ops, sphb,
+ memory_region_init_io(&sphb->iowindow, NULL, &spapr_io_ops, sphb,
namebuf, SPAPR_PCI_IO_WIN_SIZE);
memory_region_add_subregion(get_system_memory(), sphb->io_win_addr,
&sphb->iowindow);
@@ -612,7 +612,7 @@ static int spapr_phb_init(SysBusDevice *s)
* from msi_notify()/msix_notify() */
if (msi_supported) {
sprintf(namebuf, "%s.msi", sphb->dtbusname);
- memory_region_init_io(&sphb->msiwindow, &spapr_msi_ops, sphb,
+ memory_region_init_io(&sphb->msiwindow, NULL, &spapr_msi_ops, sphb,
namebuf, SPAPR_MSIX_MAX_DEVS * 0x10000);
memory_region_add_subregion(get_system_memory(), sphb->msi_win_addr,
&sphb->msiwindow);
@@ -190,7 +190,7 @@ static void virtex_init(QEMUMachineInitArgs *args)
env = &cpu->env;
qemu_register_reset(main_cpu_reset, cpu);
- memory_region_init_ram(phys_ram, "ram", ram_size);
+ memory_region_init_ram(phys_ram, NULL, "ram", ram_size);
vmstate_register_ram_global(phys_ram);
memory_region_add_subregion(address_space_mem, ram_base, phys_ram);
@@ -89,7 +89,7 @@ static void ccw_init(QEMUMachineInitArgs *args)
virtio_ccw_register_hcalls();
/* allocate RAM */
- memory_region_init_ram(ram, "s390.ram", my_ram_size);
+ memory_region_init_ram(ram, NULL, "s390.ram", my_ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(sysmem, 0, ram);
@@ -256,7 +256,7 @@ static void s390_init(QEMUMachineInitArgs *args)
s390_virtio_register_hcalls();
/* allocate RAM */
- memory_region_init_ram(ram, "s390.ram", my_ram_size);
+ memory_region_init_ram(ram, NULL, "s390.ram", my_ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(sysmem, 0, ram);
@@ -349,7 +349,7 @@ static int esp_pci_scsi_init(PCIDevice *dev)
s->dma_memory_write = esp_pci_dma_memory_write;
s->dma_opaque = pci;
s->chip_id = TCHI_AM53C974;
- memory_region_init_io(&pci->io, &esp_pci_io_ops, pci, "esp-io", 0x80);
+ memory_region_init_io(&pci->io, NULL, &esp_pci_io_ops, pci, "esp-io", 0x80);
pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &pci->io);
s->irq = pci->dev.irq[0];
@@ -675,7 +675,7 @@ static int sysbus_esp_init(SysBusDevice *dev)
assert(sysbus->it_shift != -1);
s->chip_id = TCHI_FAS100A;
- memory_region_init_io(&sysbus->iomem, &sysbus_esp_mem_ops, sysbus,
+ memory_region_init_io(&sysbus->iomem, NULL, &sysbus_esp_mem_ops, sysbus,
"esp", ESP_REGS << sysbus->it_shift);
sysbus_init_mmio(dev, &sysbus->iomem);
@@ -2090,9 +2090,9 @@ static int lsi_scsi_init(PCIDevice *dev)
/* Interrupt pin A */
pci_conf[PCI_INTERRUPT_PIN] = 0x01;
- memory_region_init_io(&s->mmio_io, &lsi_mmio_ops, s, "lsi-mmio", 0x400);
- memory_region_init_io(&s->ram_io, &lsi_ram_ops, s, "lsi-ram", 0x2000);
- memory_region_init_io(&s->io_io, &lsi_io_ops, s, "lsi-io", 256);
+ memory_region_init_io(&s->mmio_io, NULL, &lsi_mmio_ops, s, "lsi-mmio", 0x400);
+ memory_region_init_io(&s->ram_io, NULL, &lsi_ram_ops, s, "lsi-ram", 0x2000);
+ memory_region_init_io(&s->io_io, NULL, &lsi_io_ops, s, "lsi-io", 256);
pci_register_bar(&s->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io_io);
pci_register_bar(&s->dev, 1, 0, &s->mmio_io);
@@ -2098,11 +2098,11 @@ static int megasas_scsi_init(PCIDevice *dev)
/* Interrupt pin 1 */
pci_conf[PCI_INTERRUPT_PIN] = 0x01;
- memory_region_init_io(&s->mmio_io, &megasas_mmio_ops, s,
+ memory_region_init_io(&s->mmio_io, NULL, &megasas_mmio_ops, s,
"megasas-mmio", 0x4000);
- memory_region_init_io(&s->port_io, &megasas_port_ops, s,
+ memory_region_init_io(&s->port_io, NULL, &megasas_port_ops, s,
"megasas-io", 256);
- memory_region_init_io(&s->queue_io, &megasas_queue_ops, s,
+ memory_region_init_io(&s->queue_io, NULL, &megasas_queue_ops, s,
"megasas-queue", 0x40000);
#ifdef USE_MSIX
@@ -1075,7 +1075,7 @@ pvscsi_init(PCIDevice *pci_dev)
/* Interrupt pin A */
pci_config_set_interrupt_pin(pci_dev->config, 1);
- memory_region_init_io(&s->io_space, &pvscsi_ops, s,
+ memory_region_init_io(&s->io_space, NULL, &pvscsi_ops, s,
"pvscsi-io", PVSCSI_MEM_SPACE_SIZE);
pci_register_bar(pci_dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->io_space);
@@ -253,7 +253,7 @@ static int milkymist_memcard_init(SysBusDevice *dev)
s->card = sd_init(dinfo ? dinfo->bdrv : NULL, false);
s->enabled = dinfo ? bdrv_is_inserted(dinfo->bdrv) : 0;
- memory_region_init_io(&s->regs_region, &memcard_mmio_ops, s,
+ memory_region_init_io(&s->regs_region, NULL, &memcard_mmio_ops, s,
"milkymist-memcard", R_MAX * 4);
sysbus_init_mmio(dev, &s->regs_region);
@@ -588,7 +588,7 @@ struct omap_mmc_s *omap_mmc_init(hwaddr base,
omap_mmc_reset(s);
- memory_region_init_io(&s->iomem, &omap_mmc_ops, s, "omap.mmc", 0x800);
+ memory_region_init_io(&s->iomem, NULL, &omap_mmc_ops, s, "omap.mmc", 0x800);
memory_region_add_subregion(sysmem, base, &s->iomem);
/* Instantiate the storage */
@@ -612,7 +612,7 @@ struct omap_mmc_s *omap2_mmc_init(struct omap_target_agent_s *ta,
omap_mmc_reset(s);
- memory_region_init_io(&s->iomem, &omap_mmc_ops, s, "omap.mmc",
+ memory_region_init_io(&s->iomem, NULL, &omap_mmc_ops, s, "omap.mmc",
omap_l4_region_size(ta, 0));
omap_l4_attach(ta, 0, &s->iomem);
@@ -479,7 +479,7 @@ static int pl181_init(SysBusDevice *dev)
pl181_state *s = FROM_SYSBUS(pl181_state, dev);
DriveInfo *dinfo;
- memory_region_init_io(&s->iomem, &pl181_ops, s, "pl181", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &pl181_ops, s, "pl181", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq[0]);
sysbus_init_irq(dev, &s->irq[1]);
@@ -533,7 +533,7 @@ PXA2xxMMCIState *pxa2xx_mmci_init(MemoryRegion *sysmem,
s->rx_dma = rx_dma;
s->tx_dma = tx_dma;
- memory_region_init_io(&s->iomem, &pxa2xx_mmci_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &pxa2xx_mmci_ops, s,
"pxa2xx-mmci", 0x00100000);
memory_region_add_subregion(sysmem, base, &s->iomem);
@@ -1245,7 +1245,7 @@ static void sdhci_realize(DeviceState *dev, Error ** errp)
s->buf_maxsz = sdhci_get_fifolen(s);
s->fifo_buffer = g_malloc0(s->buf_maxsz);
sysbus_init_irq(sbd, &s->irq);
- memory_region_init_io(&s->iomem, &sdhci_mmio_ops, s, "sdhci",
+ memory_region_init_io(&s->iomem, NULL, &sdhci_mmio_ops, s, "sdhci",
SDHC_REGISTERS_MAP_SIZE);
sysbus_init_mmio(sbd, &s->iomem);
}
@@ -186,7 +186,7 @@ static qemu_irq *r2d_fpga_init(MemoryRegion *sysmem,
s->irl = irl;
- memory_region_init_io(&s->iomem, &r2d_fpga_ops, s, "r2d-fpga", 0x40);
+ memory_region_init_io(&s->iomem, NULL, &r2d_fpga_ops, s, "r2d-fpga", 0x40);
memory_region_add_subregion(sysmem, base, &s->iomem);
return qemu_allocate_irqs(r2d_fpga_irq_set, s, NR_IRQS);
}
@@ -254,7 +254,7 @@ static void r2d_init(QEMUMachineInitArgs *args)
qemu_register_reset(main_cpu_reset, reset_info);
/* Allocate memory space */
- memory_region_init_ram(sdram, "r2d.sdram", SDRAM_SIZE);
+ memory_region_init_ram(sdram, NULL, "r2d.sdram", SDRAM_SIZE);
vmstate_register_ram_global(sdram);
memory_region_add_subregion(address_space_mem, SDRAM_BASE, sdram);
/* Register peripherals */
@@ -730,34 +730,34 @@ SH7750State *sh7750_init(SuperHCPU *cpu, MemoryRegion *sysmem)
s = g_malloc0(sizeof(SH7750State));
s->cpu = cpu;
s->periph_freq = 60000000; /* 60MHz */
- memory_region_init_io(&s->iomem, &sh7750_mem_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &sh7750_mem_ops, s,
"memory", 0x1fc01000);
- memory_region_init_alias(&s->iomem_1f0, "memory-1f0",
+ memory_region_init_alias(&s->iomem_1f0, NULL, "memory-1f0",
&s->iomem, 0x1f000000, 0x1000);
memory_region_add_subregion(sysmem, 0x1f000000, &s->iomem_1f0);
- memory_region_init_alias(&s->iomem_ff0, "memory-ff0",
+ memory_region_init_alias(&s->iomem_ff0, NULL, "memory-ff0",
&s->iomem, 0x1f000000, 0x1000);
memory_region_add_subregion(sysmem, 0xff000000, &s->iomem_ff0);
- memory_region_init_alias(&s->iomem_1f8, "memory-1f8",
+ memory_region_init_alias(&s->iomem_1f8, NULL, "memory-1f8",
&s->iomem, 0x1f800000, 0x1000);
memory_region_add_subregion(sysmem, 0x1f800000, &s->iomem_1f8);
- memory_region_init_alias(&s->iomem_ff8, "memory-ff8",
+ memory_region_init_alias(&s->iomem_ff8, NULL, "memory-ff8",
&s->iomem, 0x1f800000, 0x1000);
memory_region_add_subregion(sysmem, 0xff800000, &s->iomem_ff8);
- memory_region_init_alias(&s->iomem_1fc, "memory-1fc",
+ memory_region_init_alias(&s->iomem_1fc, NULL, "memory-1fc",
&s->iomem, 0x1fc00000, 0x1000);
memory_region_add_subregion(sysmem, 0x1fc00000, &s->iomem_1fc);
- memory_region_init_alias(&s->iomem_ffc, "memory-ffc",
+ memory_region_init_alias(&s->iomem_ffc, NULL, "memory-ffc",
&s->iomem, 0x1fc00000, 0x1000);
memory_region_add_subregion(sysmem, 0xffc00000, &s->iomem_ffc);
- memory_region_init_io(&s->mmct_iomem, &sh7750_mmct_ops, s,
+ memory_region_init_io(&s->mmct_iomem, NULL, &sh7750_mmct_ops, s,
"cache-and-tlb", 0x08000000);
memory_region_add_subregion(sysmem, 0xf0000000, &s->mmct_iomem);
@@ -125,9 +125,9 @@ static int sh_pci_device_init(SysBusDevice *dev)
get_system_memory(),
get_system_io(),
PCI_DEVFN(0, 0), 4, TYPE_PCI_BUS);
- memory_region_init_io(&s->memconfig_p4, &sh_pci_reg_ops, s,
+ memory_region_init_io(&s->memconfig_p4, NULL, &sh_pci_reg_ops, s,
"sh_pci", 0x224);
- memory_region_init_alias(&s->memconfig_a7, "sh_pci.2", &s->memconfig_p4,
+ memory_region_init_alias(&s->memconfig_a7, NULL, "sh_pci.2", &s->memconfig_p4,
0, 0x224);
isa_mmio_setup(&s->isa, 0x40000);
sysbus_init_mmio(dev, &s->memconfig_p4);
@@ -59,16 +59,16 @@ static void shix_init(QEMUMachineInitArgs *args)
/* Allocate memory space */
printf("Allocating ROM\n");
- memory_region_init_ram(rom, "shix.rom", 0x4000);
+ memory_region_init_ram(rom, NULL, "shix.rom", 0x4000);
vmstate_register_ram_global(rom);
memory_region_set_readonly(rom, true);
memory_region_add_subregion(sysmem, 0x00000000, rom);
printf("Allocating SDRAM 1\n");
- memory_region_init_ram(&sdram[0], "shix.sdram1", 0x01000000);
+ memory_region_init_ram(&sdram[0], NULL, "shix.sdram1", 0x01000000);
vmstate_register_ram_global(&sdram[0]);
memory_region_add_subregion(sysmem, 0x08000000, &sdram[0]);
printf("Allocating SDRAM 2\n");
- memory_region_init_ram(&sdram[1], "shix.sdram2", 0x01000000);
+ memory_region_init_ram(&sdram[1], NULL, "shix.sdram2", 0x01000000);
vmstate_register_ram_global(&sdram[1]);
memory_region_add_subregion(sysmem, 0x0c000000, &sdram[1]);
@@ -147,13 +147,13 @@ static void leon3_generic_hw_init(QEMUMachineInitArgs *args)
exit(1);
}
- memory_region_init_ram(ram, "leon3.ram", ram_size);
+ memory_region_init_ram(ram, NULL, "leon3.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, 0x40000000, ram);
/* Allocate BIOS */
prom_size = 8 * 1024 * 1024; /* 8Mb */
- memory_region_init_ram(prom, "Leon3.bios", prom_size);
+ memory_region_init_ram(prom, NULL, "Leon3.bios", prom_size);
vmstate_register_ram_global(prom);
memory_region_set_readonly(prom, true);
memory_region_add_subregion(address_space_mem, 0x00000000, prom);
@@ -582,7 +582,7 @@ static int idreg_init1(SysBusDevice *dev)
{
IDRegState *s = FROM_SYSBUS(IDRegState, dev);
- memory_region_init_ram(&s->mem, "sun4m.idreg", sizeof(idreg_data));
+ memory_region_init_ram(&s->mem, NULL, "sun4m.idreg", sizeof(idreg_data));
vmstate_register_ram_global(&s->mem);
memory_region_set_readonly(&s->mem, true);
sysbus_init_mmio(dev, &s->mem);
@@ -625,7 +625,7 @@ static int afx_init1(SysBusDevice *dev)
{
AFXState *s = FROM_SYSBUS(AFXState, dev);
- memory_region_init_ram(&s->mem, "sun4m.afx", 4);
+ memory_region_init_ram(&s->mem, NULL, "sun4m.afx", 4);
vmstate_register_ram_global(&s->mem);
sysbus_init_mmio(dev, &s->mem);
return 0;
@@ -695,7 +695,7 @@ static int prom_init1(SysBusDevice *dev)
{
PROMState *s = FROM_SYSBUS(PROMState, dev);
- memory_region_init_ram(&s->prom, "sun4m.prom", PROM_SIZE_MAX);
+ memory_region_init_ram(&s->prom, NULL, "sun4m.prom", PROM_SIZE_MAX);
vmstate_register_ram_global(&s->prom);
memory_region_set_readonly(&s->prom, true);
sysbus_init_mmio(dev, &s->prom);
@@ -734,7 +734,7 @@ static int ram_init1(SysBusDevice *dev)
{
RamDevice *d = FROM_SYSBUS(RamDevice, dev);
- memory_region_init_ram(&d->ram, "sun4m.ram", d->size);
+ memory_region_init_ram(&d->ram, NULL, "sun4m.ram", d->size);
vmstate_register_ram_global(&d->ram);
sysbus_init_mmio(dev, &d->ram);
return 0;
@@ -680,7 +680,7 @@ static int prom_init1(SysBusDevice *dev)
{
PROMState *s = FROM_SYSBUS(PROMState, dev);
- memory_region_init_ram(&s->prom, "sun4u.prom", PROM_SIZE_MAX);
+ memory_region_init_ram(&s->prom, NULL, "sun4u.prom", PROM_SIZE_MAX);
vmstate_register_ram_global(&s->prom);
memory_region_set_readonly(&s->prom, true);
sysbus_init_mmio(dev, &s->prom);
@@ -720,7 +720,7 @@ static int ram_init1(SysBusDevice *dev)
{
RamDevice *d = FROM_SYSBUS(RamDevice, dev);
- memory_region_init_ram(&d->ram, "sun4u.ram", d->size);
+ memory_region_init_ram(&d->ram, NULL, "sun4u.ram", d->size);
vmstate_register_ram_global(&d->ram);
sysbus_init_mmio(dev, &d->ram);
return 0;
@@ -354,7 +354,7 @@ struct omap_mcspi_s *omap_mcspi_init(struct omap_target_agent_s *ta, int chnum,
}
omap_mcspi_reset(s);
- memory_region_init_io(&s->iomem, &omap_mcspi_ops, s, "omap.mcspi",
+ memory_region_init_io(&s->iomem, NULL, &omap_mcspi_ops, s, "omap.mcspi",
omap_l4_region_size(ta, 0));
omap_l4_attach(ta, 0, &s->iomem);
@@ -277,7 +277,7 @@ static int pl022_init(SysBusDevice *dev)
{
pl022_state *s = FROM_SYSBUS(pl022_state, dev);
- memory_region_init_io(&s->iomem, &pl022_ops, s, "pl022", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &pl022_ops, s, "pl022", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
s->ssi = ssi_create_bus(&dev->qdev, "ssi");
@@ -330,7 +330,7 @@ static int xilinx_spi_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->cs_lines[i]);
}
- memory_region_init_io(&s->mmio, &spi_ops, s, "xilinx-spi", R_MAX * 4);
+ memory_region_init_io(&s->mmio, NULL, &spi_ops, s, "xilinx-spi", R_MAX * 4);
sysbus_init_mmio(dev, &s->mmio);
s->irqline = -1;
@@ -663,7 +663,7 @@ static void xilinx_spips_realize(DeviceState *dev, Error **errp)
sysbus_init_irq(sbd, &s->cs_lines[i]);
}
- memory_region_init_io(&s->iomem, xsc->reg_ops, s, "spi", R_MAX*4);
+ memory_region_init_io(&s->iomem, NULL, xsc->reg_ops, s, "spi", R_MAX*4);
sysbus_init_mmio(sbd, &s->iomem);
s->irqline = -1;
@@ -685,7 +685,7 @@ static void xilinx_qspips_realize(DeviceState *dev, Error **errp)
s->num_txrx_bytes = 4;
xilinx_spips_realize(dev, errp);
- memory_region_init_io(&s->mmlqspi, &lqspi_ops, s, "lqspi",
+ memory_region_init_io(&s->mmlqspi, NULL, &lqspi_ops, s, "lqspi",
(1 << LQSPI_ADDRESS_BITS) * 2);
sysbus_init_mmio(sbd, &s->mmlqspi);
@@ -236,14 +236,14 @@ static int arm_mptimer_init(SysBusDevice *dev)
* * timer for core 1
* and so on.
*/
- memory_region_init_io(&s->iomem, &arm_thistimer_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &arm_thistimer_ops, s,
"arm_mptimer_timer", 0x20);
sysbus_init_mmio(dev, &s->iomem);
for (i = 0; i < s->num_cpu; i++) {
TimerBlock *tb = &s->timerblock[i];
tb->timer = qemu_new_timer_ns(vm_clock, timerblock_tick, tb);
sysbus_init_irq(dev, &tb->irq);
- memory_region_init_io(&tb->iomem, &timerblock_ops, tb,
+ memory_region_init_io(&tb->iomem, NULL, &timerblock_ops, tb,
"arm_mptimer_timerblock", 0x20);
sysbus_init_mmio(dev, &tb->iomem);
}
@@ -284,7 +284,7 @@ static int sp804_init(SysBusDevice *dev)
s->timer[1] = arm_timer_init(s->freq1);
s->timer[0]->irq = qi[0];
s->timer[1]->irq = qi[1];
- memory_region_init_io(&s->iomem, &sp804_ops, s, "sp804", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &sp804_ops, s, "sp804", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
vmstate_register(&dev->qdev, -1, &vmstate_sp804, s);
return 0;
@@ -347,7 +347,7 @@ static int icp_pit_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->timer[1]->irq);
sysbus_init_irq(dev, &s->timer[2]->irq);
- memory_region_init_io(&s->iomem, &icp_pit_ops, s, "icp_pit", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &icp_pit_ops, s, "icp_pit", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
/* This device has no state to save/restore. The component timers will
save themselves. */
@@ -409,7 +409,7 @@ static int cadence_ttc_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->timer[i].irq);
}
- memory_region_init_io(&s->iomem, &cadence_ttc_ops, s, "timer", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &cadence_ttc_ops, s, "timer", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
return 0;
@@ -323,7 +323,7 @@ static int etraxfs_timer_init(SysBusDevice *dev)
sysbus_init_irq(dev, &t->irq);
sysbus_init_irq(dev, &t->nmi);
- memory_region_init_io(&t->mmio, &timer_ops, t, "etraxfs-timer", 0x5c);
+ memory_region_init_io(&t->mmio, NULL, &timer_ops, t, "etraxfs-timer", 0x5c);
sysbus_init_mmio(dev, &t->mmio);
qemu_register_reset(etraxfs_timer_reset, t);
return 0;
@@ -1449,7 +1449,7 @@ static int exynos4210_mct_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->l_timer[i].irq);
}
- memory_region_init_io(&s->iomem, &exynos4210_mct_ops, s, "exynos4210-mct",
+ memory_region_init_io(&s->iomem, NULL, &exynos4210_mct_ops, s, "exynos4210-mct",
MCT_SFR_SIZE);
sysbus_init_mmio(dev, &s->iomem);
@@ -390,7 +390,7 @@ static int exynos4210_pwm_init(SysBusDevice *dev)
s->timer[i].parent = s;
}
- memory_region_init_io(&s->iomem, &exynos4210_pwm_ops, s, "exynos4210-pwm",
+ memory_region_init_io(&s->iomem, NULL, &exynos4210_pwm_ops, s, "exynos4210-pwm",
EXYNOS4210_PWM_REG_MEM_SIZE);
sysbus_init_mmio(dev, &s->iomem);
@@ -559,7 +559,7 @@ static int exynos4210_rtc_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->alm_irq);
sysbus_init_irq(dev, &s->tick_irq);
- memory_region_init_io(&s->iomem, &exynos4210_rtc_ops, s, "exynos4210-rtc",
+ memory_region_init_io(&s->iomem, NULL, &exynos4210_rtc_ops, s, "exynos4210-rtc",
EXYNOS4210_RTC_REG_MEM_SIZE);
sysbus_init_mmio(dev, &s->iomem);
@@ -365,7 +365,7 @@ static int grlib_gptimer_init(SysBusDevice *dev)
ptimer_set_freq(timer->ptimer, unit->freq_hz);
}
- memory_region_init_io(&unit->iomem, &grlib_gptimer_ops, unit, "gptimer",
+ memory_region_init_io(&unit->iomem, NULL, &grlib_gptimer_ops, unit, "gptimer",
UNIT_REG_SIZE + GPTIMER_REG_SIZE * unit->nr_timers);
sysbus_init_mmio(dev, &unit->iomem);
@@ -722,7 +722,7 @@ static int hpet_init(SysBusDevice *dev)
qdev_init_gpio_out(&dev->qdev, &s->pit_enabled, 1);
/* HPET Area */
- memory_region_init_io(&s->iomem, &hpet_ram_ops, s, "hpet", 0x400);
+ memory_region_init_io(&s->iomem, NULL, &hpet_ram_ops, s, "hpet", 0x400);
sysbus_init_mmio(dev, &s->iomem);
return 0;
}
@@ -333,7 +333,7 @@ static void pit_realizefn(DeviceState *dev, Error **err)
s->irq_timer = qemu_new_timer_ns(vm_clock, pit_irq_timer, s);
qdev_init_gpio_out(dev, &s->irq, 1);
- memory_region_init_io(&pit->ioports, &pit_ioport_ops, pit, "pit", 4);
+ memory_region_init_io(&pit->ioports, NULL, &pit_ioport_ops, pit, "pit", 4);
qdev_init_gpio_in(dev, pit_irq_control, 1);
@@ -396,7 +396,7 @@ static void imx_epit_realize(DeviceState *dev, Error **errp)
DPRINTF("\n");
sysbus_init_irq(sbd, &s->irq);
- memory_region_init_io(&s->iomem, &imx_epit_ops, s, TYPE_IMX_EPIT,
+ memory_region_init_io(&s->iomem, NULL, &imx_epit_ops, s, TYPE_IMX_EPIT,
0x00001000);
sysbus_init_mmio(sbd, &s->iomem);
@@ -514,7 +514,7 @@ static void imx_gpt_realize(DeviceState *dev, Error **errp)
QEMUBH *bh;
sysbus_init_irq(sbd, &s->irq);
- memory_region_init_io(&s->iomem, &imx_gpt_ops, s, TYPE_IMX_GPT,
+ memory_region_init_io(&s->iomem, NULL, &imx_gpt_ops, s, TYPE_IMX_GPT,
0x00001000);
sysbus_init_mmio(sbd, &s->iomem);
@@ -180,7 +180,7 @@ static int lm32_timer_init(SysBusDevice *dev)
s->ptimer = ptimer_init(s->bh);
ptimer_set_freq(s->ptimer, s->freq_hz);
- memory_region_init_io(&s->iomem, &timer_ops, s, "timer", R_MAX * 4);
+ memory_region_init_io(&s->iomem, NULL, &timer_ops, s, "timer", R_MAX * 4);
sysbus_init_mmio(dev, &s->iomem);
return 0;
@@ -655,7 +655,7 @@ M48t59State *m48t59_init(qemu_irq IRQ, hwaddr mem_base,
d = FROM_SYSBUS(M48t59SysBusState, s);
state = &d->state;
sysbus_connect_irq(s, 0, IRQ);
- memory_region_init_io(&d->io, &m48t59_io_ops, state, "m48t59", 4);
+ memory_region_init_io(&d->io, NULL, &m48t59_io_ops, state, "m48t59", 4);
if (io_base != 0) {
memory_region_add_subregion(get_system_io(), io_base, &d->io);
}
@@ -683,7 +683,7 @@ M48t59State *m48t59_init_isa(ISABus *bus, uint32_t io_base, uint16_t size,
d = ISA_M48T59(isadev);
s = &d->state;
- memory_region_init_io(&d->io, &m48t59_io_ops, s, "m48t59", 4);
+ memory_region_init_io(&d->io, NULL, &m48t59_io_ops, s, "m48t59", 4);
if (io_base != 0) {
isa_register_ioport(isadev, &d->io, io_base);
}
@@ -721,7 +721,7 @@ static int m48t59_init1(SysBusDevice *dev)
sysbus_init_irq(dev, &s->IRQ);
- memory_region_init_io(&s->iomem, &nvram_ops, s, "m48t59.nvram", s->size);
+ memory_region_init_io(&s->iomem, NULL, &nvram_ops, s, "m48t59.nvram", s->size);
sysbus_init_mmio(dev, &s->iomem);
m48t59_realize_common(s, &err);
if (err != NULL) {
@@ -863,7 +863,7 @@ static void rtc_realizefn(DeviceState *dev, Error **errp)
s->suspend_notifier.notify = rtc_notify_suspend;
qemu_register_suspend_notifier(&s->suspend_notifier);
- memory_region_init_io(&s->io, &cmos_ops, s, "rtc", 2);
+ memory_region_init_io(&s->io, NULL, &cmos_ops, s, "rtc", 2);
isa_register_ioport(isadev, &s->io, base);
qdev_set_legacy_instance_id(dev, base, 3);
@@ -280,7 +280,7 @@ static int milkymist_sysctl_init(SysBusDevice *dev)
ptimer_set_freq(s->ptimer0, s->freq_hz);
ptimer_set_freq(s->ptimer1, s->freq_hz);
- memory_region_init_io(&s->regs_region, &sysctl_mmio_ops, s,
+ memory_region_init_io(&s->regs_region, NULL, &sysctl_mmio_ops, s,
"milkymist-sysctl", R_MAX * 4);
sysbus_init_mmio(dev, &s->regs_region);
@@ -480,7 +480,7 @@ struct omap_gp_timer_s *omap_gp_timer_init(struct omap_target_agent_s *ta,
omap_gp_timer_reset(s);
omap_gp_timer_clk_setup(s);
- memory_region_init_io(&s->iomem, &omap_gp_timer_ops, s, "omap.gptimer",
+ memory_region_init_io(&s->iomem, NULL, &omap_gp_timer_ops, s, "omap.gptimer",
omap_l4_region_size(ta, 0));
omap_l4_attach(ta, 0, &s->iomem);
@@ -94,7 +94,7 @@ struct omap_synctimer_s *omap_synctimer_init(struct omap_target_agent_s *ta,
struct omap_synctimer_s *s = g_malloc0(sizeof(*s));
omap_synctimer_reset(s);
- memory_region_init_io(&s->iomem, &omap_synctimer_ops, s, "omap.synctimer",
+ memory_region_init_io(&s->iomem, NULL, &omap_synctimer_ops, s, "omap.synctimer",
omap_l4_region_size(ta, 0));
omap_l4_attach(ta, 0, &s->iomem);
@@ -192,7 +192,7 @@ static int pl031_init(SysBusDevice *dev)
pl031_state *s = FROM_SYSBUS(pl031_state, dev);
struct tm tm;
- memory_region_init_io(&s->iomem, &pl031_ops, s, "pl031", 0x1000);
+ memory_region_init_io(&s->iomem, NULL, &pl031_ops, s, "pl031", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
@@ -122,7 +122,7 @@ static int puv3_ost_init(SysBusDevice *dev)
s->ptimer = ptimer_init(s->bh);
ptimer_set_freq(s->ptimer, 50 * 1000 * 1000);
- memory_region_init_io(&s->iomem, &puv3_ost_ops, s, "puv3_ost",
+ memory_region_init_io(&s->iomem, NULL, &puv3_ost_ops, s, "puv3_ost",
PUV3_REGS_OFFSET);
sysbus_init_mmio(dev, &s->iomem);
@@ -461,7 +461,7 @@ static int pxa2xx_timer_init(SysBusDevice *dev)
}
}
- memory_region_init_io(&s->iomem, &pxa2xx_timer_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &pxa2xx_timer_ops, s,
"pxa2xx-timer", 0x00001000);
sysbus_init_mmio(dev, &s->iomem);
@@ -319,14 +319,14 @@ void tmu012_init(MemoryRegion *sysmem, hwaddr base,
s->timer[2] = sh_timer_init(freq, timer_feat | TIMER_FEAT_CAPT,
ch2_irq0); /* ch2_irq1 not supported */
- memory_region_init_io(&s->iomem, &tmu012_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &tmu012_ops, s,
"timer", 0x100000000ULL);
- memory_region_init_alias(&s->iomem_p4, "timer-p4",
+ memory_region_init_alias(&s->iomem_p4, NULL, "timer-p4",
&s->iomem, 0, 0x1000);
memory_region_add_subregion(sysmem, P4ADDR(base), &s->iomem_p4);
- memory_region_init_alias(&s->iomem_a7, "timer-a7",
+ memory_region_init_alias(&s->iomem_a7, NULL, "timer-a7",
&s->iomem, 0, 0x1000);
memory_region_add_subregion(sysmem, A7ADDR(base), &s->iomem_a7);
/* ??? Save/restore. */
@@ -394,7 +394,7 @@ static int slavio_timer_init1(SysBusDevice *dev)
size = i == 0 ? SYS_TIMER_SIZE : CPU_TIMER_SIZE;
snprintf(timer_name, sizeof(timer_name), "timer-%i", i);
- memory_region_init_io(&tc->iomem, &slavio_timer_mem_ops, tc,
+ memory_region_init_io(&tc->iomem, NULL, &slavio_timer_mem_ops, tc,
timer_name, size);
sysbus_init_mmio(dev, &tc->iomem);
@@ -779,7 +779,7 @@ static int tusb6010_init(SysBusDevice *dev)
TUSBState *s = FROM_SYSBUS(TUSBState, dev);
s->otg_timer = qemu_new_timer_ns(vm_clock, tusb_otg_tick, s);
s->pwr_timer = qemu_new_timer_ns(vm_clock, tusb_power_tick, s);
- memory_region_init_io(&s->iomem[1], &tusb_async_ops, s, "tusb-async",
+ memory_region_init_io(&s->iomem[1], NULL, &tusb_async_ops, s, "tusb-async",
UINT32_MAX);
sysbus_init_mmio(dev, &s->iomem[0]);
sysbus_init_mmio(dev, &s->iomem[1]);
@@ -218,7 +218,7 @@ static int xilinx_timer_init(SysBusDevice *dev)
ptimer_set_freq(xt->ptimer, t->freq_hz);
}
- memory_region_init_io(&t->mmio, &timer_ops, t, "xlnx.xps-timer",
+ memory_region_init_io(&t->mmio, NULL, &timer_ops, t, "xlnx.xps-timer",
R_MAX * 4 * num_timers(t));
sysbus_init_mmio(dev, &t->mmio);
return 0;
@@ -888,7 +888,7 @@ static void tpm_tis_initfn(Object *obj)
ISADevice *dev = ISA_DEVICE(obj);
TPMState *s = TPM(obj);
- memory_region_init_io(&s->mmio, &tpm_tis_memory_ops, s, "tpm-tis-mmio",
+ memory_region_init_io(&s->mmio, NULL, &tpm_tis_memory_ops, s, "tpm-tis-mmio",
TPM_TIS_NUM_LOCALITIES << TPM_TIS_LOCALITY_SHIFT);
memory_region_add_subregion(isa_address_space(dev), TPM_TIS_ADDR_BASE,
&s->mmio);
@@ -73,7 +73,7 @@ static void puv3_board_init(CPUUniCore32State *env, ram_addr_t ram_size)
MemoryRegion *ram_memory = g_new(MemoryRegion, 1);
/* SDRAM at address zero. */
- memory_region_init_ram(ram_memory, "puv3.ram", ram_size);
+ memory_region_init_ram(ram_memory, NULL, "puv3.ram", ram_size);
vmstate_register_ram_global(ram_memory);
memory_region_add_subregion(get_system_memory(), 0, ram_memory);
}
@@ -173,7 +173,7 @@ static void fusbh200_ehci_init(Object *obj)
FUSBH200EHCIState *f = FUSBH200_EHCI(obj);
EHCIState *s = &i->ehci;
- memory_region_init_io(&f->mem_vendor, &fusbh200_ehci_mmio_ops, s,
+ memory_region_init_io(&f->mem_vendor, NULL, &fusbh200_ehci_mmio_ops, s,
"fusbh200", 0x4c);
memory_region_add_subregion(&s->mem,
s->opregbase + s->portscbase + 4 * s->portnr,
@@ -2551,12 +2551,12 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
QTAILQ_INIT(&s->pqueues);
usb_packet_init(&s->ipacket);
- memory_region_init(&s->mem, "ehci", MMIO_SIZE);
- memory_region_init_io(&s->mem_caps, &ehci_mmio_caps_ops, s,
+ memory_region_init(&s->mem, NULL, "ehci", MMIO_SIZE);
+ memory_region_init_io(&s->mem_caps, NULL, &ehci_mmio_caps_ops, s,
"capabilities", CAPA_SIZE);
- memory_region_init_io(&s->mem_opreg, &ehci_mmio_opreg_ops, s,
+ memory_region_init_io(&s->mem_opreg, NULL, &ehci_mmio_opreg_ops, s,
"operational", s->portscbase);
- memory_region_init_io(&s->mem_ports, &ehci_mmio_port_ops, s,
+ memory_region_init_io(&s->mem_ports, NULL, &ehci_mmio_port_ops, s,
"ports", 4 * s->portnr);
memory_region_add_subregion(&s->mem, s->capsbase, &s->mem_caps);
@@ -1830,7 +1830,7 @@ static int usb_ohci_init(OHCIState *ohci, DeviceState *dev,
}
}
- memory_region_init_io(&ohci->mem, &ohci_mem_ops, ohci, "ohci", 256);
+ memory_region_init_io(&ohci->mem, NULL, &ohci_mem_ops, ohci, "ohci", 256);
ohci->localmem_base = localmem_base;
ohci->name = object_get_typename(OBJECT(dev));
@@ -1259,7 +1259,7 @@ static int usb_uhci_common_initfn(PCIDevice *dev)
qemu_register_reset(uhci_reset, s);
- memory_region_init_io(&s->io_bar, &uhci_ioport_ops, s, "uhci", 0x20);
+ memory_region_init_io(&s->io_bar, NULL, &uhci_ioport_ops, s, "uhci", 0x20);
/* Use region 4 for consistency with real hardware. BSD guests seem
to rely on this. */
pci_register_bar(&s->dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &s->io_bar);
@@ -3342,14 +3342,14 @@ static int usb_xhci_initfn(struct PCIDevice *dev)
xhci->irq = xhci->pci_dev.irq[0];
- memory_region_init(&xhci->mem, "xhci", LEN_REGS);
- memory_region_init_io(&xhci->mem_cap, &xhci_cap_ops, xhci,
+ memory_region_init(&xhci->mem, NULL, "xhci", LEN_REGS);
+ memory_region_init_io(&xhci->mem_cap, NULL, &xhci_cap_ops, xhci,
"capabilities", LEN_CAP);
- memory_region_init_io(&xhci->mem_oper, &xhci_oper_ops, xhci,
+ memory_region_init_io(&xhci->mem_oper, NULL, &xhci_oper_ops, xhci,
"operational", 0x400);
- memory_region_init_io(&xhci->mem_runtime, &xhci_runtime_ops, xhci,
+ memory_region_init_io(&xhci->mem_runtime, NULL, &xhci_runtime_ops, xhci,
"runtime", LEN_RUNTIME);
- memory_region_init_io(&xhci->mem_doorbell, &xhci_doorbell_ops, xhci,
+ memory_region_init_io(&xhci->mem_doorbell, NULL, &xhci_doorbell_ops, xhci,
"doorbell", LEN_DOORBELL);
memory_region_add_subregion(&xhci->mem, 0, &xhci->mem_cap);
@@ -3361,7 +3361,7 @@ static int usb_xhci_initfn(struct PCIDevice *dev)
XHCIPort *port = &xhci->ports[i];
uint32_t offset = OFF_OPER + 0x400 + 0x10 * i;
port->xhci = xhci;
- memory_region_init_io(&port->mem, &xhci_port_ops, port,
+ memory_region_init_io(&port->mem, NULL, &xhci_port_ops, port,
port->name, 0x10);
memory_region_add_subregion(&xhci->mem, offset, &port->mem);
}
@@ -966,7 +966,7 @@ static void virtio_pci_device_plugged(DeviceState *d)
size = 1 << qemu_fls(size);
}
- memory_region_init_io(&proxy->bar, &virtio_pci_config_ops, proxy,
+ memory_region_init_io(&proxy->bar, NULL, &virtio_pci_config_ops, proxy,
"virtio-pci", size);
pci_register_bar(&proxy->pci_dev, 0, PCI_BASE_ADDRESS_SPACE_IO,
&proxy->bar);
@@ -417,7 +417,7 @@ static int i6300esb_init(PCIDevice *dev)
d->timer = qemu_new_timer_ns(vm_clock, i6300esb_timer_expired, d);
d->previous_reboot_flag = 0;
- memory_region_init_io(&d->io_mem, &i6300esb_ops, d, "i6300esb", 0x10);
+ memory_region_init_io(&d->io_mem, NULL, &i6300esb_ops, d, "i6300esb", 0x10);
pci_register_bar(&d->dev, 0, 0, &d->io_mem);
/* qemu_register_coalesced_mmio (addr, 0x10); ? */
@@ -38,7 +38,7 @@ static const MemoryRegionOps xen_apic_io_ops = {
static void xen_apic_init(APICCommonState *s)
{
- memory_region_init_io(&s->io_memory, &xen_apic_io_ops, s, "xen-apic-msi",
+ memory_region_init_io(&s->io_memory, NULL, &xen_apic_io_ops, s, "xen-apic-msi",
APIC_SPACE_SIZE);
#if defined(CONFIG_XEN_CTRL_INTERFACE_VERSION) \
@@ -275,7 +275,7 @@ static const MemoryRegionOps platform_fixed_io_ops = {
static void platform_fixed_ioport_init(PCIXenPlatformState* s)
{
- memory_region_init_io(&s->fixed_io, &platform_fixed_io_ops, s,
+ memory_region_init_io(&s->fixed_io, NULL, &platform_fixed_io_ops, s,
"xen-fixed", 16);
memory_region_add_subregion(get_system_io(), XEN_PLATFORM_IOPORT,
&s->fixed_io);
@@ -319,7 +319,7 @@ static const MemoryRegionOps xen_pci_io_ops = {
static void platform_ioport_bar_setup(PCIXenPlatformState *d)
{
- memory_region_init_io(&d->bar, &xen_pci_io_ops, d, "xen-pci", 0x100);
+ memory_region_init_io(&d->bar, NULL, &xen_pci_io_ops, d, "xen-pci", 0x100);
}
static uint64_t platform_mmio_read(void *opaque, hwaddr addr,
@@ -347,7 +347,7 @@ static const MemoryRegionOps platform_mmio_handler = {
static void platform_mmio_setup(PCIXenPlatformState *d)
{
- memory_region_init_io(&d->mmio_bar, &platform_mmio_handler, d,
+ memory_region_init_io(&d->mmio_bar, NULL, &platform_mmio_handler, d,
"xen-mmio", 0x1000000);
}
@@ -416,7 +416,7 @@ static int xen_pt_register_regions(XenPCIPassthroughState *s)
}
}
- memory_region_init_io(&s->bar[i], &ops, &s->dev,
+ memory_region_init_io(&s->bar[i], NULL, &ops, &s->dev,
"xen-pci-pt-bar", r->size);
pci_register_bar(&s->dev, i, type, &s->bar[i]);
@@ -440,7 +440,7 @@ static int xen_pt_register_regions(XenPCIPassthroughState *s)
s->bases[PCI_ROM_SLOT].access.maddr = d->rom.base_addr;
- memory_region_init_rom_device(&s->rom, NULL, NULL,
+ memory_region_init_rom_device(&s->rom, NULL, NULL, NULL,
"xen-pci-pt-rom", d->rom.size);
pci_register_bar(&s->dev, PCI_ROM_SLOT, PCI_BASE_ADDRESS_MEM_PREFETCH,
&s->rom);
@@ -544,7 +544,7 @@ int xen_pt_msix_init(XenPCIPassthroughState *s, uint32_t base)
msix->msix_entry[i].pirq = XEN_PT_UNASSIGNED_PIRQ;
}
- memory_region_init_io(&msix->mmio, &pci_msix_ops, s, "xen-pci-pt-msix",
+ memory_region_init_io(&msix->mmio, NULL, &pci_msix_ops, s, "xen-pci-pt-msix",
(total_entries * PCI_MSIX_ENTRY_SIZE
+ XC_PAGE_SIZE - 1)
& XC_PAGE_MASK);
@@ -109,7 +109,7 @@ static Lx60FpgaState *lx60_fpga_init(MemoryRegion *address_space,
{
Lx60FpgaState *s = g_malloc(sizeof(Lx60FpgaState));
- memory_region_init_io(&s->iomem, &lx60_fpga_ops, s,
+ memory_region_init_io(&s->iomem, NULL, &lx60_fpga_ops, s,
"lx60.fpga", 0x10000);
memory_region_add_subregion(address_space, base, &s->iomem);
lx60_fpga_reset(s);
@@ -139,7 +139,7 @@ static void lx60_net_init(MemoryRegion *address_space,
sysbus_mmio_get_region(s, 1));
ram = g_malloc(sizeof(*ram));
- memory_region_init_ram(ram, "open_eth.ram", 16384);
+ memory_region_init_ram(ram, NULL, "open_eth.ram", 16384);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space, buffers, ram);
}
@@ -195,12 +195,12 @@ static void lx_init(const LxBoardDesc *board, QEMUMachineInitArgs *args)
}
ram = g_malloc(sizeof(*ram));
- memory_region_init_ram(ram, "lx60.dram", args->ram_size);
+ memory_region_init_ram(ram, NULL, "lx60.dram", args->ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(system_memory, 0, ram);
system_io = g_malloc(sizeof(*system_io));
- memory_region_init(system_io, "lx60.io", 224 * 1024 * 1024);
+ memory_region_init(system_io, NULL, "lx60.io", 224 * 1024 * 1024);
memory_region_add_subregion(system_memory, 0xf0000000, system_io);
lx60_fpga_init(system_io, 0x0d020000);
if (nd_table[0].used) {
@@ -231,7 +231,7 @@ static void lx_init(const LxBoardDesc *board, QEMUMachineInitArgs *args)
/* Use presence of kernel file name as 'boot from SRAM' switch. */
if (kernel_filename) {
rom = g_malloc(sizeof(*rom));
- memory_region_init_ram(rom, "lx60.sram", board->sram_size);
+ memory_region_init_ram(rom, NULL, "lx60.sram", board->sram_size);
vmstate_register_ram_global(rom);
memory_region_add_subregion(system_memory, 0xfe000000, rom);
@@ -262,7 +262,7 @@ static void lx_init(const LxBoardDesc *board, QEMUMachineInitArgs *args)
MemoryRegion *flash_mr = pflash_cfi01_get_memory(flash);
MemoryRegion *flash_io = g_malloc(sizeof(*flash_io));
- memory_region_init_alias(flash_io, "lx60.flash",
+ memory_region_init_alias(flash_io, NULL, "lx60.flash",
flash_mr, 0, board->flash_size);
memory_region_add_subregion(system_memory, 0xfe000000,
flash_io);
@@ -75,12 +75,12 @@ static void xtensa_sim_init(QEMUMachineInitArgs *args)
}
ram = g_malloc(sizeof(*ram));
- memory_region_init_ram(ram, "xtensa.sram", ram_size);
+ memory_region_init_ram(ram, NULL, "xtensa.sram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(get_system_memory(), 0, ram);
rom = g_malloc(sizeof(*rom));
- memory_region_init_ram(rom, "xtensa.rom", 0x1000);
+ memory_region_init_ram(rom, NULL, "xtensa.rom", 0x1000);
vmstate_register_ram_global(rom);
memory_region_add_subregion(get_system_memory(), 0xfe000000, rom);
@@ -134,6 +134,7 @@ struct MemoryRegion {
const MemoryRegionOps *ops;
const MemoryRegionIOMMUOps *iommu_ops;
void *opaque;
+ struct Object *owner;
MemoryRegion *parent;
Int128 size;
hwaddr addr;
@@ -236,10 +237,12 @@ struct MemoryListener {
* memory_region_add_subregion() to add subregions.
*
* @mr: the #MemoryRegion to be initialized
+ * @owner: the object that tracks the region's reference count
* @name: used for debugging; not visible to the user or ABI
* @size: size of the region; any subregions beyond this size will be clipped
*/
void memory_region_init(MemoryRegion *mr,
+ struct Object *owner,
const char *name,
uint64_t size);
/**
@@ -249,6 +252,7 @@ void memory_region_init(MemoryRegion *mr,
* if @size is nonzero, subregions will be clipped to @size.
*
* @mr: the #MemoryRegion to be initialized.
+ * @owner: the object that tracks the region's reference count
* @ops: a structure containing read and write callbacks to be used when
* I/O is performed on the region.
* @opaque: passed to to the read and write callbacks of the @ops structure.
@@ -256,6 +260,7 @@ void memory_region_init(MemoryRegion *mr,
* @size: size of the region.
*/
void memory_region_init_io(MemoryRegion *mr,
+ struct Object *owner,
const MemoryRegionOps *ops,
void *opaque,
const char *name,
@@ -266,10 +271,12 @@ void memory_region_init_io(MemoryRegion *mr,
* region will modify memory directly.
*
* @mr: the #MemoryRegion to be initialized.
+ * @owner: the object that tracks the region's reference count
* @name: the name of the region.
* @size: size of the region.
*/
void memory_region_init_ram(MemoryRegion *mr,
+ struct Object *owner,
const char *name,
uint64_t size);
@@ -279,11 +286,13 @@ void memory_region_init_ram(MemoryRegion *mr,
* region will modify memory directly.
*
* @mr: the #MemoryRegion to be initialized.
+ * @owner: the object that tracks the region's reference count
* @name: the name of the region.
* @size: size of the region.
* @ptr: memory to be mapped; must contain at least @size bytes.
*/
void memory_region_init_ram_ptr(MemoryRegion *mr,
+ struct Object *owner,
const char *name,
uint64_t size,
void *ptr);
@@ -293,6 +302,7 @@ void memory_region_init_ram_ptr(MemoryRegion *mr,
* part of another memory region.
*
* @mr: the #MemoryRegion to be initialized.
+ * @owner: the object that tracks the region's reference count
* @name: used for debugging; not visible to the user or ABI
* @orig: the region to be referenced; @mr will be equivalent to
* @orig between @offset and @offset + @size - 1.
@@ -300,6 +310,7 @@ void memory_region_init_ram_ptr(MemoryRegion *mr,
* @size: size of the region.
*/
void memory_region_init_alias(MemoryRegion *mr,
+ struct Object *owner,
const char *name,
MemoryRegion *orig,
hwaddr offset,
@@ -310,11 +321,13 @@ void memory_region_init_alias(MemoryRegion *mr,
* handled via callbacks.
*
* @mr: the #MemoryRegion to be initialized.
+ * @owner: the object that tracks the region's reference count
* @ops: callbacks for write access handling.
* @name: the name of the region.
* @size: size of the region.
*/
void memory_region_init_rom_device(MemoryRegion *mr,
+ struct Object *owner,
const MemoryRegionOps *ops,
void *opaque,
const char *name,
@@ -329,10 +342,12 @@ void memory_region_init_rom_device(MemoryRegion *mr,
* the memory API will cause an abort().
*
* @mr: the #MemoryRegion to be initialized
+ * @owner: the object that tracks the region's reference count
* @name: used for debugging; not visible to the user or ABI
* @size: size of the region.
*/
void memory_region_init_reservation(MemoryRegion *mr,
+ struct Object *owner,
const char *name,
uint64_t size);
@@ -344,11 +359,13 @@ void memory_region_init_reservation(MemoryRegion *mr,
* memory region.
*
* @mr: the #MemoryRegion to be initialized
+ * @owner: the object that tracks the region's reference count
* @ops: a function that translates addresses into the @target region
* @name: used for debugging; not visible to the user or ABI
* @size: size of the region.
*/
void memory_region_init_iommu(MemoryRegion *mr,
+ struct Object *owner,
const MemoryRegionIOMMUOps *ops,
const char *name,
uint64_t size);
@@ -211,7 +211,7 @@ static void portio_list_add_1(PortioList *piolist,
* Use an alias so that the callback is called with an absolute address,
* rather than an offset relative to to start + off_low.
*/
- memory_region_init_io(&mrpio->mr, &portio_ops, mrpio, piolist->name,
+ memory_region_init_io(&mrpio->mr, NULL, &portio_ops, mrpio, piolist->name,
off_high - off_low);
memory_region_add_subregion(piolist->address_space,
start + off_low, &mrpio->mr);
@@ -17,6 +17,7 @@
#include "exec/address-spaces.h"
#include "exec/ioport.h"
#include "qemu/bitops.h"
+#include "qom/object.h"
#include "sysemu/kvm.h"
#include <assert.h>
@@ -728,11 +729,13 @@ static bool memory_region_wrong_endianness(MemoryRegion *mr)
}
void memory_region_init(MemoryRegion *mr,
+ Object *owner,
const char *name,
uint64_t size)
{
mr->ops = &unassigned_mem_ops;
mr->opaque = NULL;
+ mr->owner = owner;
mr->iommu_ops = NULL;
mr->parent = NULL;
mr->size = int128_make64(size);
@@ -912,12 +915,13 @@ static bool memory_region_dispatch_write(MemoryRegion *mr,
}
void memory_region_init_io(MemoryRegion *mr,
+ Object *owner,
const MemoryRegionOps *ops,
void *opaque,
const char *name,
uint64_t size)
{
- memory_region_init(mr, name, size);
+ memory_region_init(mr, owner, name, size);
mr->ops = ops;
mr->opaque = opaque;
mr->terminates = true;
@@ -925,10 +929,11 @@ void memory_region_init_io(MemoryRegion *mr,
}
void memory_region_init_ram(MemoryRegion *mr,
+ Object *owner,
const char *name,
uint64_t size)
{
- memory_region_init(mr, name, size);
+ memory_region_init(mr, owner, name, size);
mr->ram = true;
mr->terminates = true;
mr->destructor = memory_region_destructor_ram;
@@ -936,11 +941,12 @@ void memory_region_init_ram(MemoryRegion *mr,
}
void memory_region_init_ram_ptr(MemoryRegion *mr,
+ Object *owner,
const char *name,
uint64_t size,
void *ptr)
{
- memory_region_init(mr, name, size);
+ memory_region_init(mr, owner, name, size);
mr->ram = true;
mr->terminates = true;
mr->destructor = memory_region_destructor_ram_from_ptr;
@@ -948,23 +954,25 @@ void memory_region_init_ram_ptr(MemoryRegion *mr,
}
void memory_region_init_alias(MemoryRegion *mr,
+ Object *owner,
const char *name,
MemoryRegion *orig,
hwaddr offset,
uint64_t size)
{
- memory_region_init(mr, name, size);
+ memory_region_init(mr, owner, name, size);
mr->alias = orig;
mr->alias_offset = offset;
}
void memory_region_init_rom_device(MemoryRegion *mr,
+ Object *owner,
const MemoryRegionOps *ops,
void *opaque,
const char *name,
uint64_t size)
{
- memory_region_init(mr, name, size);
+ memory_region_init(mr, owner, name, size);
mr->ops = ops;
mr->opaque = opaque;
mr->terminates = true;
@@ -974,21 +982,23 @@ void memory_region_init_rom_device(MemoryRegion *mr,
}
void memory_region_init_iommu(MemoryRegion *mr,
+ Object *owner,
const MemoryRegionIOMMUOps *ops,
const char *name,
uint64_t size)
{
- memory_region_init(mr, name, size);
+ memory_region_init(mr, owner, name, size);
mr->iommu_ops = ops,
mr->terminates = true; /* then re-forwards */
notifier_list_init(&mr->iommu_notify);
}
void memory_region_init_reservation(MemoryRegion *mr,
+ Object *owner,
const char *name,
uint64_t size)
{
- memory_region_init_io(mr, &unassigned_mem_ops, mr, name, size);
+ memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size);
}
void memory_region_destroy(MemoryRegion *mr)
@@ -1555,7 +1555,7 @@ off_t kvmppc_alloc_rma(const char *name, MemoryRegion *sysmem)
};
rma_region = g_new(MemoryRegion, 1);
- memory_region_init_ram_ptr(rma_region, name, size, rma);
+ memory_region_init_ram_ptr(rma_region, NULL, name, size, rma);
vmstate_register_ram_global(rma_region);
memory_region_add_subregion(sysmem, 0, rma_region);
@@ -167,7 +167,7 @@ static void xen_ram_init(ram_addr_t ram_size)
*/
block_len += HVM_BELOW_4G_MMIO_LENGTH;
}
- memory_region_init_ram(&ram_memory, "xen.ram", block_len);
+ memory_region_init_ram(&ram_memory, NULL, "xen.ram", block_len);
vmstate_register_ram_global(&ram_memory);
if (ram_size >= HVM_BELOW_4G_RAM_END) {
@@ -177,7 +177,7 @@ static void xen_ram_init(ram_addr_t ram_size)
below_4g_mem_size = ram_size;
}
- memory_region_init_alias(&ram_640k, "xen.ram.640k",
+ memory_region_init_alias(&ram_640k, NULL, "xen.ram.640k",
&ram_memory, 0, 0xa0000);
memory_region_add_subregion(sysmem, 0, &ram_640k);
/* Skip of the VGA IO memory space, it will be registered later by the VGA
@@ -186,11 +186,11 @@ static void xen_ram_init(ram_addr_t ram_size)
* The area between 0xc0000 and 0x100000 will be used by SeaBIOS to load
* the Options ROM, so it is registered here as RAM.
*/
- memory_region_init_alias(&ram_lo, "xen.ram.lo",
+ memory_region_init_alias(&ram_lo, NULL, "xen.ram.lo",
&ram_memory, 0xc0000, below_4g_mem_size - 0xc0000);
memory_region_add_subregion(sysmem, 0xc0000, &ram_lo);
if (above_4g_mem_size > 0) {
- memory_region_init_alias(&ram_hi, "xen.ram.hi",
+ memory_region_init_alias(&ram_hi, NULL, "xen.ram.hi",
&ram_memory, 0x100000000ULL,
above_4g_mem_size);
memory_region_add_subregion(sysmem, 0x100000000ULL, &ram_hi);
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> --- exec.c | 14 ++++----- hw/acpi/core.c | 6 ++-- hw/acpi/ich9.c | 6 ++-- hw/acpi/piix4.c | 8 ++--- hw/alpha/typhoon.c | 16 +++++----- hw/arm/armv7m.c | 8 ++--- hw/arm/exynos4210.c | 12 ++++---- hw/arm/highbank.c | 6 ++-- hw/arm/integratorcp.c | 12 ++++---- hw/arm/kzm.c | 6 ++-- hw/arm/mainstone.c | 2 +- hw/arm/musicpal.c | 22 +++++++------- hw/arm/omap1.c | 52 ++++++++++++++++---------------- hw/arm/omap2.c | 16 +++++----- hw/arm/omap_sx1.c | 14 ++++----- hw/arm/palm.c | 10 +++--- hw/arm/pxa2xx.c | 30 +++++++++--------- hw/arm/pxa2xx_gpio.c | 2 +- hw/arm/pxa2xx_pic.c | 2 +- hw/arm/realview.c | 8 ++--- hw/arm/spitz.c | 4 +-- hw/arm/stellaris.c | 8 ++--- hw/arm/strongarm.c | 14 ++++----- hw/arm/tosa.c | 2 +- hw/arm/versatilepb.c | 4 +-- hw/arm/vexpress.c | 12 ++++---- hw/arm/xilinx_zynq.c | 4 +-- hw/audio/ac97.c | 4 +-- hw/audio/cs4231.c | 2 +- hw/audio/cs4231a.c | 2 +- hw/audio/es1370.c | 2 +- hw/audio/intel-hda.c | 2 +- hw/audio/marvell_88w8618.c | 2 +- hw/audio/milkymist-ac97.c | 2 +- hw/audio/pcspk.c | 2 +- hw/audio/pl041.c | 2 +- hw/block/fdc.c | 4 +-- hw/block/nvme.c | 2 +- hw/block/onenand.c | 8 ++--- hw/block/pc_sysfw.c | 6 ++-- hw/block/pflash_cfi01.c | 3 +- hw/block/pflash_cfi02.c | 6 ++-- hw/char/cadence_uart.c | 2 +- hw/char/debugcon.c | 2 +- hw/char/escc.c | 2 +- hw/char/etraxfs_ser.c | 2 +- hw/char/exynos4210_uart.c | 2 +- hw/char/grlib_apbuart.c | 2 +- hw/char/imx_serial.c | 2 +- hw/char/lm32_uart.c | 2 +- hw/char/mcf_uart.c | 2 +- hw/char/milkymist-uart.c | 2 +- hw/char/omap_uart.c | 2 +- hw/char/parallel.c | 2 +- hw/char/pl011.c | 2 +- hw/char/serial-isa.c | 2 +- hw/char/serial-pci.c | 6 ++-- hw/char/serial.c | 4 +-- hw/char/sh_serial.c | 6 ++-- hw/char/tpci200.c | 12 ++++---- hw/char/xilinx_uartlite.c | 2 +- hw/core/empty_slot.c | 2 +- hw/cpu/a15mpcore.c | 2 +- hw/cpu/a9mpcore.c | 2 +- hw/cpu/arm11mpcore.c | 4 +-- hw/cpu/icc_bus.c | 2 +- hw/cris/axis_dev88.c | 8 ++--- hw/display/cirrus_vga.c | 16 +++++----- hw/display/exynos4210_fimd.c | 2 +- hw/display/g364fb.c | 4 +-- hw/display/jazz_led.c | 2 +- hw/display/milkymist-tmu2.c | 2 +- hw/display/milkymist-vgafb.c | 2 +- hw/display/omap_dss.c | 10 +++--- hw/display/omap_lcdc.c | 2 +- hw/display/pl110.c | 2 +- hw/display/pxa2xx_lcd.c | 2 +- hw/display/qxl.c | 10 +++--- hw/display/sm501.c | 8 ++--- hw/display/tc6393xb.c | 4 +-- hw/display/tcx.c | 16 +++++----- hw/display/vga-isa-mm.c | 4 +-- hw/display/vga-pci.c | 6 ++-- hw/display/vga.c | 8 ++--- hw/display/vmware_vga.c | 4 +-- hw/dma/etraxfs_dma.c | 2 +- hw/dma/i8257.c | 4 +-- hw/dma/omap_dma.c | 4 +-- hw/dma/pl080.c | 2 +- hw/dma/pl330.c | 2 +- hw/dma/puv3_dma.c | 2 +- hw/dma/pxa2xx_dma.c | 2 +- hw/dma/rc4030.c | 4 +-- hw/dma/sparc32_dma.c | 2 +- hw/dma/sun4m_iommu.c | 2 +- hw/dma/xilinx_axidma.c | 2 +- hw/gpio/omap_gpio.c | 6 ++-- hw/gpio/pl061.c | 2 +- hw/gpio/puv3_gpio.c | 2 +- hw/gpio/zaurus.c | 2 +- hw/i2c/bitbang_i2c.c | 2 +- hw/i2c/exynos4210_i2c.c | 2 +- hw/i2c/omap_i2c.c | 2 +- hw/i2c/pm_smbus.c | 2 +- hw/i2c/versatile_i2c.c | 2 +- hw/i386/kvm/apic.c | 2 +- hw/i386/kvm/i8254.c | 2 +- hw/i386/kvm/i8259.c | 4 +-- hw/i386/kvm/ioapic.c | 2 +- hw/i386/kvm/pci-assign.c | 14 ++++----- hw/i386/kvmvapic.c | 4 +-- hw/i386/pc.c | 14 ++++----- hw/i386/pc_piix.c | 2 +- hw/i386/pc_q35.c | 2 +- hw/ide/ahci.c | 4 +-- hw/ide/cmd646.c | 10 +++--- hw/ide/macio.c | 2 +- hw/ide/mmio.c | 4 +-- hw/ide/piix.c | 6 ++-- hw/ide/via.c | 6 ++-- hw/input/milkymist-softusb.c | 6 ++-- hw/input/pckbd.c | 6 ++-- hw/input/pl050.c | 2 +- hw/input/pxa2xx_keypad.c | 2 +- hw/intc/apic.c | 2 +- hw/intc/arm_gic.c | 6 ++-- hw/intc/arm_gic_kvm.c | 4 +-- hw/intc/armv7m_nvic.c | 6 ++-- hw/intc/etraxfs_pic.c | 2 +- hw/intc/exynos4210_combiner.c | 2 +- hw/intc/exynos4210_gic.c | 8 ++--- hw/intc/grlib_irqmp.c | 2 +- hw/intc/heathrow_pic.c | 2 +- hw/intc/i8259.c | 4 +-- hw/intc/imx_avic.c | 2 +- hw/intc/ioapic.c | 2 +- hw/intc/omap_intc.c | 4 +-- hw/intc/openpic.c | 4 +-- hw/intc/pl190.c | 2 +- hw/intc/puv3_intc.c | 2 +- hw/intc/realview_gic.c | 2 +- hw/intc/sh_intc.c | 6 ++-- hw/intc/slavio_intctl.c | 4 +-- hw/intc/xilinx_intc.c | 2 +- hw/isa/apm.c | 2 +- hw/isa/i82378.c | 4 +-- hw/isa/isa_mmio.c | 2 +- hw/isa/lpc_ich9.c | 4 +-- hw/isa/pc87312.c | 2 +- hw/isa/vt82c686.c | 6 ++-- hw/lm32/lm32_boards.c | 4 +-- hw/lm32/milkymist.c | 2 +- hw/m68k/an5206.c | 4 +-- hw/m68k/dummy_m68k.c | 2 +- hw/m68k/mcf5206.c | 2 +- hw/m68k/mcf5208.c | 8 ++--- hw/m68k/mcf_intc.c | 2 +- hw/microblaze/petalogix_ml605_mmu.c | 4 +-- hw/microblaze/petalogix_s3adsp1800_mmu.c | 4 +-- hw/mips/gt64xxx_pci.c | 2 +- hw/mips/mips_fulong2e.c | 4 +-- hw/mips/mips_jazz.c | 12 ++++---- hw/mips/mips_malta.c | 10 +++--- hw/mips/mips_mipssim.c | 4 +-- hw/mips/mips_r4k.c | 6 ++-- hw/misc/a9scu.c | 2 +- hw/misc/applesmc.c | 4 +-- hw/misc/arm_l2x0.c | 2 +- hw/misc/arm_sysctl.c | 2 +- hw/misc/debugexit.c | 2 +- hw/misc/eccmemctl.c | 4 +-- hw/misc/exynos4210_pmu.c | 2 +- hw/misc/imx_ccm.c | 2 +- hw/misc/ivshmem.c | 8 ++--- hw/misc/lm32_sys.c | 2 +- hw/misc/macio/cuda.c | 2 +- hw/misc/macio/mac_dbdma.c | 2 +- hw/misc/macio/macio.c | 2 +- hw/misc/milkymist-hpdmc.c | 2 +- hw/misc/milkymist-pfpu.c | 2 +- hw/misc/mst_fpga.c | 2 +- hw/misc/omap_gpmc.c | 8 ++--- hw/misc/omap_l4.c | 2 +- hw/misc/omap_sdrc.c | 2 +- hw/misc/omap_tap.c | 2 +- hw/misc/pc-testdev.c | 8 ++--- hw/misc/pci-testdev.c | 4 +-- hw/misc/puv3_pm.c | 2 +- hw/misc/pvpanic.c | 2 +- hw/misc/pxa2xx_pcmcia.c | 6 ++-- hw/misc/slavio_misc.c | 16 +++++----- hw/misc/vfio.c | 28 ++++++++--------- hw/misc/vmport.c | 2 +- hw/misc/zynq_slcr.c | 2 +- hw/moxie/moxiesim.c | 4 +-- hw/net/cadence_gem.c | 2 +- hw/net/dp8393x.c | 2 +- hw/net/e1000.c | 4 +-- hw/net/eepro100.c | 6 ++-- hw/net/etraxfs_eth.c | 2 +- hw/net/lan9118.c | 2 +- hw/net/lance.c | 2 +- hw/net/mcf_fec.c | 2 +- hw/net/milkymist-minimac2.c | 4 +-- hw/net/mipsnet.c | 2 +- hw/net/ne2000.c | 2 +- hw/net/opencores_eth.c | 4 +-- hw/net/pcnet-pci.c | 4 +-- hw/net/rtl8139.c | 4 +-- hw/net/smc91c111.c | 2 +- hw/net/stellaris_enet.c | 2 +- hw/net/vmxnet3.c | 6 ++-- hw/net/xgmac.c | 2 +- hw/net/xilinx_axienet.c | 2 +- hw/net/xilinx_ethlite.c | 2 +- hw/nvram/ds1225y.c | 2 +- hw/nvram/fw_cfg.c | 6 ++-- hw/nvram/mac_nvram.c | 2 +- hw/openrisc/openrisc_sim.c | 2 +- hw/pci-bridge/dec.c | 4 +-- hw/pci-bridge/pci_bridge_dev.c | 2 +- hw/pci-host/apb.c | 8 ++--- hw/pci-host/bonito.c | 10 +++--- hw/pci-host/grackle.c | 8 ++--- hw/pci-host/pam.c | 8 ++--- hw/pci-host/piix.c | 12 ++++---- hw/pci-host/ppce500.c | 12 ++++---- hw/pci-host/prep.c | 8 ++--- hw/pci-host/q35.c | 10 +++--- hw/pci-host/uninorth.c | 24 +++++++-------- hw/pci-host/versatile.c | 14 ++++----- hw/pci/msix.c | 6 ++-- hw/pci/pci.c | 4 +-- hw/pci/pci_bridge.c | 12 ++++---- hw/pci/pcie_host.c | 2 +- hw/pci/shpc.c | 2 +- hw/ppc/e500.c | 4 +-- hw/ppc/mac_newworld.c | 8 ++--- hw/ppc/mac_oldworld.c | 6 ++-- hw/ppc/mpc8544_guts.c | 2 +- hw/ppc/ppc405_boards.c | 18 +++++------ hw/ppc/ppc405_uc.c | 12 ++++---- hw/ppc/ppc4xx_devs.c | 4 +-- hw/ppc/ppc4xx_pci.c | 8 ++--- hw/ppc/ppce500_spin.c | 2 +- hw/ppc/prep.c | 8 ++--- hw/ppc/spapr.c | 2 +- hw/ppc/spapr_iommu.c | 2 +- hw/ppc/spapr_pci.c | 10 +++--- hw/ppc/virtex_ml507.c | 2 +- hw/s390x/s390-virtio-ccw.c | 2 +- hw/s390x/s390-virtio.c | 2 +- hw/scsi/esp-pci.c | 2 +- hw/scsi/esp.c | 2 +- hw/scsi/lsi53c895a.c | 6 ++-- hw/scsi/megasas.c | 6 ++-- hw/scsi/vmw_pvscsi.c | 2 +- hw/sd/milkymist-memcard.c | 2 +- hw/sd/omap_mmc.c | 4 +-- hw/sd/pl181.c | 2 +- hw/sd/pxa2xx_mmci.c | 2 +- hw/sd/sdhci.c | 2 +- hw/sh4/r2d.c | 4 +-- hw/sh4/sh7750.c | 16 +++++----- hw/sh4/sh_pci.c | 4 +-- hw/sh4/shix.c | 6 ++-- hw/sparc/leon3.c | 4 +-- hw/sparc/sun4m.c | 8 ++--- hw/sparc64/sun4u.c | 4 +-- hw/ssi/omap_spi.c | 2 +- hw/ssi/pl022.c | 2 +- hw/ssi/xilinx_spi.c | 2 +- hw/ssi/xilinx_spips.c | 4 +-- hw/timer/arm_mptimer.c | 4 +-- hw/timer/arm_timer.c | 4 +-- hw/timer/cadence_ttc.c | 2 +- hw/timer/etraxfs_timer.c | 2 +- hw/timer/exynos4210_mct.c | 2 +- hw/timer/exynos4210_pwm.c | 2 +- hw/timer/exynos4210_rtc.c | 2 +- hw/timer/grlib_gptimer.c | 2 +- hw/timer/hpet.c | 2 +- hw/timer/i8254.c | 2 +- hw/timer/imx_epit.c | 2 +- hw/timer/imx_gpt.c | 2 +- hw/timer/lm32_timer.c | 2 +- hw/timer/m48t59.c | 6 ++-- hw/timer/mc146818rtc.c | 2 +- hw/timer/milkymist-sysctl.c | 2 +- hw/timer/omap_gptimer.c | 2 +- hw/timer/omap_synctimer.c | 2 +- hw/timer/pl031.c | 2 +- hw/timer/puv3_ost.c | 2 +- hw/timer/pxa2xx_timer.c | 2 +- hw/timer/sh_timer.c | 6 ++-- hw/timer/slavio_timer.c | 2 +- hw/timer/tusb6010.c | 2 +- hw/timer/xilinx_timer.c | 2 +- hw/tpm/tpm_tis.c | 2 +- hw/unicore32/puv3.c | 2 +- hw/usb/hcd-ehci-sysbus.c | 2 +- hw/usb/hcd-ehci.c | 8 ++--- hw/usb/hcd-ohci.c | 2 +- hw/usb/hcd-uhci.c | 2 +- hw/usb/hcd-xhci.c | 12 ++++---- hw/virtio/virtio-pci.c | 2 +- hw/watchdog/wdt_i6300esb.c | 2 +- hw/xen/xen_apic.c | 2 +- hw/xen/xen_platform.c | 6 ++-- hw/xen/xen_pt.c | 4 +-- hw/xen/xen_pt_msi.c | 2 +- hw/xtensa/xtensa_lx60.c | 12 ++++---- hw/xtensa/xtensa_sim.c | 4 +-- include/exec/memory.h | 17 +++++++++++ ioport.c | 2 +- memory.c | 24 ++++++++++----- target-ppc/kvm.c | 2 +- xen-all.c | 8 ++--- 318 files changed, 782 insertions(+), 754 deletions(-)